Patents by Inventor Naoto Miyashita

Naoto Miyashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160348238
    Abstract: A film forming apparatus according to an embodiment comprises a film forming chamber. A first pipe part is connected to the film forming chamber and leads a discharge gas out of the film forming chamber. The first pipe part has a first opening area in a cross-section perpendicular to a moving direction of the discharge gas. A liquid discharger discharges a part of the discharge gas liquefied in the first pipe part. A second pipe part is provided between the first pipe part and the liquid discharger and has a second opening area smaller than the first opening area in a cross-section perpendicular to a moving direction of the discharge gas.
    Type: Application
    Filed: February 1, 2016
    Publication date: December 1, 2016
    Inventors: Rempei Nakata, Kenichi Ootsuka, Yuuichi Kuroda, Masaki Hirano, Naoto Miyashita, Tsutomu Miki
  • Publication number: 20150255317
    Abstract: A semiconductor manufacturing equipment according to an embodiment includes a support unit, a chamber, a microwave generator, a waveguide, and an auxiliary heating unit. The support unit supports a wafer. The chamber accommodates the support unit therein. The microwave generator generates a microwave. The waveguide is mounted on the chamber to irradiate the microwave to a surface of the wafer. The auxiliary heating unit heats the wafer by an electromagnetic wave with a wavelength shorter than a wavelength of the microwave.
    Type: Application
    Filed: August 21, 2014
    Publication date: September 10, 2015
    Inventors: KYOICHI SUGURO, Naoto Miyashita
  • Patent number: 7351131
    Abstract: In manufacturing a semiconductor device, a part of an element is formed on the surface of a substrate, and at least a periphery of the substrate is polished using a polishing member stretched around the periphery of the substrate so that a polishing face of the polishing member is slid on a polishing target surface of the periphery.
    Type: Grant
    Filed: July 12, 2005
    Date of Patent: April 1, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenro Nakamura, Naoto Miyashita, Takashi Yoda, Katsuya Okumura
  • Patent number: 7246079
    Abstract: Based on numerical values with respect to factors influencing shares of existing products and a new product evaluated by more than one people, a structured neural network calculates predictive shares of the new product predicted by the respective persons. Comprehensive evaluations on the respective products and the new product are calculated for each person, based on the numerical values with respect to the respective factors. Correlation coefficients between the comprehensive evaluations on the respective products by the respective persons and the actual shares are calculated. The predictive shares calculated by the structural neural network are layered out in accordance with the correlation coefficients for the respective person. Average values of the predictive shares and confidence intervals are calculated for the respective layers, and based on them and the calculation result obtained by the structured neural network, a share of the new product is predicted.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: July 17, 2007
    Assignee: Fujitsu Limited
    Inventors: Hideyuki Ando, Takashi Kanazawa, Naoto Miyashita, Koji Nishimoto
  • Patent number: 7101259
    Abstract: A polishing apparatus is used for chemical mechanical polishing a copper (Cu) layer formed on a substrate such as a semiconductor wafer and then cleaning the polished substrate. The polishing apparatus has a polishing section having a turntable with a polishing surface and a top ring for holding a substrate and pressing the substrate against the polishing surface to polish a surface having a semiconductor device thereon, and a cleaning section for cleaning the substrate which has been polished. The cleaning section has an electrolyzed water supply device for supplying electrolyzed water to the substrate to clean the polished surface of the substrate while supplying electrolyzed water to the substrate.
    Type: Grant
    Filed: October 28, 2003
    Date of Patent: September 5, 2006
    Assignees: Ebara Corporation, Kabushiki Kaisha Toshiba
    Inventors: Norio Kimura, Mitsuhiko Shirakashi, Katsuhiko Tokushige, Masao Asami, Naoto Miyashita, Masako Kodera, Yoshitaka Matsui, Soichi Nadahara, Hiroshi Tomita
  • Patent number: 7005382
    Abstract: Provided are an aqueous dispersion for chemical mechanical polishing, which planarizes a surface to be polished and has high shelf stability, a chemical mechanical polishing process excellent in selectivity when surfaces of different materials are polished, and a production process of a semiconductor device. A first aqueous dispersion contains a water-soluble quaternary ammonium salt, an inorganic acid salt, abrasive grains and an aqueous medium. A second aqueous dispersion contains at least a water-soluble quaternary ammonium salt, another basic organic compound other than the water-soluble quaternary ammonium salt, an inorganic acid salt, a water-soluble polymer, abrasive grains and an aqueous medium.
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: February 28, 2006
    Assignees: JSR Corporation, Kabushiki Kaisha Toshiba
    Inventors: Kazuo Nishimoto, Tatsuaki Sakano, Akihiro Takemura, Masayuki Hattori, Nobuo Kawahashi, Naoto Miyashita, Atsushi Shigeta, Yoshitaka Matsui, Kazuhiko Ida
  • Publication number: 20050250423
    Abstract: In manufacturing a semiconductor device, a part of an element is formed on the surface of a substrate, and at least a periphery of the substrate is polished using a polishing member stretched around the periphery of the substrate so that a polishing face of the polishing member is slid on a polishing target surface of the periphery.
    Type: Application
    Filed: July 12, 2005
    Publication date: November 10, 2005
    Inventors: Kenro Nakamura, Naoto Miyashita, Takashi Yoda, Katsuya Okumura
  • Patent number: 6933234
    Abstract: In manufacturing a semiconductor device, a part of an element is formed on the surface of a substrate, and at least a periphery of the substrate is polished using a polishing member stretched around the periphery of the substrate so that a polishing face of the polishing member is slid on a polishing target surface of the periphery.
    Type: Grant
    Filed: November 25, 2002
    Date of Patent: August 23, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenro Nakamura, Naoto Miyashita, Takashi Yoda, Katsuya Okumura
  • Patent number: 6867138
    Abstract: The surface of a semiconductor device is polished by first supplying a polishing pad with a slurry that contains a solvent, abrasive grains, and an additive for making the viscosity of the slurry variable so that the top portion of the polishing pad is soaked with the slurry, then supplying the polishing pad with a viscosity modifier for increasing the viscosity of the slurry and hardening the top portion of the polishing pad soaked with the slurry, and finally polishing the surface of the semiconductor device with the slurry having its viscosity increased and the polishing pad having its top portion hardened.
    Type: Grant
    Filed: August 14, 2002
    Date of Patent: March 15, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoto Miyashita, Takeshi Nishioka
  • Patent number: 6783658
    Abstract: A target material is electropolished by applying a voltage between an anode electrode and a counter electrode while bringing the anode electrode into contact with the surface of the target material. The anode electrode is formed of an electrode material having a current density not higher than 10 mA/cm2 upon application of a voltage of +2.5V vs. silver/silver chloride electrode within a 0.1 M perchloric acid solution in an electrochemical measurement using a potentiostat.
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: August 31, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshitaka Matsui, Hiroshi Kosukegawa, Masako Kodera, Naoto Miyashita
  • Publication number: 20040132305
    Abstract: Provided are an aqueous dispersion for chemical mechanical polishing, which planarizes a surface to be polished and has high shelf stability, a chemical mechanical polishing process excellent in selectivity when surfaces of different materials are polished, and a production process of a semiconductor device.
    Type: Application
    Filed: October 29, 2003
    Publication date: July 8, 2004
    Applicants: JSR Corporation, KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuo Nishimoto, Tatsuaki Sakano, Akihiro Takemura, Masayuki Hattori, Nobuo Kawahashi, Naoto Miyashita, Atsushi Shigeta, Yoshitaka Matsui, Kazuhiko Ida
  • Publication number: 20040087258
    Abstract: A polishing apparatus is used for chemical mechanical polishing a copper (Cu) layer formed on a substrate such as a semiconductor wafer and then cleaning the polished substrate. The polishing apparatus has a polishing section having a turntable with a polishing surface and a top ring for holding a substrate and pressing the substrate against the polishing surface to polish a surface having a semiconductor device thereon, and a cleaning section for cleaning the substrate which has been polished. The cleaning section has an electrolyzed water supply device for supplying electrolyzed water to the substrate to clean the polished surface of the substrate while supplying electrolyzed water to the substrate.
    Type: Application
    Filed: October 28, 2003
    Publication date: May 6, 2004
    Inventors: Norio Kimura, Mitsuhiko Shirakashi, Katsuhiko Tokushige, Masao Asami, Naoto Miyashita, Masako Kodera, Yoshitaka Matsui, Soichi Nadahara, Hiroshi Tomita
  • Patent number: 6723226
    Abstract: In forming an electrolytic water, pure water or ultra-pure water is added to at least one solid supporting electrolyte selected from the group consisting of oxalic acid, ammonium oxalate, ammonium formate, ammonium bicarbonate, and ammonium tartrate to prepare a solution saturated with the supporting electrolyte. The solution containing the supporting electrolyte is subjected to hydrolysis to obtain an anodic water and a cathodic water.
    Type: Grant
    Filed: April 12, 1996
    Date of Patent: April 20, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jun Takayasu, Naoto Miyashita, Mikiko Kawaguchi
  • Patent number: 6716087
    Abstract: A dresser is used which makes it possible to simultaneously dress and condition the surface of a polishing pad deteriorated by polishing a semiconductor wafer in the CMP process. The dresser is a dresser comprised of a ceramic such as dressing SiC, SiN, alumina or silica. Use of this dresser enables to shorten the time of dressing/conditioning the deteriorated polishing pad.
    Type: Grant
    Filed: April 23, 2001
    Date of Patent: April 6, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoto Miyashita, Yoshihiro Minami
  • Patent number: 6667238
    Abstract: A polishing apparatus is used for chemical mechanical polishing a copper (Cu) layer formed on a substrate such as a semiconductor wafer and then cleaning the polished substrate. The polishing apparatus has a polishing section having a turntable with a polishing surface and a top ring for holding a substrate and pressing the substrate against the polishing surface to polish a surface having a semiconductor device thereon, and a cleaning section for cleaning the substrate which has been polished. The cleaning section has an electrolyzed water supply device for supplying electrolyzed water to the substrate to clean the polished surface of the substrate while supplying electrolyzed water to the substrate.
    Type: Grant
    Filed: April 7, 2000
    Date of Patent: December 23, 2003
    Assignees: Ebara Corporation, Kabushiki Kaisha Toshiba
    Inventors: Norio Kimura, Mitsuhiko Shirakashi, Katsuhiko Tokushige, Masao Asami, Naoto Miyashita, Masako Kodera, Yoshitaka Matsui, Soichi Nadahara, Hiroshi Tomita
  • Publication number: 20030139049
    Abstract: In manufacturing a semiconductor device, a part of an element is formed on the surface of a substrate, and at least a periphery of the substrate is polished using a polishing member stretched around the periphery in an in-plane direction of the substrate so that a polishing face of the polishing member is slid on a polishing target surface of the periphery.
    Type: Application
    Filed: November 25, 2002
    Publication date: July 24, 2003
    Inventors: Kenro Nakamura, Naoto Miyashita, Takashi Yoda, Katsuya Okumura
  • Publication number: 20030066760
    Abstract: A target material is electropolished by applying a voltage between an anode electrode and a counter electrode while bringing the anode electrode into contact with the surface of the target material. The anode electrode is formed of an electrode material having a current density not higher than 10 mA/cm2 upon application of a voltage of +2.5V vs. silver/silver chloride electrode within a 0.1 M perchloric acid solution in an electrochemical measurement using a potentiostat.
    Type: Application
    Filed: October 2, 2002
    Publication date: April 10, 2003
    Inventors: Yoshitaka Matsui, Hiroshi Kosukegawa, Masako Kodera, Naoto Miyashita
  • Publication number: 20020192962
    Abstract: The surface of a semiconductor device is polished by first supplying a polishing pad with a slurry that contains a solvent, abrasive grains, and an additive for making the viscosity of the slurry variable so that the top portion of the polishing pad is soaked with the slurry, then supplying the polishing pad with a viscosity modifier for increasing the viscosity of the slurry and hardening the top portion of the polishing pad soaked with the slurry, and finally polishing the surface of the semiconductor device with the slurry having its viscosity increased and the polishing pad having its top portion hardened.
    Type: Application
    Filed: August 14, 2002
    Publication date: December 19, 2002
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Naoto Miyashita, Takeshi Nishioka
  • Patent number: 6468911
    Abstract: The surface of a semiconductor device is polished by first supplying a polishing pad with a slurry that contains a solvent, abrasive grains, and an additive for making the viscosity of the slurry variable so that the top portion of the polishing pad is soaked with the slurry, then supplying the polishing pad with a viscosity modifier for increasing the viscosity of the slurry and hardening the top portion of the polishing pad soaked with the slurry, and finally polishing the surface of the semiconductor device with the slurry having its viscosity increased and the polishing pad having its top portion hardened.
    Type: Grant
    Filed: September 6, 2000
    Date of Patent: October 22, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoto Miyashita, Takeshi Nishioka
  • Publication number: 20020082902
    Abstract: Based on numerical values with respect to factors influencing shares of existing products and a new product evaluated by more than one people, a structured neural network calculates predictive shares of the new product predicted by the respective persons (S6). Comprehensive evaluations on the respective products and the new product are calculated for each person, based on the numerical values with respect to the respective factors (S10). Correlation coefficients between the comprehensive evaluations on the respective products by the respective persons and the actual shares are calculated (S12), and relationships between the are obtained (S12). Predictive shares of the new product are calculated for the respective persons based on the relationships and the comprehensive evaluations on the new product (S16). The predictive shares are layered out in accordance with the correlation coefficients for the respective persons (S18).
    Type: Application
    Filed: May 31, 2001
    Publication date: June 27, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Hideyuki Ando, Takashi Kanazawa, Naoto Miyashita, Koji Nishimoto