Patents by Inventor Naoya Mashiko

Naoya Mashiko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11476395
    Abstract: A light source that emits light, wherein, in coordinates in a CIE 1931 chromaticity diagram, the light has a color purity included in a region of 2 to 50 in a region surrounded by a line segment WB and a line segment WG that connect coordinates W (0.33, 0.33) indicating an achromatic color with coordinates B (0.091, 0.133) of 480 nm and coordinates G (0.373, 0.624) of 560 nm on a spectral locus, and the spectral locus, and has an area occupied by a continuous spectral wavelength in a wavelength region of 480 to 540 nm, of 15% or more relative to an area of an overall spectral wavelength of the light source at 380 to 780 nm.
    Type: Grant
    Filed: July 11, 2019
    Date of Patent: October 18, 2022
    Assignees: ASAHI RUBBER INC., NATIONAL UNIVERSITY CORPORATION SAITAMA UNIVERSITY
    Inventors: Naoya Mashiko, Takashi Kanahira, Masutsugu Tasaki, Eiji Ishiguro, Keiichi Watanuki, Keiichi Muramatsu, Kazunori Kaede
  • Publication number: 20210367115
    Abstract: A light source that emits light, wherein, in coordinates in a CIE 1931 chromaticity diagram, the light has a color purity included in a region of 2 to 50 in a region surrounded by a line segment WB and a line segment WG that connect coordinates W (0.33, 0.33) indicating an achromatic color with coordinates B (0.091, 0.133) of 480 nm and coordinates G (0.373, 0.624) of 560 nm on a spectral locus, and the spectral locus, and has an area occupied by a continuous spectral wavelength in a wavelength region of 480 to 540 nm, of 15% or more relative to an area of an overall spectral wavelength of the light source at 380 to 780 nm.
    Type: Application
    Filed: July 11, 2019
    Publication date: November 25, 2021
    Applicants: ASAHI RUBBER INC., NATIONAL UNIVERSITY CORPORATION SAITAMA UNIVERSITY
    Inventors: Naoya MASHIKO, Takashi KANAHIRA, Masutsugu TASAKI, Eiji ISHIGURO, Keiichi WATANUKI, Keiichi MURAMATSU, Kazunori KAEDE
  • Patent number: 11094857
    Abstract: Provided is a lighting device that emits light of a color that approximates the color of the surface of an object or the like. Disclosed is a method for manufacturing a lighting device, including the steps of: spectroscopically measuring a spectrum that constitutes a color of a measurement target; and adjusting a color of a light source such that an emission spectrum approximates the spectrum that constitutes the color of the measurement target.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: August 17, 2021
    Assignee: ASAHI RUBBER INC.
    Inventors: Eiji Ishiguro, Takashi Kanahira, Masutsugu Tasaki, Naoya Mashiko
  • Publication number: 20200044122
    Abstract: Provided is a lighting device that emits light of a color that approximates the color of the surface of an object or the like. Disclosed is a method for manufacturing a lighting device, including the steps of: spectroscopically measuring a spectrum that constitutes a color of a measurement target; and adjusting a color of a light source such that an emission spectrum approximates the spectrum that constitutes the color of the measurement target.
    Type: Application
    Filed: March 28, 2017
    Publication date: February 6, 2020
    Applicant: ASAHI RUBBER INC.
    Inventors: Eiji ISHIGURO, Takashi KANAHIRA, Masutsugu TASAKI, Naoya MASHIKO
  • Patent number: 9208037
    Abstract: The present invention provides a duplexed operation processor control system that includes operation processors, an I/O device, and at least one communication path that couples the operation processors to the I/O device, and at least one communication path that couples the operation processors with each other. The duplexed operation processor control system switches over either of the operation processors to be a primary operation processor that executes a control operation for a control target, and the other to be a secondary operation processor that is in a stand-by state, and the secondary operation processor snoops control data synchronously when the primary operation processor acquires the control data from the control target.
    Type: Grant
    Filed: June 18, 2009
    Date of Patent: December 8, 2015
    Assignees: HITACHI, LTD., HITACHI INDUSTRY & CONTROL SOLUTIONS, LTD.
    Inventors: Toshiki Shimizu, Akira Bando, Yusaku Otsuka, Yasuhiro Kiyofuji, Eiji Kobayashi, Akihiro Onozuka, Satoru Funaki, Masakazu Ishikawa, Hideaki Masuko, Yusuke Seki, Wataru Sasaki, Naoya Mashiko, Akihiro Nakano, Shin Kokura, Shoichi Ozawa, Yu Iwasaki
  • Patent number: 8493927
    Abstract: In a control apparatus which transmits/receives data from a central processing unit via a serial transfer channel to a communication control unit, and groups/distributes data of input/output units from the communication control unit via a parallel transfer channel, the control apparatus initiates a diagnosing unit of the parallel transfer channel in response to an instruction issued from the central processing unit, and diagnosis the input/output units subsequent to the diagnosis of the transmission channel. Data input/output timing of the input/output unit is also instructed from the central processing unit, so that the central processing unit can suppress lowering of response speeds caused by the diagnoses, and can maintain the periodicity of the data input/output.
    Type: Grant
    Filed: June 28, 2007
    Date of Patent: July 23, 2013
    Assignees: Hitachi, Ltd., Hitachi Information & Control Solutions, Ltd.
    Inventors: Akira Bandou, Masamitsu Kobayashi, Masahiro Shiraishi, Akihiro Onozuka, Takashi Umehara, Shin Kokura, Eiji Kobayashi, Masakazu Ishikawa, Yasuyuki Furuta, Naoya Mashiko, Satoru Funaki, Yuusuke Seki, Tatsuyuki Ootani, Wataru Sasaki, Yusaku Otsuka, Akihiro Nakano, Shoichi Ozawa, Takenori Kasahara, Yu Iwasaki
  • Patent number: 8423681
    Abstract: A control apparatus for an input-output device includes a hardware part and a software part, in which a controller in the hardware part carries out a control operation in accordance with a signal from the input-output device, outputs a result of the control operation to a process, and has a timer unit to be excited at a constant period; and the software part has an information process part, a control process part, and an interrupt control unit to switch over the information process part and control process part one another, in which the interrupt control unit suspends an execution of the information process part to execute the control process part in priority and resume the information process part by switching over to the information process part from the control process part, when the execution of the control process part is terminated.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: April 16, 2013
    Assignees: Hitachi, Ltd., Hitachi Information & Control Solutions, Ltd., Hitachi Engineering & Services Co., Ltd.
    Inventors: Yusaku Otsuka, Naoya Mashiko, Shin Kokura, Yu Iwasaki, Ryuichi Murakawa, Akira Bando, Wataru Sasaki, Hideyuki Yoshikawa, Masamitsu Kobayashi
  • Patent number: 8209594
    Abstract: A receiving device including: a receiver receiving two frames, each including substantially same data attached thereto with a data error detection code, a frame error detection code, and safety flag information indicating a safety function or not, respectively; a first detector connected to the receiver for performing error detection of the frames by use of the frame error detection code, respectively; a second detector connected to the receiver for performing error detection of the data by use of the data error detection code, respectively; and a Direct Memory Access Controller (DMAC) connected to the first and second detectors for outputting one among the data included in the two frames under a condition of the safety function in the two frames when no error is detected in the frame and data error detections.
    Type: Grant
    Filed: October 8, 2010
    Date of Patent: June 26, 2012
    Assignees: Hitachi, Ltd., Hitachi Information & Control Solutions, Ltd.
    Inventors: Akihiro Onozuka, Masakazu Ishikawa, Masamitsu Kobayashi, Takashi Umehara, Shin Kokura, Hiromichi Endoh, Satoru Funaki, Hisao Nagayama, Masahiro Shiraishi, Akira Bando, Eiji Kobayashi, Yasuyuki Furuta, Naoya Mashiko
  • Publication number: 20120124268
    Abstract: A control apparatus for an input-output device includes a hardware part and a software part, in which a controller in the hardware part carries out a control operation in accordance with a signal from the input-output device, outputs a result of the control operation to a process, and has a timer unit to be excited at a constant period; and the software part has an information process part, a control process part, and an interrupt control unit to switch over the information process part and control process part one another, in which the interrupt control unit suspends an execution of the information process part to execute the control process part in priority and resume the information process part by switching over to the information process part from the control process part, when the execution of the control process part is terminated.
    Type: Application
    Filed: December 6, 2011
    Publication date: May 17, 2012
    Inventors: Yusaku Otsuka, Naoya Mashiko, Shin Kokura, Yu Iwasaki, Ryuichi Murakawa, Akira Bando, Wataru Sasaki, Hideyuki Yoshikawa, Masamitsu Kobayashi
  • Patent number: 8161362
    Abstract: Processed results are received when processors make compatible computations on data of a common object. A computation command signal is generated and fed to the processors in response to a start signal from any one of the processors so that the processors can make computations with different operation timings. Then, the results of the computations made by the processors are compared with each other. Thus, apparatus capable of small size, high performance and safety at the same time can be achieved by the above construction using the processors.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: April 17, 2012
    Assignees: Hitachi, Ltd., Hitachi Information & Control Solutions, Ltd.
    Inventors: Akira Bando, Shin Kokura, Takashi Umehara, Masamitsu Kobayashi, Hisao Nagayama, Naoya Mashiko, Masakazu Ishikawa, Masahiro Shiraishi, Akihiro Onozuka, Hiromichi Endoh, Tsutomu Yamada, Satoru Funaki
  • Patent number: 8095695
    Abstract: A control apparatus for an input-output device includes a hardware part and a software part, in which a controller in the hardware part carries out a control operation in accordance with a signal from the input-output device, outputs a result of the control operation to a process, and has a timer unit to be excited at a constant period; and the software part has an information process part, a control process part, and an interrupt control unit to switch over the information process part and control process part one another, in which the interrupt control unit suspends an execution of the information process part to execute the control process part in priority and resume the information process part by switching over to the information process part from the control process part, when the execution of the control process part is terminated.
    Type: Grant
    Filed: January 23, 2009
    Date of Patent: January 10, 2012
    Assignees: Hitachi, Ltd., Hitachi Information & Control Solutions, Ltd., Hitachi Engineering & Services Co., Ltd.
    Inventors: Yusaku Otsuka, Naoya Mashiko, Shin Kokura, Yu Iwasaki, Ryuichi Murakawa, Akira Bando, Wataru Sasaki, Hideyuki Yoshikawa, Masamitsu Kobayashi
  • Publication number: 20110214125
    Abstract: An input/output control apparatus including: a unit that controls input/output of data relating to a computation of a plurality of processors in response to an access request from a second input/output unit and an access request from a first input/output unit which requires higher reliability than said second input/output unit, and orders at least one of a plurality of processors to perform a computation relating to the access request from said first input/output unit away from the computation relating to the access request from said second input/output unit in case of that said first input/output unit issued an access request, so that a same computation is made by said plurality of processors; a unit that compares the results of said computations relative to the access request from said first input/output unit provided from said plurality of processors; and a unit that allows the data associated with said computations of said processors to be output on the basis of said compared results.
    Type: Application
    Filed: May 11, 2011
    Publication date: September 1, 2011
    Inventors: Akira Bando, Shin Kokura, Takashi Umehara, Masamitsu Kobayashi, Hisao Nagayama, Naoya Mashiko, Masakazu Ishikawa, Masahiro Shiraishi, Akihiro Onozuka, Hiromichi Endoh, Tsutomu Yamada, Satoru Funaki
  • Publication number: 20110022936
    Abstract: A receiving device including: a receiver receiving two frames, each including substantially same data attached thereto with a data error detection code, a frame error detection code, and safety flag information indicating a safety function or not, respectively; a first detector connected to the receiver for performing error detection of the frames by use of the frame error detection code, respectively; a second detector connected to the receiver for performing error detection of the data by use of the data error detection code, respectively; and a Direct Memory Access Controller (DMAC) connected to the first and second detectors for outputting one among the data included in the two frames under a condition of the safety function in the two frames when no error is detected in the frame and data error detections.
    Type: Application
    Filed: October 8, 2010
    Publication date: January 27, 2011
    Inventors: Akihiro ONOZUKA, Masakazu Ishikawa, Masamitsu Kobayashi, Takashi Umehara, Shin Kokura, Hiromichi Endoh, Satoru Funaki, Hisao Nagayama, Masahiro Shiraishi, Akira Bando, Eiji Kobayashi, Yasuyuki Furuta, Naoya Mashiko
  • Patent number: 7873871
    Abstract: A programmable electronic controller in which one central arithmetic processing unit and a plurality of input devices and output devices are connected by means of a parallel bus, the controller being basically configured to activate a self-diagnostic function and a diagnostic test of the input devices and the output devices with an instruction from a microprocessor of the central arithmetic processing unit; and to judge the result with the microprocessor of the central arithmetic processing unit, by using the microprocessor installed in the central arithmetic processing unit also as a processor for tests (diagnostic tests) of the self-diagnostic function of the input devices and output devices and conducting tests of the self-diagnostic function of the plurality of input devices and output devices with the central arithmetic processing unit.
    Type: Grant
    Filed: June 26, 2007
    Date of Patent: January 18, 2011
    Assignees: Hitachi, Ltd., Hitachi Information & Control Solutions, Ltd.
    Inventors: Masakazu Ishikawa, Akira Bandou, Masahiro Shiraishi, Masamitsu Kobayashi, Yasuyuki Furuta, Akihiro Onozuka, Shin Kokura, Eiji Kobayashi, Satoru Funaki, Takashi Umehara, Naoya Mashiko, Yuusuke Seki, Tatsuyuki Ootani
  • Publication number: 20100050062
    Abstract: The system has, provided in a sending device, a generator generating transmission data including data, a data error detection code generated from the data and a safety flag indicating a degree of reliability, and transmission data; has, provided in a receiving device, a plurality of components of extracting transmission data, a safety flag, and a data error detection code from a received frame, and detecting a data error, a comparator comparing the matching of a plurality of received frames, and a selector selecting one received frame, from the frame error detection result, the safety flag, the data error detection result, and the matching comparison result; and determines the validity of transmitted data by the detection corresponding to the degree of reliability set with the safety flag.
    Type: Application
    Filed: October 29, 2009
    Publication date: February 25, 2010
    Inventors: Akihiro ONOZUKA, Masakazu ISHIKAWA, Masamitsu KOBAYASHI, Takashi UMEHARA, Shin KOKURA, Hiromichi ENDOH, Satoru FUNAKI, Hisao NAGAYAMA, Masahiro SHIRAISHI, Akira BANDO, Eiji KOBAYASHI, Yasuyuki FURUTA, Naoya MASHIKO
  • Publication number: 20090319756
    Abstract: The present invention provides a duplexed operation processor control system that includes operation processors, an I/O device, and at least one communication path that couples the operation processors to the I/O device, and at least one communication path that couples the operation processors with each other. The duplexed operation processor control system switches over either of the operation processors to be a primary operation processor that executes a control operation for a control target, and the other to be a secondary operation processor that is in a stand-by state, and the secondary operation processor snoops control data synchronously when the primary operation processor acquires the control data from the control target.
    Type: Application
    Filed: June 18, 2009
    Publication date: December 24, 2009
    Inventors: Toshiki Shimizu, Akira Bando, Yusaku Otsuka, Yasuhiro Kiyofuji, Elji Kobayashi, Akihiro Onozuka, Satoru Funaki, Masakazu Ishikawa, Hideaki Masuko, Yusuke Seki, Wataru Sasaki, Naoya Mashiko, Akihiro Nakano, Shin Kokura, Shoichi Ozawa, Yu Iwasaki
  • Publication number: 20090187261
    Abstract: A control apparatus for an input-output device includes a hardware part and a software part, in which a controller in the hardware part carries out a control operation in accordance with a signal from the input-output device, outputs a result of the control operation to a process, and has a timer unit to be excited at a constant period; and the software part has an information process part, a control process part, and an interrupt control unit to switch over the information process part and control process part one another, in which the interrupt control unit suspends an execution of the information process part to execute the control process part in priority and resume the information process part by switching over to the information process part from the control process part, when the execution of the control process part is terminated.
    Type: Application
    Filed: January 23, 2009
    Publication date: July 23, 2009
    Inventors: Yusaku Otsuka, Naoya Mashiko, Shin Kokura, Yu Iwasaki, Ryuichi Murakawa, Akira Bando, Wataru Sasaki, Hideyuki Yoshikawa, Masamitsu Kobayashi
  • Patent number: 7555627
    Abstract: Input-output devices are prevented from conducting false output due to faulty operation by providing an input-output control apparatus configured to store input-output values to be used by a processor to conduct arithmetic operation in a mode having a relatively high safety requirement, in a first storage area, store input-output values to be used by the processor to conduct arithmetic operation in a mode having a relatively low safety requirement, in a second storage area, and restrict copying to the first storage area, copying from the first storage area, copying to the second storage area, or copying from the second storage area according to the mode concerning the safety requirement.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: June 30, 2009
    Assignees: Hitachi, Ltd., Hitachi Information & Control Solutions, Ltd.
    Inventors: Naoya Mashiko, Takashi Umehara, Masamitsu Kobayashi, Hiromichi Endoh, Akihiro Onozuka, Akira Bando, Shin Kokura, Hisao Nagayama, Masakazu Ishikawa, Satoru Funaki, Masahiro Shiraishi
  • Publication number: 20080016404
    Abstract: A programmable electronic controller in which one central arithmetic processing unit and a plurality of input devices and output devices are connected by means of a parallel bus, the controller being basically configured to activate a self-diagnostic function and a diagnostic test of the input devices and the output devices with an instruction from a microprocessor of the central arithmetic processing unit; and to judge the result with the microprocessor of the central arithmetic processing unit, by using the microprocessor installed in the central arithmetic processing unit also as a processor for tests (diagnostic tests) of the self-diagnostic function of the input devices and output devices and conducting tests of the self-diagnostic function of the plurality of input devices and output devices with the central arithmetic processing unit.
    Type: Application
    Filed: June 26, 2007
    Publication date: January 17, 2008
    Inventors: MASAKAZU ISHIKAWA, Akira Bandou, Masahiro Shiraishi, Masamitsu Kobayashi, Yasuyuki Furuta, Akihiro Onozuka, Shin Kokura, Eiji Kobayashi, Satoru Funaki, Takashi Umehara, Naoya Mashiko, Yuusuke Seki, Tatsuyuki Ootani
  • Publication number: 20080013475
    Abstract: In a control apparatus which transmits/receives data from a central processing unit via a serial transfer channel to a communication control unit, and groups/distributes data of input/output units from the communication control unit via a parallel transfer channel, the control apparatus initiates a diagnosing unit of the parallel transfer channel in response to an instruction issued from the central processing unit, and diagnosis the input/output units subsequent to the diagnosis of the transmission channel. Data input/output timing of the input/output unit is also instructed from the central processing unit, so that the central processing unit can suppress lowering of response speeds caused by the diagnoses, and can maintain the periodicity of the data input/output.
    Type: Application
    Filed: June 28, 2007
    Publication date: January 17, 2008
    Inventors: Akira Bandou, Masamitsu Kobayashi, Masahiro Shiraishi, Akihiro Onozuka, Takashi Umehara, Shin Kokura, Eiji Kobayashi, Masakazu Ishikawa, Yasuyuki Furuta, Naoya Mashiko, Satoru Funaki, Yuusuke Seki, Tatsuyuki Ootani, Wataru Sasaki, Yusaku Otsuka, Akihiro Nakano, Shoichi Ozawa, Takenori Kasahara, Yu Iwasaki