Patents by Inventor Naoyoshi Kobayashi
Naoyoshi Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12114490Abstract: An apparatus includes a substrate; a memory cell region provided over the substrate; a peripheral region provided over the substrate and adjacent to the memory cell region; and a plurality of word-lines extending in parallel across the memory cell region and the peripheral region; a first insulating film covering top surfaces of the plurality of word-lines in each of the memory cell region and the peripheral region and covering side surfaces of upper portions of the plurality of word-lines in the peripheral region without covering side surfaces of the upper portions of the plurality of word-lines in the memory cell region.Type: GrantFiled: December 21, 2021Date of Patent: October 8, 2024Assignee: MICRON TECHNOLOGY, INC.Inventors: Naoyoshi Kobayashi, Tsuyoshi Tomoyama
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Publication number: 20230200058Abstract: An apparatus includes a substrate; a memory cell region provided over the substrate; a peripheral region provided over the substrate and adjacent to the memory cell region; and a plurality of word-lines extending in parallel across the memory cell region and the peripheral region; a first insulating film covering top surfaces of the plurality of word-lines in each of the memory cell region and the peripheral region and covering side surfaces of upper portions of the plurality of word-lines in the peripheral region without covering side surfaces of the upper portions of the plurality of word-lines in the memory cell region.Type: ApplicationFiled: December 21, 2021Publication date: June 22, 2023Applicant: MICRON TECHNOLOGY, INC.Inventors: Naoyoshi Kobayashi, Tsuyoshi Tomoyama
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Patent number: 11393828Abstract: A semiconductor device comprises laterally-neighboring word lines having respective word line caps thereon, an active region between the laterally-neighboring word lines and word line caps, an insulating material and a semiconductive material adjacent the word line caps, and a digit line contact between opposing substantially vertical surfaces of the semiconductive material, between opposing substantially vertical surfaces of the insulating material, adjacent to substantially horizontal surfaces of the word line caps, and between opposing substantially vertical surfaces of the word line caps. A transition surface extending between and connecting the substantially horizontal surface and the substantially vertical surface of the respective word line caps projects toward a longitudinal axis extending centrally through the digit line contact. Methods of forming the semiconductor device are also disclosed, as are electronic systems including the semiconductor device.Type: GrantFiled: August 27, 2020Date of Patent: July 19, 2022Assignee: Micron Technology, Inc.Inventors: Naoyoshi Kobayashi, Osamu Fujita, Katsumi Koge
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Publication number: 20200395365Abstract: A semiconductor device comprises laterally-neighboring word lines having respective word line caps thereon, an active region between the laterally-neighboring word lines and word line caps, an insulating material and a semiconductive material adjacent the word line caps, and a digit line contact between opposing substantially vertical surfaces of the semiconductive material, between opposing substantially vertical surfaces of the insulating material, adjacent to substantially horizontal surfaces of the word line caps, and between opposing substantially vertical surfaces of the word line caps. A transition surface extending between and connecting the substantially horizontal surface and the substantially vertical surface of the respective word line caps projects toward a longitudinal axis extending centrally through the digit line contact. Methods of forming the semiconductor device are also disclosed, as are electronic systems including the semiconductor device.Type: ApplicationFiled: August 27, 2020Publication date: December 17, 2020Inventors: Naoyoshi Kobayashi, Osamu Fujita, Katsumi Koge
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Patent number: 10770466Abstract: A semiconductor device comprises laterally-neighboring word lines having respective word line caps thereon, an active region between the laterally-neighboring word lines and word line caps, an insulating material and a semiconductive material adjacent the word line caps, and a digit line contact between opposing substantially vertical surfaces of the semiconductive material, between opposing substantially vertical surfaces of the insulating material, adjacent to substantially horizontal surfaces of the word line caps, and between opposing substantially vertical surfaces of the word line caps. A transition surface extending between and connecting the substantially horizontal surface and the substantially vertical surface of the respective word line caps projects toward a longitudinal axis extending centrally through the digit line contact. Methods of forming the semiconductor device are also disclosed, as are electronic systems including the semiconductor device.Type: GrantFiled: January 25, 2019Date of Patent: September 8, 2020Assignee: Micron Technology, Inc.Inventors: Naoyoshi Kobayashi, Osamu Fujita, Katsumi Koge
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Publication number: 20200243539Abstract: A semiconductor device comprises laterally-neighboring word lines having respective word line caps thereon, an active region between the laterally-neighboring word lines and word line caps, an insulating material and a semiconductive material adjacent the word line caps, and a digit line contact between opposing substantially vertical surfaces of the semiconductive material, between opposing substantially vertical surfaces of the insulating material, adjacent to substantially horizontal surfaces of the word line caps, and between opposing substantially vertical surfaces of the word line caps. A transition surface extending between and connecting the substantially horizontal surface and the substantially vertical surface of the respective word line caps projects toward a longitudinal axis extending centrally through the digit line contact. Methods of forming the semiconductor device are also disclosed, as are electronic systems including the semiconductor device.Type: ApplicationFiled: January 25, 2019Publication date: July 30, 2020Inventors: Naoyoshi Kobayashi, Osamu Fujita, Katsumi Koge
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Patent number: 10546863Abstract: Disclosed herein is a method that includes: forming a composite layer, the composite layer comprising first and second insulative materials and a first polysilicon layer that is between the first and second insulative materials, forming a hole in the composite layer, the hole penetrating through the composite layer to define respective edge portions of the first and second insulative materials and the first polysilicon layer, and converting the edge portion of the first polysilicon layer into third insulative material so that the third insulative material is between the respective edges of the first and second insulative materials.Type: GrantFiled: August 2, 2018Date of Patent: January 28, 2020Assignee: Micron Technology, Inc.Inventor: Naoyoshi Kobayashi
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Patent number: 10128183Abstract: A method of forming a conductive via comprises forming a structure comprising an elevationally-extending-conductive via and a conductive line electrically coupled to and crossing above the conductive via. The conductive line comprises first conductive material and the conductive via comprises second conductive material of different composition from that of the first conductive material. The conductive line and the conductive via respectively having opposing sides in a vertical cross-section. First insulator material having k no greater than 4.0 is formed laterally outward of the opposing sides of the second conductive material of the conductive via selectively relative to the first conductive material of the opposing sides of the conductive line. The first insulator material is formed to a lateral thickness of at least 40 Angstroms in the vertical cross-section. Second insulator material having k greater than 4.Type: GrantFiled: March 20, 2018Date of Patent: November 13, 2018Assignee: Micron Technology, Inc.Inventors: Sourabh Dhir, Andrew L. Li, Sanh D. Tang, Naoyoshi Kobayashi, Katsumi Koge
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Publication number: 20180323142Abstract: A method of forming a conductive via comprises forming a structure comprising an elevationally-extending-conductive via and a conductive line electrically coupled to and crossing above the conductive via. The conductive line comprises first conductive material and the conductive via comprises second conductive material of different composition from that of the first conductive material. The conductive line and the conductive via respectively having opposing sides in a vertical cross-section. First insulator material having k no greater than 4.0 is formed laterally outward of the opposing sides of the second conductive material of the conductive via selectively relative to the first conductive material of the opposing sides of the conductive line. The first insulator material is formed to a lateral thickness of at least 40 Angstroms in the vertical cross-section. Second insulator material having k greater than 4.Type: ApplicationFiled: March 20, 2018Publication date: November 8, 2018Applicant: Micron Technology, Inc.Inventors: Sourabh Dhir, Andrew L. Li, Sanh D. Tang, Naoyoshi Kobayashi, Katsumi Koge
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Patent number: 9960114Abstract: A method of forming a conductive via comprises forming a structure comprising an elevationally-extending-conductive via and a conductive line electrically coupled to and crossing above the conductive via. The conductive line comprises first conductive material and the conductive via comprises second conductive material of different composition from that of the first conductive material. The conductive line and the conductive via respectively having opposing sides in a vertical cross-section. First insulator material having k no greater than 4.0 is formed laterally outward of the opposing sides of the second conductive material of the conductive via selectively relative to the first conductive material of the opposing sides of the conductive line. The first insulator material is formed to a lateral thickness of at least 40 Angstroms in the vertical cross-section. Second insulator material having k greater than 4.Type: GrantFiled: May 3, 2017Date of Patent: May 1, 2018Assignee: Micron Technology, Inc.Inventors: Sourabh Dhir, Andrew L. Li, Sanh D. Tang, Naoyoshi Kobayashi, Katsumi Koge