Patents by Inventor Narayana Swamy

Narayana Swamy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220206880
    Abstract: Various methods, apparatuses/systems, and media for implementing a single window integrated platform are disclosed. A processor is operatively connected with one or more memories via a communication network. The processor receives a request from a user via a user computing device to develop a micro service; authenticates the user based on verifying login information of the user; receives information data related to the requested micro service; generates products application programming interface (API) to display selectable products based on the information data of the requested micro service. The processor also receives input on selected products; triggers a dynamic workflow based on the selected products; interacts with onboarding APIs to develop the micro service in response to the triggering of the dynamic workflow; and transmits a notification to the user computing device when an end state of the dynamic workflow is detected.
    Type: Application
    Filed: December 24, 2020
    Publication date: June 30, 2022
    Applicant: JPMorgan Chase Bank, N.A.
    Inventors: Narayana Swamy Thota, Sumitra Nandan Mishra
  • Patent number: 11319277
    Abstract: The present invention relates to a novel process for converting the unwanted S enantiomer form to its useful raceme with respect to a 4-aminoindane derivative and to novel intermediates of said process.
    Type: Grant
    Filed: January 22, 2020
    Date of Patent: May 3, 2022
    Assignee: FMC Corporation
    Inventors: Narayana Swamy, Chokalingam Devarajan, Ravindra Vitthal Datar
  • Publication number: 20220002225
    Abstract: A compound of Formula (VI), wherein ‘n’ and ‘R’ are selected so that the compound comprises 1-acetyl-6-fluoro-2,2,4-trimethyl-1,2,3,4-tetrahydroquinoline of Formula (IX):
    Type: Application
    Filed: September 15, 2021
    Publication date: January 6, 2022
    Inventors: Paolo BELLANDI, Giampaolo ZANARDI, Ravindra Vitthal DATAR, Chockalingam DEVARAJAN, Swamynathan MURALI, Narayana SWAMY
  • Patent number: 11208374
    Abstract: The present invention relates to N-(7-fluoro-1,1,3-trimethyl-1H-inden-4yl) amides and a process for preparing same. The novel amides are useful in a process for converting the unwanted S enantiomer form of a 4-aminoindane derivative to its useful raceme.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: December 28, 2021
    Assignee: FMC Corporation
    Inventors: Narayana Swamy, Chokalingam Devarajan, Ravindra Vitthal Datar
  • Patent number: 11148995
    Abstract: A process for preparation of 4-aminoindane compounds of a first formula, salts and enantiomers thereof including: a) hydrogenating a 1,2-dihydroquinoline of a second formula to give a corresponding tetrahydroquinoline of a third formula; b) acylating the tetrahydroquinoline of the third formula with a carboxylic acid derivative of a fourth formula to obtain a corresponding acyl derivative compound of a fifth formula; c) rearranging the acyl derivative compound of the fifth formula under acidic conditions so as to give an acyl indane compound of a sixth formula or an addition salt thereof; and d) hydrolysing the acyl group of the acyl indane compound of the sixth formula so as to obtain the 4-aminoindane derivatives of the first formula.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: October 19, 2021
    Assignee: STICHTING I-F PRODUCT COLLABORATION
    Inventors: Paolo Bellandi, Giampaolo Zanardi, Ravindra Vitthal Datar, Chockalingam Devarajan, Swamynathan Murali, Narayana Swamy
  • Publication number: 20210203168
    Abstract: Aspects of the present disclosure provide for a circuit. In at least some examples, the circuit includes a dual-role port for transferring power to the circuit and from the circuit. The circuit also includes a micro-processing unit. The micro-processing unit is configured to control the circuit to operate as a sink device to receive power from a source device via the dual-role port when the power supply includes a first amount of stored energy, detect, at the dual-role port, a change in a termination resistance of the source device, and control the circuit to limit power transfer from the circuit to the power supply via the dual-role port when the power supply changes in status from a sourcing state to a sinking state.
    Type: Application
    Filed: December 31, 2019
    Publication date: July 1, 2021
    Inventors: Rahul Raj SHARMA, Nagesh NARAYANA SWAMY
  • Patent number: 10969249
    Abstract: A method, apparatus, and system use logic circuitry arranged within an integrated circuit to: convert a self capacitance of a first sensor element arranged within the integrated circuit to a digital value, and apply a signal to an output pin of the integrated circuit based on the self capacitance.
    Type: Grant
    Filed: February 15, 2017
    Date of Patent: April 6, 2021
    Assignee: Cypress Semiconductor Coproration
    Inventors: Rajagopal Narayanasamy, Mahadevan Krishnamurthy Narayana Swamy, David G. Wright, Steve Kolokowsky
  • Patent number: 10860509
    Abstract: One example includes a non-transitory storage medium storing a set of instructions, which upon being implemented by a processing element cause the processing element to initiate a burst update communication session from a master microcontroller device on a bus and provide a burst address in the burst update communication session from the master microcontroller device to slave microcontroller devices on the bus. The slave microcontroller devices on the bus can have a burst address to concurrently activate the slave microcontroller devices to read data. The instructions can also cause the processing element to provide burst data corresponding to a burst update from the master microcontroller device to the slave microcontroller devices on the bus based on the burst address, and conclude the burst update communication session from the master microcontroller device to the slave microcontroller devices on the bus.
    Type: Grant
    Filed: July 23, 2019
    Date of Patent: December 8, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Gregory Alan Watkins, Michael Joseph Koltun, IV, Nagesh Narayana Swamy, Randall Stephen Preissig
  • Publication number: 20200310512
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to allow dynamic changing between current limiting methods. A power delivery controller comprising: a power control device; a first current control device, the first current control device to control the power control device when a current level associated with a current flowing between a first device and a second device exceeds a first adjustable current threshold value; a second current control device to control the power control device when the current level exceeds a second adjustable current threshold value; and a configuration manager to, during runtime, set a first configuration setting of the first current control device and a second configuration setting of the second current control device, the first configuration setting and second configuration setting based on a negotiated contract corresponding to the first device and the second device.
    Type: Application
    Filed: March 27, 2019
    Publication date: October 1, 2020
    Inventors: Michael James Mills, Mohammad Atiqur Rahman, Eric Beljaars, Nagesh Narayana Swamy
  • Publication number: 20200231533
    Abstract: A process for preparation of 4-aminoindane compounds of a first formula, salts and enantiomers thereof including: a) hydrogenating a 1,2-dihydroquinoline of a second formula to give a corresponding tetrahydroquinoline of a third formula; b) acylating the tetrahydroquinoline of the third formula with a carboxylic acid derivative of a fourth formula to obtain a corresponding acyl derivative compound of a fifth formula; c) rearranging the acyl derivative compound of the fifth formula under acidic conditions so as to give an acyl indane compound of a sixth formula or an addition salt thereof; and d) hydrolysing the acyl group of the acyl indane compound of the sixth formula so as to obtain the 4-aminoindane derivatives of the first formula.
    Type: Application
    Filed: March 31, 2020
    Publication date: July 23, 2020
    Inventors: Paolo BELLANDI, Giampaolo ZANARDI, Ravindra Vitthal DATAR, Chockalingam DEVARAJAN, Swamynathan MURALI, Narayana SWAMY
  • Publication number: 20200157039
    Abstract: The present invention relates to a novel process for converting the unwanted S enantiomer form to its useful raceme with respect to a 4-aminoindane derivative and to novel intermediates of said process.
    Type: Application
    Filed: January 22, 2020
    Publication date: May 21, 2020
    Inventors: Narayana Swamy, Chokalingam Devarajan, Ravindra Vitthal Datar
  • Patent number: 10640454
    Abstract: A process for preparation of 4-aminoindane derivatives of a first formula, salts and enantiomers thereof comprising the steps of: a) hydrogenating a 1,2-dihydroquinoline of a second formula to give a corresponding tetrahydroquinoline of a third formula; b) acylating the tetrahydroquinoline of the third formula with a carboxylic acid derivative of a fourth formula to obtain a corresponding acyl derivative compound of a fifth formula; c) rearranging the acyl derivative compound of the fifth formula under acidic conditions so as to give an acyl indane compound of a sixth formula; and d) hydrolysing the acyl group of the acyl indane compound of the sixth formula so as to obtain the 4-aminoindane derivatives of the first formula.
    Type: Grant
    Filed: April 15, 2016
    Date of Patent: May 5, 2020
    Assignee: STICHTING I-F PRODUCT COLLABORATION
    Inventors: Paolo Bellandi, Giampaolo Zanardi, Ravindra Vitthal Datar, Chockalingam Devarajan, Swamynathan Murali, Narayana Swamy
  • Patent number: 10570086
    Abstract: The present invention relates to a novel process for converting the unwanted S enantiomer form to its useful raceme with respect to a 4-aminoindane derivative.
    Type: Grant
    Filed: March 15, 2017
    Date of Patent: February 25, 2020
    Assignee: FMC Corporation
    Inventors: Narayana Swamy, Chokalingam Devarajan, Ravindra Vitthal Datar
  • Publication number: 20200055809
    Abstract: The present invention relates to a novel process for converting the unwanted S enantiomer form to its useful raceme with respect to a 4-aminoindane derivative and to novel intermediates of said process.
    Type: Application
    Filed: October 28, 2019
    Publication date: February 20, 2020
    Inventors: Narayana Swamy, Chokalingam Devarajan, Ravindra Vitthal Datar
  • Publication number: 20190119195
    Abstract: A process for preparation of 4-aminoindane derivatives of a first formula, salts and enantiomers thereof comprising the steps of: a) hydrogenating a 1,2-dihydroquinoline of a second formula to give a corresponding tetrahydroquinoline of a third formula; b) acylating the tetrahydroquinoline of the third formula with a carboxylic acid derivative of a fourth formula to obtain a corresponding acyl derivative compound of a fifth formula; c) rearranging the acyl derivative compound of the fifth formula under acidic conditions so as to give an acyl indane compound of a sixth formula; and d) hydrolysing the acyl group of the acyl indane compound of the sixth formula so as to obtain the 4-aminoindane derivatives of the first formula.
    Type: Application
    Filed: April 15, 2016
    Publication date: April 25, 2019
    Inventors: Paolo BELLANDI, Giampaolo ZANARDI, Ravindra Vitthal DATAR, Chockalingam DEVARAJAN, Swamynathan MURALI, Narayana SWAMY
  • Publication number: 20190092716
    Abstract: The present invention relates to a novel process for converting the unwanted S enantiomer form to its useful raceme with respect to a 4-aminoindane derivative.
    Type: Application
    Filed: March 15, 2017
    Publication date: March 28, 2019
    Inventors: Narayana Swamy, Chokalingam Devarajan, Ravindra Datar
  • Patent number: 10148517
    Abstract: An information handling system is provided. The information handling system includes a network orchestration service running on a computer processor. The network orchestration service provides a Border Gateway Protocol (BGP) listener module and a topology builder module. The BGP listener module is configured to receive information from a plurality of spine devices configured as an autonomous system and the topology builder module is configured to use the information received by the BGP listener module to create a topology of a data center that includes the plurality of spine devices. Additionally, the network orchestration service is in communication with a memory that is used to store information received by the BGP listener module and the topology of the data center. Applications of the information handling system for better operating the data center are also provided.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: December 4, 2018
    Assignee: Dell Products L.P.
    Inventors: Balaji Venkat Venkataswami, Bhargav Bhikkaji, Narayana Swamy Perumal
  • Patent number: 9927864
    Abstract: A multiple link power allocation system includes a powered IHS coupled to a powering IHS by a plurality of networking cables that transmit data and power to provide a plurality of data/power links. The powering IHS may detect that the data/power links are connected to the powered IHS, determine a total power amount needed by the powered IHS, and provide the total power amount to the powered IHS using the data/power links. The powered IHS may detect the connection of an initial data/power link, enable a first powered IHS function mode and, in response, draw a first power amount through the initial data/power link. The powered IHS may also detect the connection of subsequent data/power link(s), enable a second powered IHS function mode and, in response, draw a second power amount through the initial data/power link and the subsequent data/power link(s) that is greater than the first power amount.
    Type: Grant
    Filed: June 27, 2014
    Date of Patent: March 27, 2018
    Assignee: Dell Products L.P.
    Inventors: Rajasekar Vannierpalayam Selvarajan, Narayana Swamy Perumal
  • Publication number: 20170255297
    Abstract: A method and apparatus include a plurality of sensor elements arranged within an integrated circuit package and a controller arranged within the integrated circuit package and coupled to the plurality of sensor elements. The controller is configured to apply a transmit signal to a first sensor element of the plurality of sensor elements and receive a receive signal from a second sensor element of the plurality of sensor elements. The receive signal represents a mutual capacitance of the first sensor element and the second sensor element.
    Type: Application
    Filed: February 15, 2017
    Publication date: September 7, 2017
    Applicant: Cypress Semiconductor Corporation
    Inventors: Rajagopal Narayanasamy, Mahadevan Krishnamurthy Narayana Swamy, David G. Wright, Steve Kolokowsky
  • Patent number: 9588626
    Abstract: A method and apparatus include a plurality of sensor elements arranged within an integrated circuit package and a controller arranged within the integrated circuit package and coupled to the plurality of sensor elements. The controller is configured to apply a transmit signal to a first sensor element of the plurality of sensor elements and receive a receive signal from a second sensor element of the plurality of sensor elements. The receive signal represents a mutual capacitance of the first sensor element and the second sensor element.
    Type: Grant
    Filed: February 26, 2015
    Date of Patent: March 7, 2017
    Assignee: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Rajagopal Narayanasamy, Mahadevan Krishnamurthy Narayana Swamy, David G. Wright, Steve Kolokowsky