Patents by Inventor Narayanan Kaniyur

Narayanan Kaniyur has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070067505
    Abstract: A method and an apparatus to prevent over subscription and thrashing of translation lookaside buffer (TLB) entries in I/O virtualization hardware have been presented. In one embodiment, the method includes performing address translation in a direct memory access (DMA) remap engine within an input/output (I/O) hub in response to I/O requests from a root port using a guest physical address (GPA) queue to temporarily hold address translations requests to service the I/O requests and a TLB. The method may further include managing allocation of entries in the TLB to the address translation requests using an allocation window to avoid over-subscription of the entries and managing de-allocation of the entries using a de-allocation window to avoid thrashing of the entries. Other embodiments have been claimed and described.
    Type: Application
    Filed: September 22, 2005
    Publication date: March 22, 2007
    Inventors: Narayanan Kaniyur, Alexander Brown, Percy Wadia, Ronald Dammann
  • Publication number: 20070061549
    Abstract: A method and an apparatus to track address translation in I/O virtualization have been presented. In one embodiment, the method includes initiating a page walk if none of a plurality of entries in a translation lookaside buffer (TLB) in a direct memory access (DMA) remap engine matches a guest physical address of an incoming address translation request. The method further includes performing the page walk in parallel with one or more ongoing page walks and tracking progress of the page walk using one or more of a plurality of flags and state information pertaining to intermediate states of the page walk stored in the TLB. Other embodiments have been claimed and described.
    Type: Application
    Filed: September 15, 2005
    Publication date: March 15, 2007
    Inventors: Narayanan Kaniyur, Perey Wadia, Debendra Sharma, Ronald Dammann
  • Patent number: 6988161
    Abstract: A port configuration mechanism is provided at a host for multiple port allocation and shared resource utilization to support multiple port configurations for different port operation modes on a host to handle data transfers in a switched fabric data network for scalable solutions.
    Type: Grant
    Filed: December 20, 2001
    Date of Patent: January 17, 2006
    Assignee: Intel Corporation
    Inventors: James A. McConnell, Ronald L. Dammann, Robert Chan, Narayanan Kaniyur
  • Publication number: 20030120852
    Abstract: A port configuration mechanism is provided at a host for multiple port allocation and shared resource utilization to support multiple port configurations for different port operation modes on a host to handle data transfers in a switched fabric data network for scalable solutions.
    Type: Application
    Filed: December 20, 2001
    Publication date: June 26, 2003
    Inventors: James A. McConnell, Ronald L. Dammann, Robert Chan, Narayanan Kaniyur