Patents by Inventor Narendra K. Rane

Narendra K. Rane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Structure for window comparator circuit for clock data recovery from bipolar RZ data
    Patent number: 8477896
    Abstract: A clock-data recovery doubler circuit for digitally encoded communications signals is provided. A window comparator includes two thresholds. A clock output is created by the window comparator and also used internally as feedback. Based on the clock output, the window comparator circuit collapses the thresholds while sampling input Bipolar return to zero data.
    Type: Grant
    Filed: January 5, 2011
    Date of Patent: July 2, 2013
    Assignee: International Business Machines Corporation
    Inventors: Santoshkumar Jinagar, Animesh Khare, Ravi Lakshmipathy, Narendra K. Rane, Umesh Shukla, Pradeep K. Vanama
  • AT-SPEED SCAN ENABLE SWITCHING CIRCUIT
    Publication number: 20120176144
    Abstract: A circuit for providing a local scan enable signal includes a first transistor having a first gate coupled to a general scan enable signal, a first source and a first drain and a second transistor having a second gate coupled to a scan clock, a second source coupled to the first drain and a second drain. The circuit also includes a third transistor having a third gate coupled to the general scan enable signal, a third drain coupled to the second drain and a third source and an output stabilizer coupled to the second drain, the output stabilizer including a first inverter and a second inverter coupled together in opposite orientations.
    Type: Application
    Filed: January 7, 2011
    Publication date: July 12, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Vikram Iyengar, Animesh Khare, Michael R. Ouellette, Narendra K. Rane, Umesh K. Shukla, Pradeep K. Vanama
  • DESIGN STRUCTURE FOR WINDOW COMPARATOR CIRCUIT FOR CLOCK DATA RECOVERY FROM BIPOLAR RZ DATA
    Publication number: 20120170698
    Abstract: A clock-data recovery doubler circuit for digitally encoded communications signals is provided. A window comparator includes two thresholds. A clock output is created by the window comparator and also used internally as feedback. Based on the clock output, the window comparator circuit collapses the thresholds while sampling input Bipolar return to zero data.
    Type: Application
    Filed: January 5, 2011
    Publication date: July 5, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Santoshkumar Jinagar, Animesh Khare, Ravi Lakshmipathy, Narendra K. Rane, Umesh Shukla, Pradeep K. Vanama