Abstract: A heat sink for a semiconductor chip device includes cavities in a lower surface thereof for receiving electrical components on a top surface of the semiconductor chip, and a pedestal extending through an opening in the semiconductor chip for contacting electrical components on a bottom surface of the semiconductor chip. A lid may also be provided on the bottom surface of the semiconductor chip for protecting the electrical components and for heat sinking the electrical components to an adjacent device or printed circuit board.

Abstract: Two semiconductor chips are optically aligned to form a hybrid semiconductor device. Both chips have optical waveguides and alignment surface positioned at precisely-defined complementary vertical offsets from optical axes of the corresponding waveguides, so that the waveguides are vertically aligned when one of the chips is placed atop the other with their alignment surface abutting each other. The position of the at least one of the alignment surface in a layer stack of its chip is precisely defined by epitaxy. The chips are bonded at offset bonding pads with the alignment surfaces abutting in the absence of bonding material therebetween.

Abstract: A fiber alignment or “fiberposer” device enables the passive alignment of one or more optical fibers to a photonic integrated circuit (PIC) device using mating hard-stop features etched into the two devices. Accordingly, fiber grooves can be provide separate from the electrical and optical elements, and attached to the PIC with sub-micron accuracy. Fiberposers may also include a hermetic seal for a laser or other device on the PIC. All of these features significantly reduce the typical cost of an actively aligned optical device sealed in an hermetic package.

Abstract: A fiber alignment or “fiberposer” device enables the passive alignment of one or more optical fibers to a photonic integrated circuit (PIC) device using mating hard-stop features etched into the two devices. Accordingly, fiber grooves can be provide separate from the electrical and optical elements, and attached to the PIC with sub-micron accuracy. Fiberposers may also include a hermetic seal for a laser or other device on the PIC. All of these features significantly reduce the typical cost of an actively aligned optical device sealed in an hermetic package.

Abstract: A heat sink for a semiconductor chip device includes cavities in a lower surface thereof for receiving electrical components on a top surface of the semiconductor chip, and a pedestal extending through an opening in the semiconductor chip for contacting electrical components on a bottom surface of the semiconductor chip. A lid may also be provided on the bottom surface of the semiconductor chip for protecting the electrical components and for heat sinking the electrical components to an adjacent device or printed circuit board.

Abstract: Two semiconductor chips are optically aligned to form a hybrid semiconductor device. Both chips have optical waveguides and alignment surface positioned at precisely-defined complementary vertical offsets from optical axes of the corresponding waveguides, so that the waveguides are vertically aligned when one of the chips is placed atop the other with their alignment surface abutting each other. The position of the at least one of the alignment surface in a layer stack of its chip is precisely defined by epitaxy. The chips are bonded at offset bonding pads with the alignment surfaces abutting in the absence of bonding material therebetween.

Abstract: Two semiconductor chips are optically aligned to form a hybrid semiconductor device. Both chips have optical waveguides and alignment surface positioned at precisely-defined complementary vertical offsets from optical axes of the corresponding waveguides, so that the waveguides are vertically aligned when one of the chips is placed atop the other with their alignment surface abutting each other. The position of the at least one of the alignment surface in a layer stack of its chip is precisely defined by epitaxy. The chips are bonded at offset bonding pads with the alignment surfaces abutting in the absence of bonding material therebetween.

Abstract: A heat sink for a semiconductor chip device includes cavities in a lower surface thereof for receiving electrical components on a top surface of the semiconductor chip, and a pedestal extending through an opening in the semiconductor chip for contacting electrical components on a bottom surface of the semiconductor chip. A lid may also be provided on the bottom surface of the semiconductor chip for protecting the electrical components and for heat sinking the electrical components to an adjacent device or printed circuit board.

Abstract: A fiber alignment or “fiberposer” device enables the passive alignment of one or more optical fibers to a photonic integrated circuit (PIC) device using mating hard-stop features etched into the two devices. Accordingly, fiber grooves can be provide separate from the electrical and optical elements, and attached to the PIC with sub-micron accuracy. Fiberposers may also include a hermetic seal for a laser or other device on the PIC. All of these features significantly reduce the typical cost of an actively aligned optical device sealed in an hermetic package.

Abstract: A fiber alignment or “fiberposer” device enables the passive alignment of one or more optical fibers to a photonic integrated circuit (PIC) device using mating hard-stop features etched into the two devices. Accordingly, fiber grooves can be provide separate from the electrical and optical elements, and attached to the PIC with sub-micron accuracy. Fiberposers may also include a hermetic seal for a laser or other device on the PIC. All of these features significantly reduce the typical cost of an actively aligned optical device sealed in an hermetic package.

Abstract: A heat sink for a semiconductor chip device includes cavities in a lower surface thereof for receiving electrical components on a top surface of the semiconductor chip, and a pedestal extending through an opening in the semiconductor chip for contacting electrical components on a bottom surface of the semiconductor chip. A lid may also be provided on the bottom surface of the semiconductor chip for protecting the electrical components and for heat sinking the electrical components to an adjacent device or printed circuit board.

Abstract: Two semiconductor chips are optically aligned to form a hybrid semiconductor device. Both chips have optical waveguides and alignment surface positioned at precisely-defined complementary vertical offsets from optical axes of the corresponding waveguides, so that the waveguides are vertically aligned when one of the chips is placed atop the other with their alignment surface abutting each other. The position of the at least one of the alignment surface in a layer stack of its chip is precisely defined by epitaxy. The chips are bonded at offset bonding pads with the alignment surfaces abutting in the absence of bonding material therebetween.

Abstract: A heat sink for a semiconductor chip device includes cavities in a lower surface thereof for receiving electrical components on a top surface of the semiconductor chip, and a pedestal extending through an opening in the semiconductor chip for contacting electrical components on a bottom surface of the semiconductor chip. A lid may also be provided on the bottom surface of the semiconductor chip for protecting the electrical components and for heat sinking the electrical components to an adjacent device or printed circuit board.

Abstract: Two semiconductor chips are optically aligned to form a hybrid semiconductor device. Both chips have optical waveguides and alignment surface positioned at precisely-defined complementary vertical offsets from optical axes of the corresponding waveguides, so that the waveguides are vertically aligned when one of the chips is placed atop the other with their alignment surface abutting each other. The position of the at least one of the alignment surface in a layer stack of its chip is precisely defined by epitaxy. The chips are bonded at offset bonding pads with the alignment surfaces abutting in the absence of bonding material therebetween.

Abstract: A fiber alignment or “fiberposer” device enables the passive alignment of one or more optical fibers to a photonic integrated circuit (PIC) device using mating hard-stop features etched into the two devices. Accordingly, fiber grooves can be provide separate from the electrical and optical elements, and attached to the PIC with sub-micron accuracy. Fiberposers may also include a hermetic seal for a laser or other device on the PIC. All of these features significantly reduce the typical cost of an actively aligned optical device sealed in an hermetic package.

Abstract: A hybrid pin connecting apparatus and method for connecting a thermally susceptible high-speed optoelectronic device to a PCB, comprising a combination of one or more flat pins or gull wing pins capable of transmitting high-speed electrical signals above 5 Gbps for being locally soldered to one or more matching surface mount pads on the PCB, and a pin grid array capable of transmitting only low-speed electrical signals below 5 Gbps mounted on the substrate for fitting into and connecting to a geometrically matching array of through-hole connections on the PCB.

Abstract: A fiber alignment or “fiberposer” device enables the passive alignment of one or more optical fibers to a photonic integrated circuit (PIC) device using mating hard-stop features etched into the two devices. Accordingly, fiber grooves can be provide separate from the electrical and optical elements, and attached to the PIC with sub-micron accuracy. Fiberposers may also include a hermetic seal for a laser or other device on the PIC. All of these features significantly reduce the typical cost of an actively aligned optical device sealed in an hermetic package.

Abstract: A heat sink for a semiconductor chip device includes cavities in a lower surface thereof for receiving electrical components on a top surface of the semiconductor chip, and a pedestal extending through an opening in the semiconductor chip for contacting electrical components on a bottom surface of the semiconductor chip. A lid may also be provided on the bottom surface of the semiconductor chip for protecting the electrical components and for heat sinking the electrical components to an adjacent device or printed circuit board.

Abstract: A heat sink for a semiconductor chip device includes cavities in a lower surface thereof for receiving electrical components on a top surface of the semiconductor chip, and a pedestal extending through an opening in the semiconductor chip for contacting electrical components on a bottom surface of the semiconductor chip. A lid may also be provided on the bottom surface of the semiconductor chip for protecting the electrical components and for heat sinking the electrical components to an adjacent device or printed circuit board.

Abstract: Two semiconductor chips are optically aligned to form a hybrid semiconductor device. Both chips have optical waveguides and alignment surface positioned at precisely-defined complementary vertical offsets from optical axes of the corresponding waveguides, so that the waveguides are vertically aligned when one of the chips is placed atop the other with their alignment surface abutting each other. The position of the at least one of the alignment surface in a layer stack of its chip is precisely defined by epitaxy. The chips are bonded at offset bonding pads with the alignment surfaces abutting in the absence of bonding material therebetween.