Patents by Inventor Navneeth Kankani

Navneeth Kankani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190250851
    Abstract: Systems and methods are disclosed for writing data to a non-volatile memory (NVM) using a segmented write process. The NVM uses a plurality of program loops to write data to the NVM. The NVM groups the plurality of program loops into a plurality of write segments, and each write segment includes a distinct set of the plurality of program loops. The write segments are separated by a dwell time that allows read access before the data is written to the NVM.
    Type: Application
    Filed: February 15, 2018
    Publication date: August 15, 2019
    Inventors: Navneeth Kankani, Sarath Chandran Puthen Thermadam, Namasivayam Raghunathan
  • Publication number: 20190243567
    Abstract: Disclosed is a system and method for providing host adjustable performance parameters for SSDs. The method includes accessing a latency profile based on a determined device age of a solid state drive (SSD). The method also includes providing for display a user interface comprising a plurality of interface elements to adjust a respective plurality of performance specifications of the SSD, wherein the user interface is configured based on the latency profile. The method also includes receiving, via the user interface, an adjustment to the plurality of performance specifications. The method also includes sending an instruction to the SSD to configure the SSD with a parameter set based on the adjusted plurality of performance specifications.
    Type: Application
    Filed: March 13, 2018
    Publication date: August 8, 2019
    Inventors: Navneeth KANKANI, Linh Tien Truong
  • Patent number: 10026492
    Abstract: Systems and methods for improving the reliability of data stored in memory cells are described. To mitigate the effects of trapped electrons after one or more programming pulses have been applied to memory cells, a delay between the one or more programming pulses and subsequent program verify pulses may be set based on a chip temperature, the number of the one or more programming pulses that were applied to the memory cells, and/or the programming voltage that was applied to the memory cells during the one or more programming pulses. To mitigate the effects of residual electrons after one or more program verify pulses have been applied to memory cells, a delay between the one or more program verify pulses and subsequent programming pulses may be set based on a chip temperature and/or the programming voltage to be applied to the memory cells during the subsequent programming pulses.
    Type: Grant
    Filed: July 2, 2017
    Date of Patent: July 17, 2018
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Deepanshu Dutta, Arash Hazeghi, Huai-Yuan Tseng, Cynthia Hsu, Navneeth Kankani
  • Publication number: 20180060230
    Abstract: Apparatuses, systems, methods, and computer program products are disclosed for annealing non-volatile memory. A controller identifies one or more life cycle characteristics of a non-volatile storage element. The controller selects an anneal duration and an anneal temperature for annealing the non-volatile storage element. The anneal duration and the anneal temperature are based on the one or more life cycle characteristics. The controller anneals the non-volatile storage element using the selected anneal duration and anneal temperature.
    Type: Application
    Filed: August 25, 2016
    Publication date: March 1, 2018
    Applicant: SanDisk Technologies LLC
    Inventors: Navneeth Kankani, Linh Truong, Sarath Puthenthermadam, Deepanshu Dutta
  • Patent number: 9898364
    Abstract: A memory controller configures a plurality of word lines associated with a respective block of a 3D memory device in a first configuration, where the first configuration includes a set of configuration parameters for each word line of the plurality of word lines determined at least in part on the vertical positions of each word line relative to a substrate of the 3D memory device and, while the plurality of word lines are configured in the first configuration, writes data to and reads data from the respective block. For the respective block, the memory controller: adjusts a first parameter in the respective set of configuration parameters corresponding to a respective word line of the plurality of word lines in response to detecting a first trigger condition as to the respective word line and, after adjusting the first parameter, writes data to and reads data from the respective word line.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: February 20, 2018
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: James M. Higgins, Robert W. Ellis, Neil R. Darragh, Aaron K. Olbrich, Navneeth Kankani, Steven Sprouse
  • Patent number: 9891844
    Abstract: Systems, methods, and/or devices are used to implement variable bit encoding to improve device endurance and extend life of storage devices. In some embodiments, the method includes determining a current endurance metric for a plurality of non-volatile memory portions configured to store data encoded in a first encoding format and determining an estimated endurance metric for the plurality of non-volatile memory portions (e.g., corresponding to estimated endurance after reconfiguration of the one or more portions to store data encoded in a second encoding format), and in accordance with a determination that reconfiguration criteria are satisfied (e.g., the estimated endurance metric comprises an improvement over the current endurance metric), reconfiguring the one or more portions to store data encoded in the second encoding format.
    Type: Grant
    Filed: April 11, 2017
    Date of Patent: February 13, 2018
    Assignee: SanDisk Technologies LLC
    Inventors: Navneeth Kankani, Linh Tien Truong
  • Patent number: 9864525
    Abstract: Systems, methods, and/or devices are used to implement variable bit encoding per NAND flash cell to extend life of flash-based storage devices and preserve over-provisioning. In some embodiments, the method includes detecting a trigger condition with respect to one or more non-volatile memory portions (e.g., portions configured to store data encoded in a first encoding format and having a first storage density) of a plurality of non-volatile memory portions of a storage device. In response to detecting the trigger condition and in accordance with a first determination that a projected amount of over-provisioning (e.g., corresponding to over-provisioning for the storage device after reconfiguring the one or more non-volatile memory portions to store data encoded in a second encoding format and having a second storage density) meets predefined over-provisioning criteria, the method includes reconfiguring the one or more non-volatile memory portions to store data encoded in the second encoding format.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: January 9, 2018
    Assignee: SanDisk Technologies LLC
    Inventors: Navneeth Kankani, Linh Tien Truong
  • Publication number: 20170309344
    Abstract: Systems and methods for improving the reliability of data stored in memory cells are described. To mitigate the effects of trapped electrons after one or more programming pulses have been applied to memory cells, a delay between the one or more programming pulses and subsequent program verify pulses may be set based on a chip temperature, the number of the one or more programming pulses that were applied to the memory cells, and/or the programming voltage that was applied to the memory cells during the one or more programming pulses. To mitigate the effects of residual electrons after one or more program verify pulses have been applied to memory cells, a delay between the one or more program verify pulses and subsequent programming pulses may be set based on a chip temperature and/or the programming voltage to be applied to the memory cells during the subsequent programming pulses.
    Type: Application
    Filed: July 2, 2017
    Publication date: October 26, 2017
    Applicant: SANDISK TECHNOLOGIES LLC
    Inventors: Deepanshu Dutta, Arash Hazeghi, Huai-Yuan Tseng, Cynthia Hsu, Navneeth Kankani
  • Patent number: 9761290
    Abstract: Apparatuses, systems, methods, and computer program products are disclosed for preventing overheating, for annealing non-volatile memory. An apparatus may include an array of non-volatile storage elements. A heating element may be configured to heat a first set of the non-volatile storage elements to anneal the first set of non-volatile storage elements. A heat shield or cooling element may be configured to prevent a second set of the non-volatile storage elements from overheating during annealing of the first set of non-volatile storage elements, to mitigate data errors for data stored on the second set of non-volatile storage elements.
    Type: Grant
    Filed: August 25, 2016
    Date of Patent: September 12, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Navneeth Kankani, Ning Ye, Suresh Upadhyayula, Sarath Puthenthermadam, Deepanshu Dutta
  • Publication number: 20170220269
    Abstract: Systems, methods, and/or devices are used to implement variable bit encoding to improve device endurance and extend life of storage devices. In some embodiments, the method includes determining a current endurance metric for a plurality of non-volatile memory portions configured to store data encoded in a first encoding format and determining an estimated endurance metric for the plurality of non-volatile memory portions (e.g., corresponding to estimated endurance after reconfiguration of the one or more portions to store data encoded in a second encoding format), and in accordance with a determination that reconfiguration criteria are satisfied (e.g., the estimated endurance metric comprises an improvement over the current endurance metric), reconfiguring the one or more portions to store data encoded in the second encoding format.
    Type: Application
    Filed: April 11, 2017
    Publication date: August 3, 2017
    Inventors: Navneeth Kankani, Linh Tien Truong
  • Patent number: 9721672
    Abstract: Systems and methods for improving the reliability of data stored in memory cells are described. To mitigate the effects of trapped electrons after one or more programming pulses have been applied to memory cells, a delay between the one or more programming pulses and subsequent program verify pulses may be set based on a chip temperature, the number of the one or more programming pulses that were applied to the memory cells, and/or the programming voltage that was applied to the memory cells during the one or more programming pulses. To mitigate the effects of residual electrons after one or more program verify pulses have been applied to memory cells, a delay between the one or more program verify pulses and subsequent programming pulses may be set based on a chip temperature and/or the programming voltage to be applied to the memory cells during the subsequent programming pulses.
    Type: Grant
    Filed: April 15, 2016
    Date of Patent: August 1, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Deepanshu Dutta, Arash Hazeghi, Huai-Yuan Tseng, Cynthia Hsu, Navneeth Kankani
  • Publication number: 20170168713
    Abstract: Systems, methods, and/or devices are used to implement variable bit encoding per NAND flash cell to extend life of flash-based storage devices and preserve over-provisioning. In some embodiments, the method includes detecting a trigger condition with respect to one or more non-volatile memory portions (e.g., portions configured to store data encoded in a first encoding format and having a first storage density) of a plurality of non-volatile memory portions of a storage device. In response to detecting the trigger condition and in accordance with a first determination that a projected amount of over-provisioning (e.g., corresponding to over-provisioning for the storage device after reconfiguring the one or more non-volatile memory portions to store data encoded in a second encoding format and having a second storage density) meets predefined over-provisioning criteria, the method includes reconfiguring the one or more non-volatile memory portions to store data encoded in the second encoding format.
    Type: Application
    Filed: February 24, 2017
    Publication date: June 15, 2017
    Inventors: Navneeth Kankani, Linh Tien Truong
  • Patent number: 9645749
    Abstract: A storage system includes a memory controller and a storage device with one or more memory devices, each with a plurality of memory portions. The memory controller determines an initial storage capacity for each of the one or more memory devices, where the one or more memory devices are configured in a first storage density. The memory controller detects a trigger condition as to at least one memory portion of a respective device of the one or more memory devices and, in response to detecting the trigger condition, recharacterizes the at least one memory portion of the respective memory device so as to be configured in a second storage density, where the at least one recharacterized memory portion of the respective memory device has a reduced storage capacity. After the recharacterizing, the memory controller determines a revised storage capacity for the respective memory device.
    Type: Grant
    Filed: July 1, 2014
    Date of Patent: May 9, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Linh Tien Truong, Allen Samuels, Navneeth Kankani
  • Patent number: 9639463
    Abstract: The various implementations described herein include systems, methods and/or devices used to enable heuristic aware garbage collection in storage systems (e.g., non-volatile data storage systems using one or more flash memory devices). In one aspect, a time parameter (e.g., dwell time) and/or heuristics (e.g., error count, error rate, number of reads, number of times programmed, etc.) are used in a garbage collection scheme. For example, in some implementations, the method of garbage collection for a storage medium in a storage system includes (1) determining a time parameter for a block in the storage medium, and (2) in accordance with a determination that the time parameter for the block is greater than a first threshold time, enabling garbage collection of the block.
    Type: Grant
    Filed: September 17, 2013
    Date of Patent: May 2, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Navneeth Kankani, Anand Kulkarni, Charles See Yeung Kwong
  • Patent number: 9639282
    Abstract: Systems, methods, and/or devices are used to implement variable bit encoding to improve device endurance and extend life of storage devices. In some embodiments, the method includes detecting a trigger condition with respect to one or more non-volatile memory portions (e.g., portions configured to store data encoded in a first encoding format) of a plurality of non-volatile memory portions of a storage device. In accordance with detecting the trigger condition, the method includes: determining a current and an estimated endurance metric for the plurality of non-volatile memory portions (e.g., corresponding to estimated endurance after reconfiguration of the one or more portions to store data encoded in a second encoding format), and in accordance with a determination that reconfiguration criteria are satisfied (e.g., the estimated endurance metric comprises an improvement over the current endurance metric), reconfiguring the one or more portions to store data encoded in the second encoding format.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: May 2, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Navneeth Kankani, Linh Tien Truong
  • Patent number: 9606737
    Abstract: Systems, methods, and/or devices are used to implement variable bit encoding per NAND flash cell to extend life of flash-based storage devices and preserve over-provisioning. In some embodiments, the method includes detecting a trigger condition with respect to one or more non-volatile memory portions (e.g., portions configured to store data encoded in a first encoding format and having a first storage density) of a plurality of non-volatile memory portions of a storage device. In response to detecting the trigger condition and in accordance with a first determination that a projected amount of over-provisioning (e.g., corresponding to over-provisioning for the storage device after reconfiguring the one or more non-volatile memory portions to store data encoded in a second encoding format and having a second storage density) meets predefined over-provisioning criteria, the method includes reconfiguring the one or more non-volatile memory portions to store data encoded in the second encoding format.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: March 28, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Navneeth Kankani, Linh Tien Truong
  • Publication number: 20160342344
    Abstract: Systems, methods, and/or devices are used to implement variable bit encoding per NAND flash cell to extend life of flash-based storage devices and preserve over-provisioning. In some embodiments, the method includes detecting a trigger condition with respect to one or more non-volatile memory portions (e.g., portions configured to store data encoded in a first encoding format and having a first storage density) of a plurality of non-volatile memory portions of a storage device. In response to detecting the trigger condition and in accordance with a first determination that a projected amount of over-provisioning (e.g., corresponding to over-provisioning for the storage device after reconfiguring the one or more non-volatile memory portions to store data encoded in a second encoding format and having a second storage density) meets predefined over-provisioning criteria, the method includes reconfiguring the one or more non-volatile memory portions to store data encoded in the second encoding format.
    Type: Application
    Filed: October 30, 2015
    Publication date: November 24, 2016
    Inventors: Navneeth Kankani, Linh Tien Truong
  • Publication number: 20160342345
    Abstract: Systems, methods, and/or devices are used to implement variable bit encoding to improve device endurance and extend life of storage devices. In some embodiments, the method includes detecting a trigger condition with respect to one or more non-volatile memory portions (e.g., portions configured to store data encoded in a first encoding format) of a plurality of non-volatile memory portions of a storage device. In accordance with detecting the trigger condition, the method includes: determining a current and an estimated endurance metric for the plurality of non-volatile memory portions (e.g., corresponding to estimated endurance after reconfiguration of the one or more portions to store data encoded in a second encoding format), and in accordance with a determination that reconfiguration criteria are satisfied (e.g., the estimated endurance metric comprises an improvement over the current endurance metric), reconfiguring the one or more portions to store data encoded in the second encoding format.
    Type: Application
    Filed: October 30, 2015
    Publication date: November 24, 2016
    Inventors: Navneeth Kankani, Linh Tien Truong
  • Patent number: 9361221
    Abstract: The various implementations described herein include systems, methods and/or devices used to enable write amplification reduction through reliable writes during garbage collection. In one aspect, lower page/upper page programming is used during write operations performed in response to a host command and coarse/fine programming is used during garbage collection.
    Type: Grant
    Filed: September 17, 2013
    Date of Patent: June 7, 2016
    Assignee: SANDISK TECHNOLOGIES INC.
    Inventors: Navneeth Kankani, Charles See Yeung Kwong
  • Patent number: 9244763
    Abstract: The various implementations described herein include systems, methods and/or devices that may enhance the reliability with which data can be stored in and read from a memory. The method includes obtaining symbol transition information corresponding to symbol read errors identified while reading data from flash memory cells in a flash memory device. The method further includes determining a reading threshold voltage offset, based at least in part on: a plurality of probability values determined from the symbol transition information; a current count of program-erase cycles; and a word line zone value for a word line zone containing the flash memory cells. Additionally, the method includes generating an updated reading threshold voltage in accordance with the reading threshold voltage offset and the current value of the reading threshold voltage.
    Type: Grant
    Filed: September 17, 2013
    Date of Patent: January 26, 2016
    Assignee: SANDISK ENTERPRISE IP LLC
    Inventors: Navneeth Kankani, Charles See Yeung Kwong