Abstract: An electric circuit arrangement to determine a level of an excess bias voltage of a single photon avalanche diode comprises an evaluation circuit being configured to determine a level of an excess bias voltage of the single photon avalanche diode in dependence on a signal course of an output signal of the single photon avalanche diode. In a first operational cycle of the circuit arrangement a voltage jump to the level of the excess bias voltage is generated at an output terminal, when a photon hits a photosensitive area of the single photon avalanche diode. In a subsequent second operational cycle, the output terminal of the single photon avalanche diode is coupled to a supply terminal.

Abstract: The SPAD device comprises a single-photon avalanche diode and a further single-photon avalanche diode having breakdown voltages, the single-photon avalanche diodes being integrated in the same device. The breakdown voltages are equal or differ by less than 10%. The single-photon avalanche diode is configured to enable to induce triggering or to have a dark count rate that is higher than the dark count rate of the further single-photon avalanche diode.

Abstract: A charge pump circuit arrangement includes a multitude of capacitors of a first and a second group controlled by non-overlapping clock pulses. The capacitors are partly realized in a semiconductor substrate including a deep well doping region and a high voltage doping region surrounded by the deep well doping region. Switches are connected to a pair of capacitors to control the deep well doping regions with signals in phase with the corresponding clock signal.

Abstract: The semiconductor device comprises a bipolar transistor with emitter, base and collector, a current or voltage source electrically connected with the emitter, and a quenching component electrically connected with the collector, the bipolar transistor being configured for operation at a collector-to-base voltage above the breakdown voltage.

Abstract: An electric circuit arrangement to determine a level of an excess bias voltage of a single photon avalanche diode comprises an evaluation circuit being configured to determine a level of an excess bias voltage of the single photon avalanche diode in dependence on a signal course of an output signal of the single photon avalanche diode. In a first operational cycle of the circuit arrangement a voltage jump to the level of the excess bias voltage is generated at an output terminal, when a photon hits a photosensitive area of the single photon avalanche diode. In a subsequent second operational cycle, the output terminal of the single photon avalanche diode is coupled to a supply terminal.

Abstract: A avalanche diode arrangement comprises an avalanche diode (11) that is coupled to a first voltage terminal (14) and to a first node (15), a latch comparator (12) with a first input (16) coupled to the first node (15), a second input (17) for receiving a reference voltage (VREF) and an enable input (21) for receiving a comparator enable signal (CLK), and a quenching circuit (13) coupled to the first node (15).

Abstract: A charge pump circuit arrangement includes a multitude of capacitors of a first and a second group controlled by non-overlapping clock pulses. The capacitors are partly realized in a semiconductor substrate including a deep well doping region and a high voltage doping region surrounded by the deep well doping region. Switches are connected to a pair of capacitors to control the deep well doping regions with signals in phase with the corresponding clock signal.

Abstract: The device comprises a bipolar transistor with emitter, base, collector, base-collector junction and base-emitter junction, a collector-to-base breakdown voltage, a quenching component electrically connected with the base or the collector, and a switching circuitry configured to apply a forward bias to the base-emitter junction. The bipolar transistor is configured for operation at a reverse collector-to-base voltage above the breakdown voltage.

Abstract: The semiconductor device comprises a bipolar transistor with emitter, base and collector, a current or voltage source electrically connected with the emitter, and a quenching component electrically connected with the collector, the bipolar transistor being configured for operation at a collector-to-base voltage above the breakdown voltage.

Abstract: A avalanche diode arrangement comprises an avalanche diode (11) that is coupled to a first voltage terminal (14) and to a first node (15), a latch comparator (12) with a first input (16) coupled to the first node (15), a second input (17) for receiving a reference voltage (VREF) and an enable input (21) for receiving a comparator enable signal (CLK), and a quenching circuit (13) coupled to the first node (15).

Abstract: The device comprises a bipolar transistor with emitter, base, collector, base-collector junction and base-emitter junction, a collector-to-base breakdown voltage, a quenching component electrically connected with the base or the collector, and a switching circuitry configured to apply a forward bias to the base-emitter junction. The bipolar transistor is configured for operation at a reverse collector-to-base voltage above the breakdown voltage.

Abstract: The SPAD device comprises a single-photon avalanche diode and a further single-photon avalanche diode having breakdown voltages, the single-photon avalanche diodes being integrated in the same device. The breakdown voltages are equal or differ by less than 10%. The single-photon avalanche diode is configured to enable to induce triggering or to have a dark count rate that is higher than the dark count rate of the further single-photon avalanche diode.