Abstract: A non-volatile memory system includes technology for detecting read disturb in open blocks. In one embodiment, the system determines whether a particular block of non-volatile memory cells has been subjected to a minimum number of open block read operations and performs sensing operations for memory cells connected to an open word line of the particular block. The number of errors in the sensed data is determined. If the number of errors is greater than a limit, then the system takes an action to mitigate the read disturb.

Abstract: Techniques disclosed herein cope with cross-temperature effects in non-volatile memory systems. One technology disclosed herein includes an apparatus and method that scrubs a block of non-volatile memory cells responsive to a determination that variance in word line program temperatures in the block exceeds a threshold. Such blocks having large variance in programming temperatures for different word lines can potentially have high BERs when reading. This may be due to the difficulty in having one set of read levels that are optimum for all word lines in the block.

Abstract: A non-volatile storage system is proposed with an efficient process for recovering from programming failures. In response to determining that a program fault occurred, and prior to completing the programming, the system programs data associated with the program fault to a back-up location. After programming the data associated with the program fault to the back-up location, the system continues programming including programming data that has not yet been subject of a programming process to the back-up location. After completing the programming process, the system moves already programmed data near the location of the program fault to the back-up location.

Abstract: The present disclosure discloses a memory device including a controller for handling thermal shutdown of the memory device. The control system acquires temperatures of a plurality of non-volatile memory elements in the memory device from one or more temperature detectors at a first frequency. Upon determining that the temperature of one of the plurality of non-volatile memory elements is above a threshold, the controller activates thermal throttling for the plurality of non-volatile memory elements and flushes metadata from a volatile memory element in the memory device to the plurality of non-volatile memory elements for future recovery of the memory device.

Abstract: Techniques are provided for measuring the endurance of a set of data memory cells by evaluating the threshold voltage (Vth) of associated dummy memory cells. A cell has a high endurance or good data retention if it is able to maintain the charges. However, there can be a variation in the endurance of cells even within a single die. By evaluating the dummy memory cells, an early warning can be obtained of a degradation of the data memory cells. Moreover, there is no interference with the operation of the data memory cells. Based on a number of dummy memory cells which have a Vth below a demarcation voltage, a corrective action is taken such as adjusting read voltages, an initial program voltage and/or an initial erase voltage, or marking the block as being bad and recovering the data.

Abstract: A data storage device may be configured to write first data to a first set of storage elements of a non-volatile memory and to write second data to a second set of storage elements of the non-volatile memory. The first data may be processed by a data shaping operation, and the second data may not be processed by the data shaping operation. The data storage device may be further configured to read a representation of the second data from the second set of storage cells and to determine a block health metric of a portion of the non-volatile memory based on the representation of the second data. The portion may include the first set of storage elements and the second set of storage elements. As an illustrative, non-limiting example, the first portion may be a first block of the non-volatile memory.

Abstract: A data storage device is configured to mark data for refresh in response to determining that a first measured temperature associated with writing the data to the memory exceeds a first threshold. The data storage device is further configured to refresh the marked data in response to determining that a second measured temperature associated with the memory is below a second threshold.

Abstract: A device includes a memory device and a controller. The controller is coupled to the memory device. The controller is configured to, in response to receiving a request to perform a memory access at the memory device, determine that the memory device has a characteristic indicative of a temperature crossing. The controller is also configured to, in response to determining that the memory device has the characteristic indicative of the temperature crossing, determine that the memory device satisfies an availability criterion. The controller is further configured to, in response to determining that the memory device satisfies the availability criterion, increase a temperature of the memory device by performing memory operations on the memory device until detecting a condition related to the temperature.

Abstract: A storage system and method for temperature throttling for block reading are provided. In one embodiment, a storage system is provided comprising a memory comprising a plurality of word lines and a controller in communication with the memory. The controller is configured to determine whether a temperature of the memory is above a first threshold temperature; and in response to determining that the temperature of the memory is above the first threshold temperature: apply a voltage to the plurality of word lines; and after the voltage has been applied, read one of the plurality of word lines. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

Abstract: A storage system and method for temperature throttling for block reading are provided. In one embodiment, a storage system is provided comprising a memory comprising a plurality of word lines and a controller in communication with the memory. The controller is configured to determine whether a temperature of the memory is above a first threshold temperature; and in response to determining that the temperature of the memory is above the first threshold temperature: apply a voltage to the plurality of word lines; and after the voltage has been applied, read one of the plurality of word lines. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

Abstract: A memory system or flash card may include a dynamic system-level process for the management of blocks in the different memory pools. There may be spare blocks available to the pools that are over provisioned to the pool which increases the efficiency of data compaction and helps reduce the average hot count for that pool and compensate for the grown defects. The block wear and grown defects in each memory pool may be tracked so that remaining spare blocks can be re-allocated.

Abstract: The various implementations described herein include systems, methods and/or devices used to enable multi-phase erasure in a storage device. The method includes performing an erase operation on a portion of one or more non-volatile memory devices, by performing a sequence of erase phase operations until an erase operation stop condition is satisfied. Each erase phase operation includes: performing an erase phase on the portion of the non-volatile memory devices using an erase voltage, and determining an erase phase statistic for the erase phase. For each erase phase operation in the sequence of erase phase operations, other than a first erase phase operation, the erase voltage used when performing the erase phase operation is equal to the erase voltage used when performing a prior erase phase operation in the sequence of erase phase operations plus an erase voltage increment based on the erase phase statistic for the prior erase phase operation.

Abstract: A storage system and method for reducing XOR recovery time are provided. In one embodiment, a storage system is provides comprising a memory and a controller. The controller is configured to generate a first exclusive-or (XOR) parity for pages of data written to the memory; after the first XOR parity has been generated, determine that there is at least one page of invalid data in the pages of data written to the memory; and generate a second XOR parity for the pages of data that excludes the at least one page of invalid data, wherein the second XOR parity is generated by performing an XOR operation using the first XOR parity and the at least one page of invalid data as inputs. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

Abstract: Techniques are provided for measuring the endurance of a set of data memory cells by evaluating the threshold voltage (Vth) of associated dummy memory cells. A cell has a high endurance or good data retention if it is able to maintain the charges. However, there can be a variation in the endurance of cells even within a single die. By evaluating the dummy memory cells, an early warning can be obtained of a degradation of the data memory cells. Moreover, there is no interference with the operation of the data memory cells. Based on a number of dummy memory cells which have a Vth below a demarcation voltage, a corrective action is taken such as adjusting read voltages, an initial program voltage and/or an initial erase voltage, or marking the block as being bad and recovering the data.

Abstract: A non-volatile memory system includes a plurality of non-volatile data memory cells arranged into groups of data memory cells, a plurality of select devices connected to the groups of data memory cells, a selection line connected to the select devices, a plurality of data word lines connected to the data memory cells, and one or more control circuits connected to the selection line and the data word lines. The one or more control circuits are configured to determine whether the select devices are corrupted. If the select devices are corrupted, then the one or more control circuits repurpose one of the word lines (e.g., the first data word line closet to the select devices) to be another selection line, thus operating the memory cells connected to the repurposed word line as select devices.

Abstract: A non-volatile storage system identifies a word line with an open neighbor word line and determines whether data stored in non-volatile memory cells connected to the identified word line has an error condition. If the data does have an error condition, then an attempt is made to fix the data and the open neighbor word line is checked for errors. If the open neighbor word line has errors, then memory cells connected to the open neighbor word line are programmed with pseudo data.

Abstract: A non-volatile memory system includes technology for detecting read disturb in open blocks. In one embodiment, the system determines whether a particular block of non-volatile memory cells has been subjected to a minimum number of open block read operations and performs sensing operations for memory cells connected to an open word line of the particular block. The number of errors in the sensed data is determined. If the number of errors is greater than a limit, then the system takes an action to mitigate the read disturb.

Abstract: In an illustrative example, a data storage device includes a non-volatile memory and a controller coupled to the non-volatile memory. The controller includes an erasure correcting code engine configured to generate first erasure recovery data and temporary erasure recovery data in a volatile memory at least partially based on first data to be written to the non-volatile memory. The first erasure recovery data is configured to enable a first type of data recovery of the first data, and the temporary erasure recovery data is configured to enable a second type of data recovery of the first data. The controller is further configured to store the first erasure recovery data and the temporary erasure recovery data in the volatile memory and, after verifying that the first data is stored in the non-volatile memory, to discard or modify the temporary erasure recovery data.

Abstract: A device includes a memory device and a controller. The controller is coupled to the memory device. The controller is configured to, in response to receiving a request to perform a memory access at the memory device, determine that the memory device has a characteristic indicative of a temperature crossing. The controller is also configured to, in response to determining that the memory device has the characteristic indicative of the temperature crossing, determine that the memory device satisfies an availability criterion. The controller is further configured to, in response to determining that the memory device satisfies the availability criterion, increase a temperature of the memory device by performing memory operations on the memory device until detecting a condition related to the temperature.

Abstract: A first phase of a programming process is performed to program data into a set of non-volatile memory cells using a set of verify references and allowing for a first number of programming errors. After completing the first phase of programming, an acknowledgement is provided to the host that the programming was successful. The memory system reads the data from the set of non-volatile memory cells and uses an error correction process to identify and correct error bits in the data read. When the memory system is idle and after the acknowledgement is provided to the host, the memory system performs a second phase of the programming process to program the corrected error bits into the set of the non-volatile memory cells using the same set of verify references and allowing for a second number of programming errors.