Patents by Inventor Nianqi YAO

Nianqi YAO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230015871
    Abstract: A thin film transistor, a manufacturing method thereof, an array substrate and an electronic device arc provided. The thin film transistor includes an active layer including multiple oxide layers which includes a channel layer, a transition layer and a first barrier layer, the channel layer is an layer with a highest carrier mobility, the channel layer is a crystalline or amorphous oxide layer, the transition layer is in direct contact with the channel layer, the first barrier layer is an outermost oxide layer, the first barrier layer and the transition layer are both crystalline oxide layers; a crystallization degree of the first barrier layer and a crystallization degree of the transition layer are greater than a crystallization degree of the channel layer, and a band gap of the first barrier layer and a band gap of the transition layer are larger than a band gap of the channel layer.
    Type: Application
    Filed: May 27, 2021
    Publication date: January 19, 2023
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Jie Huang, Ce Ning, Zhengliang Li, Hehe Hu, Jiayu He, Nianqi Yao, Feng Qu, Xiaochun Xu
  • Publication number: 20230006070
    Abstract: A semiconductor substrate manufacturing method and a semiconductor substrate. The manufacturing method includes: forming a first semiconductor layer on the base substrate at a first temperature with a first oxide semiconductor material; forming the second semiconductor layer directly on the first semiconductor layer with a second oxide semiconductor material; and performing a patterning process such that the first semiconductor layer and the second semiconductor layer are respectively patterned into a seed layer and a first channel layer. Both the first oxide semiconductor material and the second oxide semiconductor material are capable of forming crystalline phases at a second temperature, the second temperature is less than or equal to 40° C., and the first temperature is greater than or equal to 100° C.
    Type: Application
    Filed: May 27, 2021
    Publication date: January 5, 2023
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Jie Huang, Ce Ning, Zhengliang Li, Hehe Hu, Jiayu He, Nianqi Yao, Kun Zhao, Feng Qu, Xiaochun Xu
  • Publication number: 20220352283
    Abstract: An organic electroluminescent display substrate is provided, which includes a base substrate, and a light-emitting unit and a light-sensing unit arranged on the base substrate, wherein the light-sensing unit is arranged on a light-emitting side of the light-emitting unit, and configured for sensing an intensity of light emitted from the light-emitting unit; a first planarization layer is arranged between the light-sensing unit and the light-emitting unit; the light-sensing unit comprises a first thin film transistor and a photosensitive sensor arranged sequentially in that order in a direction away from the base substrate, and a second planarization layer is arranged between the photosensitive sensor and the first thin film transistor. A display panel, a display device and a method for manufacturing the organic electroluminescent display substrate are further provided.
    Type: Application
    Filed: November 13, 2020
    Publication date: November 3, 2022
    Inventors: Jiayu HE, Ce NING, Zhengliang LI, Hehe HU, Jie HUANG, Nianqi YAO, Xue LIU
  • Publication number: 20220344517
    Abstract: A thin film transistor includes a gate electrode, an active layer, a gate insulating layer located between the gate electrode and the active layer, and a source electrode and a drain electrode electrically connected to the active layer. The active layer includes a channel layer and at least one channel protection layer; a material of each of the channel layer and the at least one channel protection layer is a metal oxide semiconductor material. The at least one channel protection layer is a crystallizing layer, and metal elements of the at least one channel protection layer include non-rare earth metal elements including In, Ga, Zn and Sn.
    Type: Application
    Filed: April 30, 2021
    Publication date: October 27, 2022
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Jie Huang, Zhengliang Li, Ce Ning, Hehe Hu, Nianqi Yao, Kun Zhao, Fengjuan Liu, Tianmin Zhou, Liping Lei
  • Publication number: 20220278162
    Abstract: An array substrate includes a substrate, the array substrate includes a display region and a detection region. And the detection region includes a thin film transistor located on the substrate and a photodiode located on one side of the thin film transistor away from the substrate, and the array substrate further includes a first inorganic protective layer, an organic protective layer and a second inorganic protective layer located between the thin film transistor and the photodiode. And the first inorganic protective layer, the organic protective layer and the second inorganic protective layer are stacked in sequence in a direction away from the substrate, and an orthographic projection of the photodiode on the substrate is within the range of the orthographic projection of the organic protective layer on the substrate.
    Type: Application
    Filed: August 24, 2021
    Publication date: September 1, 2022
    Inventors: Jiayu HE, Ce NING, Zhengliang LI, Hehe HU, Jie HUANG, Nianqi YAO, Kun ZHAO
  • Publication number: 20220223745
    Abstract: A thin film transistor, a manufacturing method thereof, a display substrate, and a display device are provided. The thin film transistor includes: a substrate, an active layer, a gate, a source and a drain. The active layer is arranged on the substrate and formed as a grid, including silicon nanowires extending along a first direction, the active layer includes source and drain regions oppositely arranged along the first direction, and a channel region located therebetween. The gate is arranged on the substrate, and an orthographic projection of the gate onto the substrate overlaps with orthographic projections for silicon nanowires in the channel region onto the substrate. The source and drain are arranged on the substrate, the source contacts silicon nanowires in the source region, and the drain contacts silicon nanowires in the drain region.
    Type: Application
    Filed: May 18, 2021
    Publication date: July 14, 2022
    Inventors: Jiayu HE, Ce NING, Zhengliang LI, Hehe HU, Jie HUANG, Nianqi YAO, Zhi WANG, Feng GUAN
  • Publication number: 20220208070
    Abstract: A shift register unit includes an input sub-circuit, a pull-down node driving sub-circuit and an output sub-circuit. The pull-down node driving sub-circuit includes a first connection unit, a first voltage-reduction unit and a second connection unit, and configured to: under the control of the first voltage signal terminal and the pull-up node, transmit a first voltage signal from the first voltage signal terminal to the first pull-down node via the first connection unit, and reduce a voltage applied to the second connection unit via the first voltage-reduction unit; and transmit a second voltage signal from the second voltage signal terminal to the first pull-down node via the second connection unit under the control of the pull-up node.
    Type: Application
    Filed: November 24, 2021
    Publication date: June 30, 2022
    Inventors: Shuilang DONG, Shanshan XU, Guangcai YUAN, Zhanfeng CAO, Ce NING, Lizhong WANG, Dapeng XUE, Nianqi YAO
  • Publication number: 20220186359
    Abstract: A fixture, a tray and a sputtering system. The fixture is internally provided with a support structure and a clamping structure connected with each other, wherein the clamping structure is configured to clamp a to-be-sputtered substrate; an orthographic projection of the clamping structure on a plane where the support structure is located and the support structure share an superimposed area and are separate in non-superimposed areas; wherein the support structure located in the non-superimposed area and/or the clamping structure located in the non-superimposed area has a first hollowed structure. The fixture is internally provided with the first hollowed structure, such that a part of an area of the to-be-sputtered substrate covered by the fixture may be exposed via the first hollowed structure when the fixture holds the to-be-sputtered substrate, so as to reduce the area of the to-be-sputtered substrate covered by the fixture.
    Type: Application
    Filed: September 24, 2021
    Publication date: June 16, 2022
    Inventors: Nianqi YAO, Ce NING, Zhengliang LI, Hehe HU, Dapeng XUE, Lizhong WANG, Shuilang DONG, Jie HUANG, Jiayu HE, Lubin SHI, Yancai LI
  • Publication number: 20220131009
    Abstract: An oxide thin film transistor includes: a gate electrode, a metal oxide active layer and a source-drain metal layer, which are on a base substrate. The metal oxide active layer includes a first metal oxide layer and a second metal oxide layer stacked on the first metal oxide layer in a direction away from the base substrate; the first metal oxide layer is a carrier transport layer; the second metal oxide layer is a carrier isolation layer; an electron transfer rate of the carrier transport layer is greater than an electron transfer rate of the carrier isolation layer. The first metal oxide layer includes a primary surface facing toward the base substrate and a primary surface away from the base substrate; the first metal oxide layer further includes a lateral surface around the primary surfaces; the second metal oxide layer covers the lateral surface of the first metal oxide layer.
    Type: Application
    Filed: June 23, 2021
    Publication date: April 28, 2022
    Inventors: Lizhong WANG, Tianmin ZHOU, Hehe HU, Xiaochun XU, Nianqi YAO, Dapeng XUE, Shuilang DONG
  • Publication number: 20220100982
    Abstract: A fingerprint identification module, a method for manufacturing the fingerprint identification module, a display substrate and a display device are provided. The fingerprint identification module includes a TFT, a photosensitive sensor, and a connection electrode configured to connect the TFT to the photosensitive sensor; the TFT includes an active layer; the active layer and the connection electrode are formed through a same semiconductor layer pattern, the semiconductor layer pattern includes a first semiconductor pattern and a second semiconductor pattern, the first semiconductor pattern is used as the active layer, and the second semiconductor pattern is subjected to conductor-formation treatment and used as the connection electrode.
    Type: Application
    Filed: February 9, 2021
    Publication date: March 31, 2022
    Inventors: Nianqi YAO, Lubin SHI
  • Publication number: 20210217784
    Abstract: An array substrate, a method for manufacturing an array substrate, and a display panel are provided. The array substrate includes: a base substrate; a thin film transistor on the base substrate; and a PIN diode on a side of the thin film transistor away from the base substrate, in a direction running away the base substrate from the thin film transistor, the PIN diode including a first electrical conduction type semiconductor layer and an intrinsic semiconductor layer and a second electrical conduction type semiconductor layer stacked in sequence, wherein a material from which the first electrical conduction type semiconductor layer is made includes one or more of following materials: metal oxide, metal sulfide, metal selenide, metal nitride, metal phosphide, or metal arsenide.
    Type: Application
    Filed: November 21, 2019
    Publication date: July 15, 2021
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhengliang Li, Jiayu He, Hehe Hu, Wenlin Zhang, Song Liu, Xiaochen Ma, Nianqi Yao, Jie Huang
  • Publication number: 20210091223
    Abstract: An oxide thin film transistor includes an oxide active layer, a first loose layer and a first oxygen release layer. The first loose layer is at least disposed on a first surface of the oxide active layer perpendicular to a thickness direction of the oxide active layer, and is in contact with the oxide active layer. A material of the first loose layer includes a first inorganic oxide insulating material. The first oxygen release layer is disposed on a surface of the first loose layer facing away from the oxide active layer, and is in contact with the first loose layer. A material of the first oxygen release layer is a first oxygen-containing insulating material.
    Type: Application
    Filed: May 18, 2020
    Publication date: March 25, 2021
    Inventors: Lizhong WANG, Tianmin ZHOU, Hehe HU, Shuilang DONG, Wenhua WANG, Nianqi YAO