Patents by Inventor Nicolaas W. Van Vonno
Nicolaas W. Van Vonno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9092653Abstract: A finger biometric sensor may include a finger biometric sensing layer having an upper major surface and at least one sidewall surface adjacent thereto. The finger biometric layer may be for generating signals related to at least one biometric characteristic of the user's finger when positioned adjacent the first major surface. The finger biometric sensor may also include a piezoelectric transducer layer coupled to the at least one sidewall surface of the finger biometric sensing layer and a plurality of electrically conductive layers coupled to the piezoelectric transducer layer to define transducer electrodes. At least one of the electrically conductive layers may also cooperate with the finger biometric sensing layer for sensing the at least one biometric characteristic.Type: GrantFiled: December 17, 2013Date of Patent: July 28, 2015Assignee: APPLE INC.Inventors: Dale R. Setlak, James Warren Neil, Daryl D. Williams, Richard J. Jones, Nicolaas W. Van Vonno
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Publication number: 20140105469Abstract: A finger biometric sensor may include a finger biometric sensing layer having an upper major surface and at least one sidewall surface adjacent thereto. The finger biometric layer may be for generating signals related to at least one biometric characteristic of the user's finger when positioned adjacent the first major surface. The finger biometric sensor may also include a piezoelectric transducer layer coupled to the at least one sidewall surface of the finger biometric sensing layer and a plurality of electrically conductive layers coupled to the piezoelectric transducer layer to define transducer electrodes. At least one of the electrically conductive layers may also cooperate with the finger biometric sensing layer for sensing the at least one biometric characteristic.Type: ApplicationFiled: December 17, 2013Publication date: April 17, 2014Inventors: DALE R. SETLAK, JAMES WARREN NEIL, DARYL D. WILLIAMS, RICHARD J. JONES, NICOLAAS W. VAN VONNO
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Patent number: 8618910Abstract: A finger biometric sensor may include a finger biometric sensing layer having an upper major surface and at least one sidewall surface adjacent thereto. The finger biometric layer may be for generating signals related to at least one biometric characteristic of the user's finger when positioned adjacent the first major surface. The finger biometric sensor may also include a piezoelectric transducer layer coupled to the at least one sidewall surface of the finger biometric sensing layer and a plurality of electrically conductive layers coupled to the piezoelectric transducer layer to define transducer electrodes. At least one of the electrically conductive layers may also cooperate with the finger biometric sensing layer for sensing the at least one biometric characteristic.Type: GrantFiled: August 7, 2009Date of Patent: December 31, 2013Assignee: Authentec, Inc.Inventors: Dale R. Setlak, James W. Neil, Daryl D. Williams, Richard J. Jones, Nicolaas W. Van Vonno
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Patent number: 8604905Abstract: A finger biometric sensor may include a finger biometric sensing layer having an upper major surface and at least one sidewall surface adjacent thereto. The finger biometric layer may be for generating signals related to at least one biometric characteristic of the user's finger when positioned adjacent the first major surface. The finger biometric sensor may also include a piezoelectric transducer layer coupled to the at least one sidewall surface of the finger biometric sensing layer and a plurality of electrically conductive layers coupled to the piezoelectric transducer layer to define transducer electrodes. At least one of the electrically conductive layers may also cooperate with the finger biometric sensing layer for sensing the at least one biometric characteristic.Type: GrantFiled: October 19, 2010Date of Patent: December 10, 2013Assignee: Authentec, Inc.Inventors: Dale R. Setlak, James W. Neil, Daryl D. Williams, Richard J. Jones, Nicolaas W. Van Vonno
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Publication number: 20110316105Abstract: A PIN diode-based monolithic Nuclear Event Detector and method of manufacturing same for use in detecting a desired level of gamma radiation, in which a PIN diode is integrated with signal processing circuitry, for example CMOS circuitry, in a single thin-film Silicon On Insulator (SOI) chip. The PIN diode is implemented in either a p-, intrinsic, or n-substrate layer. The signal processing circuitry is located in a thin semiconductor layer and is in electrical communication with the PIN diode. The PIN diode may be integrated with the signal processing circuitry onto a single chip, or may be fabricated stand alone using SOI methods according to the method of the invention.Type: ApplicationFiled: November 18, 2010Publication date: December 29, 2011Inventors: Thomas J. Sanders, Nicolaas W. Van Vonno, Clyde Combs, Glenn T. Hess
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Publication number: 20110090049Abstract: A finger biometric sensor may include a finger biometric sensing layer having an upper major surface and at least one sidewall surface adjacent thereto. The finger biometric layer may be for generating signals related to at least one biometric characteristic of the user's finger when positioned adjacent the first major surface. The finger biometric sensor may also include a piezoelectric transducer layer coupled to the at least one sidewall surface of the finger biometric sensing layer and a plurality of electrically conductive layers coupled to the piezoelectric transducer layer to define transducer electrodes. At least one of the electrically conductive layers may also cooperate with the finger biometric sensing layer for sensing the at least one biometric characteristic.Type: ApplicationFiled: October 19, 2010Publication date: April 21, 2011Applicant: AuthenTec, Inc.Inventors: Dale R. Setlak, James W. Neil, Daryl D. Williams, Richard J. Jones, Nicolaas W. Van Vonno
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Publication number: 20110032077Abstract: A finger biometric sensor may include a finger biometric sensing layer having an upper major surface and at least one sidewall surface adjacent thereto. The finger biometric layer may be for generating signals related to at least one biometric characteristic of the user's finger when positioned adjacent the first major surface. The finger biometric sensor may also include a piezoelectric transducer layer coupled to the at least one sidewall surface of the finger biometric sensing layer and a plurality of electrically conductive layers coupled to the piezoelectric transducer layer to define transducer electrodes. At least one of the electrically conductive layers may also cooperate with the finger biometric sensing layer for sensing the at least one biometric characteristic.Type: ApplicationFiled: August 7, 2009Publication date: February 10, 2011Applicant: Authen Tec, Inc, State of Incorporated: DelawareInventors: Dale R. Setlak, James W. Neil, Daryl D. Williams, Richard J. Jones, Nicolaas W. Van Vonno
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Patent number: 7858425Abstract: A PIN diode-based monolithic Nuclear Event Detector and method of manufacturing same for use in detecting a desired level of gamma radiation, in which a PIN diode is integrated with signal processing circuitry, for example CMOS circuitry, in a single thin-film Silicon On Insulator (SOI) chip. The PIN diode is implemented in the p-substrate layer. The signal processing circuitry is located in a thin semiconductor layer and is in electrical communication with the PIN diode. The PIN diode may be integrated with the signal processing circuitry onto a single chip, or may be fabricated stand alone using SOI methods according to the method of the invention.Type: GrantFiled: May 21, 2008Date of Patent: December 28, 2010Inventors: Thomas J. Sanders, Nicolaas W. Van Vonno, Clyde Combs, Glenn T. Hess
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Publication number: 20080290433Abstract: A PIN diode-based monolithic Nuclear Event Detector and method of manufacturing same for use in detecting a desired level of gamma radiation, in which a PIN diode is integrated with signal processing circuitry, for example CMOS circuitry, in a single thin-film Silicon On Insulator (SOI) chip. The PIN diode is implemented in the p- substrate layer. The signal processing circuitry is located in a thin semiconductor layer and is in electrical communication with the PIN diode. The PIN diode may be integrated with the signal processing circuitry onto a single chip, or may be fabricated stand alone using SOI methods according to the method of the invention.Type: ApplicationFiled: May 21, 2008Publication date: November 27, 2008Inventors: Thomas J. Sanders, Nicolaas W. Van Vonno, Clyde Combs, Glenn T. Hess
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Patent number: 7187056Abstract: A method of forming bipolar junction devices, including forming a mask to expose the total surface of the emitter region and adjoining portions of the surface of the base region. A first dielectric layer is formed over the exposed surfaces. A field plate layer is formed on the first dielectric layer juxtaposed on at least the total surface of the emitter region and adjoining portions of the surface of the base region. A portion of the field plate layer is removed to expose a first portion of the emitter surface. A second dielectric layer is formed over the field plate layer and the exposed portion of the emitter. A portion of the second dielectric layer is removed to expose the first portion of the emitter surface and adjoining portions of the field plate layer. A common contact is made to the exposed first portion of the emitter surface and the adjoining portions of the field plate layer. In another embodiment, the field plate and emitter contact are formed simultaneously.Type: GrantFiled: February 3, 2006Date of Patent: March 6, 2007Assignee: Intersil Americas, Inc.Inventors: Nicolaas W. van Vonno, Dustin Woodbury
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Patent number: 7029981Abstract: A method of forming bipolar junction devices, including forming a mask to expose the total surface of the emitter region and adjoining portions of the surface of the base region. A first dielectric layer is formed over the exposed surfaces. A field plate layer is formed on the first dielectric layer juxtaposed on at least the total surface of the emitter region and adjoining portions of the surface of the base region. A portion of the field plate layer is removed to expose a first portion of the emitter surface. A second dielectric layer is formed over the field plate layer and the exposed portion of the emitter. A portion of the second dielectric layer is removed to expose the first portion of the emitter surface and adjoining portions of the field plate layer. A common contact is made to the exposed first portion of the emitter surface and the adjoining portions of the field plate layer. In another embodiment, the field plate and emitter contact are formed simultaneously.Type: GrantFiled: June 25, 2004Date of Patent: April 18, 2006Assignee: Intersil Americas, Inc.Inventors: Nicolaas W. van Vonno, Dustin Woodbury
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Patent number: 6791304Abstract: An electronic device may include a circuit board, at least one load circuit carried by the circuit board, and a power distribution conductor carried by the circuit board and connected to the at least one load circuit. The electronic device may also include a multiphase switching regulator including a plurality of output stages connected to the power distribution conductor, and a controller for controlling the output stages based upon respective phase currents. The respective phase currents may be derived from corresponding voltage drops across the power distribution conductor and a matrix of resistivity values.Type: GrantFiled: January 24, 2003Date of Patent: September 14, 2004Assignee: Intersil Americas Inc.Inventors: Lawrence G. Pearce, Nicolaas W. Van Vonno
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Publication number: 20040145360Abstract: An electronic device may include a circuit board, at least one load circuit carried by the circuit board, and a power distribution conductor carried by the circuit board and connected to the at least one load circuit. The electronic device may also include a multiphase switching regulator including a plurality of output stages connected to the power distribution conductor, and a controller for controlling the output stages based upon respective phase currents. The respective phase currents may be derived from corresponding voltage drops across the power distribution conductor and a matrix of resistivity values.Type: ApplicationFiled: January 24, 2003Publication date: July 29, 2004Applicant: Intersil Americas Inc.Inventors: Lawrence G. Pearce, Nicolaas W. Van Vonno
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Patent number: 5956415Abstract: A fingerprint sensor package includes a tamper-resistant housing, a fingerprint sensor mounted in the housing, and an encryption output circuit mounted within the housing and operatively connected to the fingerprint sensor for generating an encrypted output signal related to a sensed fingerprint. The fingerprint sensor package may include a processor operatively connected between the fingerprint sensor and the encryption circuit. In addition, the package may also include a reference fingerprint memory for storing reference fingerprint information. Accordingly, the processor may have the capability to determine if a sensed fingerprint matches a stored reference fingerprint. To further enhance security of the stored reference fingerprint information, the sensor package also preferably includes a removing circuit or device for removing reference fingerprint information from the reference fingerprint storage means responsive to tampering.Type: GrantFiled: January 26, 1996Date of Patent: September 21, 1999Assignee: Harris CorporationInventors: Karl W. McCalley, Steven D. Wilson, Dale R. Setlak, Nicolaas W. van Vonno, Charles L. Hewitt
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Patent number: 5940526Abstract: A fingerprint sensor includes a plurality of semiconductor devices adjacent a substrate and defining active circuit portions, and having only three metal layers. More particularly, the sensor may include a first metal layer interconnecting predetermined ones of the plurality of semiconductor devices; a second metal layer defining a ground plane; and a third metal layer comprising an array of electric field sensing electrodes connected to active circuit portions for generating an output related to a sensed fingerprint. The fingerprint sensor may also include a package surrounding the substrate and having an opening aligned with the sensing electrodes. In addition, a first external electrode may be carried by the package for contact by a finger. The sensor may thus also include an excitation drive circuit connected between the ground plane and the first external electrode for generating electric fields between the electric field sensing electrodes and adjacent finger portions.Type: GrantFiled: May 16, 1997Date of Patent: August 17, 1999Assignee: Harris CorporationInventors: Dale R. Setlak, Nicolaas W. Van Vonno, Rex Lowther, Dave Gebauer
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Patent number: 4594265Abstract: Single crystal dielectrically isolated islands are formed providing a substantially non-reflective or indentured silicon surface before the application of the dielectric isolation layer and the polycrystalline support. Thin film resistor material is formed and delineated on an insulative layer over the single crystal island juxtaposed to the substantially non-reflective bottom dielectric isolation. The thin film resistive layer is trimmed using a laser.Type: GrantFiled: May 15, 1984Date of Patent: June 10, 1986Assignee: Harris CorporationInventors: Nicolaas W. Van Vonno, Richard Hull, Paul S. Reinecke
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Patent number: 4140559Abstract: An integrated circuit having a substrate of a first conductivity type, a first layer of opposite conductivity type thereon and a second layer of said first conductivity type inversely graded on said first layer and including a heavily doped region adjacent the surface opposite said first layer. A ring of said opposite conductivity type extends through said second layer and partially into said first layer and a diffused region of said opposite conductivity type is in the surface of said second layer.The method of fabrication includes epitaxially forming said first layer on said substrate, expitaxially forming said second layer on said first layer having a decreasing impurity concentration from the P-N junction to the surface, forming said ring, nonselectively diffusing to increase the impurity concentration at the area adjacent the surface of said second layer and selectively diffusing to form said diffused surface region.Type: GrantFiled: December 29, 1977Date of Patent: February 20, 1979Assignee: Harris CorporationInventor: Nicolaas W. Van Vonno
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Patent number: 4067038Abstract: An integrated circuit having a substrate of a first conductivity type, a first layer of opposite conductivity type thereon and a second layer of said first conductivity type inversely graded on said first layer and including a heavily doped region adjacent the surface opposite said first layer. A ring of said opposite conductivity type extends through said second layer and partially into said first layer and a diffused region of said opposite conductivity type is in the surface of said second layer.The method of fabrication includes epitaxially forming said first layer on said substrate, expitaxially forming said second layer on said first layer having a decreasing impurity concentration from the P-N junction to the surface, forming said ring, nonselectively diffusing to increase the impurity concentration at the area adjacent the surface of said second layer and selectively diffusing to form said diffused surface region.Type: GrantFiled: December 22, 1976Date of Patent: January 3, 1978Assignee: Harris CorporationInventor: Nicolaas W. Van Vonno