Patents by Inventor Nikos Kaburlasos

Nikos Kaburlasos has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140160136
    Abstract: Techniques to determine when to decrease a frame display rate based in part on the amount or degree of change between sequential frames. The amount or degree of change can be measured based on all or part of similarly located portions of sequential frames. In some cases, power use can be reduced without compromising visual quality by reducing frame display rate when an amount or degree of change between frames is small.
    Type: Application
    Filed: December 12, 2012
    Publication date: June 12, 2014
    Inventors: Nikos Kaburlasos, Eric Samson
  • Publication number: 20140125679
    Abstract: According to some embodiments, performance bottlenecks that arise in particular resources within a graphic processor unit may be alleviated by dynamically rebalancing workloads among the resources, with the goal of removing the current performance bottleneck, while at the same time maintaining power dissipation within a currently allocated power budget. In some embodiments this may be achieved by defining a separate clock domain for each of the plurality of graphics processor resources whose performance may then be rebalanced.
    Type: Application
    Filed: November 6, 2012
    Publication date: May 8, 2014
    Inventors: Nikos Kaburlasos, Eric C. Samson, Altug Koker
  • Publication number: 20140115248
    Abstract: Device, system, and method of memory allocation. For example, an apparatus includes: a Dual In-line Memory Module (DIMM) including a plurality of Dynamic Random Access Memory (DRAM) units to store data, wherein each DRAM unit includes a plurality of banks and each bank is divided into a plurality of sub-banks; and a memory management unit to allocate a set of interleaved sub-banks of said DIMM to a memory page of an Operating System, wherein a combined memory size of the set of interleaved sub-banks is equal to a size of the memory page of the Operating System.
    Type: Application
    Filed: December 27, 2013
    Publication date: April 24, 2014
    Inventors: Jim Kardach, Nikos Kaburlasos
  • Publication number: 20140023351
    Abstract: In general, in one aspect, a graphics driver receives information related to where eyes of a user watching a video are focused, determine if the user is focusing their attention on a particular location of the video, and generates post processing instructions for pixel macro blocks of decoded video frames. The instructions are based on whether it is determined that the user is focused. The graphics driver is further to determine a focus area associated with the particular location the user is focusing their attention on, determine a peripheral area around the focus area, generate a first set of post processing instructions for pixel macro blocks within the focus area, generate a second set of post processing instructions for pixel macro blocks within the peripheral area, and generate a third set of post processing instructions for pixel macro blocks not within either area.
    Type: Application
    Filed: July 20, 2012
    Publication date: January 23, 2014
    Inventors: Nikos Kaburlasos, Scott W. Cheng, Scott Janus, Michael A. Smith
  • Patent number: 8607083
    Abstract: Embodiments of a method and apparatus are described for low power operation of a multi-core processing system. An apparatus may comprise, for example, an affinitization management module operative to detect a media application operative to execute on one or more of a plurality of processor cores of a multi-core processor, dynamically select a subset of processor cores of the multi-core processor, and affinitize the media application to execute on the subset of processor cores. Other embodiments are described and claimed.
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: December 10, 2013
    Assignee: Intel Corporation
    Inventors: Nikos Kaburlasos, Guy M Therien
  • Publication number: 20130286026
    Abstract: Power gating a portion of a graphics processor may be used to improve performance or to achieve a power budget. A processor granularity, such as a slice or subslice, may be gated.
    Type: Application
    Filed: November 21, 2011
    Publication date: October 31, 2013
    Inventors: Nikos Kaburlasos, Eric C. Samson
  • Publication number: 20130064376
    Abstract: A camera input can be used by the computer to support audio spatialization or to improve audio spatialization of an application that already supports it. A computer system may to support audio spatialization, for example, by modifying the relative latency or relative amplitude of the rendered audio packets. If a sound is intended, for example, to be located on the left side of the user, then the audio channel that is rendered on the headset speaker located on the user's left ear may have a somewhat decreased latency and increased amplitude compared to the other audio channel.
    Type: Application
    Filed: September 27, 2012
    Publication date: March 14, 2013
    Inventors: Nikos Kaburlasos, Scott W. Cheng, Devon Worrell
  • Publication number: 20120331321
    Abstract: A processor may operate at a first frequency level for a first time interval. The processor automatically may transition to a sleep state from the first frequency level after the first time interval. Then the processor automatically transitions from the sleep state to the first frequency level after a second time interval. As a result the processor may operate at a reduced power consumption and higher performance.
    Type: Application
    Filed: June 27, 2011
    Publication date: December 27, 2012
    Inventors: Nikos Kaburlasos, Eric C. Samson, David Puffer, Lakshminarayan Jagannathan
  • Patent number: 8279213
    Abstract: An electronic device comprises a central processing unit, a graphics processing unit, and a power control unit comprising logic to develop a predictive model of power states for a central processing unit in the electronic device, and use the predictive model to synchronize activity of a graphics processing unit in the electronic device with periods of activity in the central processing unit. Other embodiments may be described.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: October 2, 2012
    Assignee: Intel Corporation
    Inventors: Nikos Kaburlasos, Inder M. Sodhi
  • Publication number: 20120216048
    Abstract: Methods, systems and computer system products to allow audio decryption and decoding to be performed on a graphics engine instead of on a host processor. This may be accomplished without having to modify media application software. A down codec function driver exposes a down codec to a media application, which may then send encrypted and encoded audio data to the down codec function driver. The down codec function driver may then redirect the audio data to a graphics driver. The graphics driver may then pass the audio data to a graphics engine. The graphics engine may then decrypt and decode the audio data. The decrypted and decoded audio data may be returned to the graphics driver, which may then send the decrypted and decoded audio data to the function driver. The function driver may then pass the decrypted and decoded audio data to the down codec for rendering.
    Type: Application
    Filed: February 17, 2011
    Publication date: August 23, 2012
    Inventors: Nikos Kaburlasos, Devon Worrell
  • Publication number: 20120209614
    Abstract: Techniques are disclosed that involve the processing of audio streams. For instance, a host processing platform may receive a content stream that includes an encoded audio stream. In turn, a graphics engine produces from it a decoded audio stream. This producing may involve the graphics engine performing various operations, such as an entropy decoding operation, an inverse quantization operation, and an inverse discrete cosine transform operation. In embodiments, the content stream may further include an encoded video stream. Thus the graphics engine may produce from it a decoded video stream. This audio and video decoding may be performed in parallel.
    Type: Application
    Filed: February 10, 2011
    Publication date: August 16, 2012
    Inventors: Nikos Kaburlasos, Scott W. Cheng, Hong Jiang, Michael D. Stoner, Narayan Biswal
  • Publication number: 20120169747
    Abstract: A method includes executing a workload on a graphics (GFX) core in a first mode the GFX core comprising a plurality of Subslices wherein each of the plurality of Subslices dissipates power. The method further includes calculating a number of clock cycles, Tfirst mode, required for the GFX core to perform the workload in the first mode during a first decision window comprising a plurality of clock cycles and calculating a number of clock cycles, Tsecond mode, required for the GFX core to perform the workload in a second mode during the first decision window wherein the second mode comprises executing the workload with fewer of the plurality of Subslices receiving power than when executing the workload in the first mode. It is then determined, based in part upon Tfirst mode and Tsecond mode, if an energy savings is possible by transitioning the GFX core to the second mode.
    Type: Application
    Filed: December 28, 2011
    Publication date: July 5, 2012
    Inventors: Nikos KABURLASOS, Eric C. Samson
  • Patent number: 8209480
    Abstract: In some embodiments, an electronic apparatus comprises a communication interface, an input/output interface, a processor, and logic to collect, in the electronic apparatus, a first identifier associated with a first communication device and second identifier associated with a second communication device, logic to establish a communication connection between the electronic apparatus and the first communication device, and logic to initiate, in the electronic apparatus, a connection request for a communication connection between the first communication device and the second communication device. Other embodiments may be described.
    Type: Grant
    Filed: July 13, 2010
    Date of Patent: June 26, 2012
    Assignee: Intel Corporation
    Inventors: Nikos Kaburlasos, Jim Kardaeh
  • Publication number: 20120089772
    Abstract: Device, system, and method of memory allocation. For example, an apparatus includes: a Dual In-line Memory Module (DIMM) including a plurality of Dynamic Random Access Memory (DRAM) units to store data, wherein each DRAM unit includes a plurality of banks and each bank is divided into a plurality of sub-banks; and a memory management unit to allocate a set of interleaved sub-banks of said DIMM to a memory page of an Operating System, wherein a combined memory size of the set of interleaved sub-banks is equal to a size of the memory page of the Operating System.
    Type: Application
    Filed: December 21, 2011
    Publication date: April 12, 2012
    Inventors: JIm Kardach, Nikos Kaburlasos
  • Patent number: 8095725
    Abstract: Device, system, and method of memory allocation. For example, an apparatus includes: a Dual In-line Memory Module (DIMM) including a plurality of Dynamic Random Access Memory (DRAM) units to store data, wherein each DRAM unit includes a plurality of banks and each bank is divided into a plurality of sub-banks; and a memory management unit to allocate a set of interleaved sub-banks of said DIMM to a memory page of an Operating System, wherein a combined memory size of the set of interleaved sub-banks is equal to a size of the memory page of the Operating System.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: January 10, 2012
    Assignee: Intel Corporation
    Inventors: Jim Kardach, Nikos Kaburlasos
  • Publication number: 20110246804
    Abstract: Embodiments of a method and apparatus are described for low power operation of a multi-core processing system. An apparatus may comprise, for example, an affinitization management module operative to detect a media application operative to execute on one or more of a plurality of processor cores of a multi-core processor, dynamically select a subset of processor cores of the multi-core processor, and affinitize the media application to execute on the subset of processor cores. Other embodiments are described and claimed.
    Type: Application
    Filed: April 1, 2010
    Publication date: October 6, 2011
    Inventors: Nikos Kaburlasos, Guy M. Therien
  • Publication number: 20110148890
    Abstract: An electronic device comprises a central processing unit, a graphics processing un and a power control unit comprising logic to develop a predictive model of power states for a central processing unit in the electronic device, and use the predictive model to synchronize activity of a graphics processing unit in the electronic device with periods of activity in the central processing unit. Other embodiments may be described.
    Type: Application
    Filed: December 23, 2009
    Publication date: June 23, 2011
    Inventors: Nikos Kaburlasos, Inder M. Sodhi
  • Patent number: 7903495
    Abstract: Embodiments of methods, apparatuses, and systems that enable power conservation in data buffering components are disclosed. Other embodiments may also be disclosed.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: March 8, 2011
    Assignee: Intel Corporation
    Inventor: Nikos Kaburlasos
  • Publication number: 20110047326
    Abstract: In some embodiments, an electronic apparatus comprises a communication interface, an input/output interface, a processor, and logic to collect, in the electronic apparatus, a first identifier associated with a first communication device and second identifier associated with a second communication device, logic to establish a communication connection between the electronic apparatus and the first communication device, and logic to initiate, in the electronic apparatus, a connection request for a communication connection between the first communication device and the second communication device. Other embodiments may be described.
    Type: Application
    Filed: July 13, 2010
    Publication date: February 24, 2011
    Inventors: NIKOS KABURLASOS, JIM KARDACH
  • Patent number: 7757039
    Abstract: In some embodiments, an electronic apparatus comprises a communication interface, an input/output interface, a processor, and logic to collect, in the electronic apparatus, a first identifier associated with a first communication device and second identifier associated with a second communication device, logic to establish a communication connection between the electronic apparatus and the first communication device, and logic to initiate, in the electronic apparatus, a connection request for a communication connection between the first communication device and the second communication device. Other embodiments may be described.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: July 13, 2010
    Inventors: Nikos Kaburlasos, Jim Kardach