Patents by Inventor Ning Fang

Ning Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11579504
    Abstract: A thin film transistor array substrate includes an insulating substrate, a plurality of data lines, a plurality of common electrodes, and a common electrode layer. The insulating substrate defines a plurality of sub-pixel area arranged into a sub-pixel array including a plurality of rows and a plurality of columns. The plurality of data lines extend in a direction of the columns in the sub-pixel array. The plurality of common electrodes extend in the direction of the columns in the sub-pixel array. At least two of the plurality of data lines are between adjacent common electrodes of the plurality of common electrodes, and the plurality of common electrodes are applied with a same voltage. The common electrode layer is on the insulating substrate and the common electrodes are connected to different locations of the common electrode layer.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: February 14, 2023
    Assignee: Century Technology (Shenzhen) Corporation Limited
    Inventors: Yuan Xiong, Chih-Chung Liu, Qi Xu, Hui Wang, Ning Fang
  • Publication number: 20220172784
    Abstract: A sense circuit performs a multistage boost, including a boost during precharge operation and a boost during the standard boost operation. The sense circuit includes an output transistor to drive a sense output based on current through a sense node which drives a gate of the output transistor. The sense circuit includes a precharge circuit to precharge the sense node and the gate of the output transistor and a boost circuit to boost the sense node. The boost circuit can be boosted during precharge by a first boost voltage, resulting in a lower boost applied to the sense node after precharge. The boost circuit boosts up the sense node by a second boost voltage lower than the first boost voltage. The boost circuit boosts the sense node down by the full boost voltage of the first boost voltage plus the second boost voltage after sensing.
    Type: Application
    Filed: November 30, 2020
    Publication date: June 2, 2022
    Inventors: Shantanu R. RAJWADE, Bayan NASRI, Tzu-Ning FANG, Rezaul HAQUE, Dhanashree R. KULKARNI, Narayanan RAMANAN, Matin AMANI, Ahsanur RAHMAN, Seong Je PARK, Netra MAHULI
  • Patent number: 11327019
    Abstract: An integrated spectro-microscopic system for multimodality imaging on a sample includes a reflected differential interference contrast (RDIC) microscope, a Raman spectroscope optically coupled with the RDIC microscope and a total internal reflection fluorescence/scattering (TIRF/TIRS) microscope optically coupled with the RDIC microscope such that the integrated spectro-microscopic system is capable of simultaneously acquiring both the RDIC images, the Raman spectra and TIRF/TIRS images on the same sample.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: May 10, 2022
    Inventors: Ning Fang, Bin Dong, Kuangcai Chen, Fei Zhao
  • Patent number: 11314134
    Abstract: A thin film transistor substrate of reduced repaired line length and capacitance includes first repairing lines, data lines and second repairing lines insulated from each other. If one of the data lines is broken, the first repairing lines is electrically coupled to the input end of the broken data line, the second repairing line is electrically coupled to the output end of the broken data line, and the first repairing is electrically coupled to the second repairing line.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: April 26, 2022
    Assignee: Century Technology (Shenzhen) Corporation Limited
    Inventors: Ning Fang, Chih-Chung Liu, Meng-Chieh Tai
  • Patent number: 11262628
    Abstract: A liquid crystal display panel defines a display area and a non-display surrounding the display area. The panel includes a color filter substrate and a thin film transistor array substrate opposite to the color filter substrate. The color filter substrate includes a first substrate and a black matrix on the first substrate. The black matrix is in the display area and extending to the non-display area. A gap is defined in the black matrix and in the non-display area. The gap extends to be a circle around the display area and divides the black matrix into two independent parts. The color filter substrate includes a second substrate and a metal ring on a side of the second substrate facing the thin film transistor array substrate. The metal ring surrounds the display area and aligns with the gap.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: March 1, 2022
    Assignee: Century Technology (Shenzhen) Corporation Limited
    Inventors: Guo-Dong Xu, Hui Wang, Ning Fang, Chen-Fu Mai, Chih-Chung Liu, Meng-Chieh Tai
  • Publication number: 20220057662
    Abstract: A method for fast and convenient manufacture of liquid crystal display panels of different and uncommon sizes without retooling provides a first liquid crystal display panel having a first display area of a large first size. The color filter substrate is cut to make the first liquid crystal display panel into a vacuum-broken state. A sealant is coated onto the array substrate, wherein the sealant seals the liquid crystal layer and extends to a side of the color filter substrate away from the array substrate to cover part of the first display area, thereby obtaining a second liquid crystal display panel with a second display area of a second size.
    Type: Application
    Filed: July 20, 2021
    Publication date: February 24, 2022
    Inventors: HUI WANG, ZHENG-XIA HE, YUAN XIONG, NING FANG, CHIH-CHUNG LIU, MENG-CHIEH TAI
  • Publication number: 20220050347
    Abstract: A method for fast and convenient manufacture of liquid crystal display panels of different sizes without retooling provides an array substrate having a first display area of a first size. A closed-shaped sealant is coated onto the array substrate, the sealant defining a second display area of a second size, the second display area including an actual display area and an undesired display area adjacent to the actual display area and the sealant. Liquid crystals are applied in the second display area and sealing and coupling are carried out to obtain a liquid crystal cell, the liquid crystal cell being cut along an outer periphery of the sealant to obtain a working liquid crystal display panel of the desired size.
    Type: Application
    Filed: July 8, 2021
    Publication date: February 17, 2022
    Inventors: ZHENG-XIA HE, NING FANG, YUAN XIONG, HUI WANG, WEN-LIN CHEN, CHIH-CHUNG LIU
  • Publication number: 20220043289
    Abstract: A thin film transistor array substrate includes an insulating substrate, a plurality of data lines, a plurality of common electrodes, and a common electrode layer. The insulating substrate defines a plurality of sub-pixel area arranged into a sub-pixel array including a plurality of rows and a plurality of columns. The plurality of data lines extend in a direction of the columns in the sub-pixel array. The plurality of common electrodes extend in the direction of the columns in the sub-pixel array. At least two of the plurality of data lines are between adjacent common electrodes of the plurality of common electrodes, and the plurality of common electrodes are applied with a same voltage. The common electrode layer is on the insulating substrate and the common electrodes are connected to different locations of the common electrode layer.
    Type: Application
    Filed: April 1, 2021
    Publication date: February 10, 2022
    Inventors: YUAN XIONG, CHIH-CHUNG LIU, QI XU, HUI WANG, NING FANG
  • Publication number: 20210405471
    Abstract: A liquid crystal display panel defines a display area and a non-display surrounding the display area. The panel includes a color filter substrate and a thin film transistor array substrate opposite to the color filter substrate. The color filter substrate includes a first substrate and a black matrix on the first substrate. The black matrix is in the display area and extending to the non-display area. A gap is defined in the black matrix and in the non-display area. The gap extends to be a circle around the display area and divides the black matrix into two independent parts. The color filter substrate includes a second substrate and a metal ring on a side of the second substrate facing the thin film transistor array substrate. The metal ring surrounds the display area and aligns with the gap.
    Type: Application
    Filed: August 24, 2020
    Publication date: December 30, 2021
    Inventors: GUO-DONG XU, HUI WANG, NING FANG, CHEN-FU MAI, CHIH-CHUNG LIU, MENG-CHIEH TAI
  • Publication number: 20210318245
    Abstract: An integrated spectro-microscopic system for multimodality imaging on a sample includes a reflected differential interference contrast (RDIC) microscope, a Raman spectroscope optically coupled with the RDIC microscope and a total internal reflection fluorescence/scattering (TIRF/TIRS) microscope optically coupled with the RDIC microscope such that the integrated spectro-microscopic system is capable of simultaneously acquiring both the RDIC images, the Raman spectra and TIRF/TIRS images on the same sample.
    Type: Application
    Filed: August 16, 2019
    Publication date: October 14, 2021
    Inventors: Ning FANG, Bin DONG, Kuangcai CHEN, Fei ZHAO
  • Patent number: 11098647
    Abstract: A system for managing thermal transfer in at least one of an aircraft or a gas turbine engine includes a first engine system utilizing an oil for heat transfer. The oil of the first system has a temperature limit of at least about 500° F. The system additionally includes a fuel system having a deoxygenation unit for deoxygenating fuel in the fuel system, as well as a fuel-oil heat exchanger located downstream of the deoxygenation unit. The fuel-oil heat exchanger is in thermal communication with the oil in the first engine system and the fuel in the fuel system for transferring heat from the oil in the first engine system to the fuel in the fuel system.
    Type: Grant
    Filed: January 24, 2019
    Date of Patent: August 24, 2021
    Assignee: General Electric Company
    Inventors: Brandon Wayne Miller, Duane Howard Anstead, Mohammed El Hacin Sennoun, Ning Fang, Kyle Robert Snow
  • Publication number: 20210132452
    Abstract: A thin film transistor substrate of reduced repaired line length and capacitance includes first repairing lines, data lines and second repairing lines insulated from each other. If one of the data lines is broken, the first repairing lines is electrically coupled to the input end of the broken data line, the second repairing line is electrically coupled to the output end of the broken data line, and the first repairing is electrically coupled to the second repairing line.
    Type: Application
    Filed: January 13, 2021
    Publication date: May 6, 2021
    Inventors: NING FANG, CHIH-CHUNG LIU, MENG-CHIEH TAI
  • Patent number: 10928692
    Abstract: A thin film transistor substrate of reduced repaired line length and capacitance includes first repairing lines, data lines and second repairing lines insulated from each other. When one of the data lines is broken, the first repairing lines is electrically coupled to the input end of the broken data line, the second repairing line is electrically coupled to the output end of the broken data line, and the first repairing is electrically coupled to the second repairing line.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: February 23, 2021
    Assignee: Century Technology (Shenzhen) Corporation Limited
    Inventors: Ning Fang, Chih-Chung Liu, Meng-Chieh Tai
  • Patent number: 10872547
    Abstract: A gate driver with reduced voltage fluctuations driving a display device generates pulse signals shifted in a specified phase. The gate driver includes connected unit circuits. Each unit circuit includes an output terminal, input and output transistors, and a holding module. First and second control signals, alternating oppositely between high and low states, govern the two transistors. The input transistor is controlled by a first control signal and outputs a high level voltage to a first node based on a trigger signal. The output transistor outputs the shifted pulse signal synchronously with a clock control signal, based on the high level voltage of the first node. Initially, the trigger signal is low and the first and second control signals are high. The holding module outputs the low level voltage to the output terminal based on the first control signal and the second control signal.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: December 22, 2020
    Assignee: Century Technology (Shenzhen) Corporation Limited
    Inventors: Hui Wang, Ning Fang, Chih-Chung Liu, Ming-Tsung Wang, Meng-Chieh Tai
  • Patent number: 10648365
    Abstract: A gas turbine engine having a core engine. The core engine includes an inlet, a compressor section, a combustion section, a turbine section, and an exhaust. The gas turbine engine also includes a bearing sump arranged in the core engine for containing lubrication, the bearing sump and lubrication having an operational range between at least about 0° F. and about 550° F.
    Type: Grant
    Filed: December 8, 2015
    Date of Patent: May 12, 2020
    Assignee: General Electric Company
    Inventors: Kyle Robert Snow, Brandon Wayne Miller, Duane Howard Anstead, Jonothan Allen Scheetz, Mohammed El Hacin Sennoun, Ning Fang
  • Patent number: 10544737
    Abstract: A turbofan engine includes a core engine, a fan, a fan bypass duct partially surrounding the core engine and the fan, and a bleed system. The bleed system includes a first bleed circuit configured to bleed pressurized air from the core engine and channel the flow to a first circuit of a heat exchanger, and a second bleed circuit configured to bleed fan air from the fan bypass duct and channel the flow to a second circuit of the heat exchanger. The second bleed circuit includes a bleed duct including a duct inlet and a duct outlet coupled in flow communication with the heat exchanger through a valve. The bleed duct also includes an acoustic suppression conduit extending from the bleed duct upstream of the valve to the fan bypass duct and sized to suppress pressure oscillations inside the second bleed circuit when the valve is at least partially closed.
    Type: Grant
    Filed: October 27, 2016
    Date of Patent: January 28, 2020
    Assignee: General Electric Company
    Inventors: William Joseph Bowden, Ning Fang, Guohua Zhong, Bartosz Karbowski
  • Publication number: 20200027382
    Abstract: A gate driver with reduced voltage fluctuations driving a display device generates pulse signals shifted in a specified phase. The gate driver includes connected unit circuits. Each unit circuit includes an output terminal, input and output transistors, and a holding module. First and second control signals, alternating oppositely between high and low states, govern the two transistors. The input transistor is controlled by a first control signal and outputs a high level voltage to a first node based on a trigger signal. The output transistor outputs the shifted pulse signal synchronously with a clock control signal, based on the high level voltage of the first node. Initially, the trigger signal is low and the first and second control signals are high. The holding module outputs the low level voltage to the output terminal based on the first control signal and the second control signal.
    Type: Application
    Filed: October 25, 2018
    Publication date: January 23, 2020
    Inventors: HUI WANG, NING FANG, CHIH-CHUNG LIU, MING-TSUNG WANG, MENG-CHIEH TAI
  • Publication number: 20200013363
    Abstract: A display device comprising thin film transistor array substrate includes scan lines, data lines, pixel units, and a source driver. Each pair of scan lines extends in a first direction and data lines extend in a second intersecting direction. Of the first and second sub-pixels in each pixel unit, the first sub-pixel connects to the first scan line, and the second sub-pixel connects to the second scan line. The first and second sub-pixels also straddle and connect to one data line. Source driver supplies the data lines with voltages and the voltage to the first sub-pixel is greater than the voltage to the second sub-pixel. This configuration avoids appearance of stripes on the display arising from charging rates of adjacent pixel columns not being the same. A display panel using the thin film transistor array substrate is also provided.
    Type: Application
    Filed: October 25, 2018
    Publication date: January 9, 2020
    Inventors: YUAN XIONG, NING FANG, CHIH-CHUNG LIU, MING-TSUNG WANG
  • Patent number: 10481454
    Abstract: A thin film transistor array substrate with always-equal parasitic capacitances for a display includes scan lines, data lines, common lines, and pixel units. First and second scan lines extend in a first direction. Data and common lines extend in a second intersecting direction and are arranged to alternate in the first direction. First and second sub-pixels of pixel units are distributed on either side of and connected to one of a scan line pair. The first and second sub-pixels also straddle and connect to one data line. Bridges on a common line cover a portion of one scan line pair in the second direction and each bridge overlaps first and second scan lines. First scan line overlap with bridge is equal to second scan line overlap. A display panel using the thin film transistor array substrate is also provided.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: November 19, 2019
    Assignee: Century Technology (Shenzhen) Corporation Limited
    Inventors: Yuan Xiong, Ning Fang, Chih-Chung Liu, Ming-Tsung Wang
  • Publication number: 20190324334
    Abstract: A thin film transistor substrate of reduced repaired line length and capacitance includes first repairing lines, data lines and second repairing lines insulated from each other. When one of the data lines is broken, the first repairing lines is electrically coupled to the input end of the broken data line, the second repairing line is electrically coupled to the output end of the broken data line, and the first repairing is electrically coupled to the second repairing line.
    Type: Application
    Filed: December 17, 2018
    Publication date: October 24, 2019
    Inventors: NING FANG, CHIH-CHUNG LIU, MENG-CHIEH TAI