Patents by Inventor Nir J. Wakrat

Nir J. Wakrat has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9727570
    Abstract: Systems and methods are provided for unmapping unused logical addresses at mount-time of a file system. An electronic device, which includes a non-volatile memory (“NVM”), may implement a file system that, at mount-time of the NVM, identifies all of the logical addresses associated with the NVM that are unallocated. The file system may then pass this information on to a NVM manager, such as in one or more unmap requests. This can ensure that the NVM manager does not maintain data associated with a logical address that is no longer needed by the file system.
    Type: Grant
    Filed: June 3, 2011
    Date of Patent: August 8, 2017
    Assignee: APPLE INC.
    Inventors: Daniel J. Post, Eric Tamura, Vadim Khmelnitsky, Nir J. Wakrat, Matthew Byom
  • Patent number: 9703700
    Abstract: Systems and methods are disclosed for efficient buffering for a system having non-volatile memory (“NVM”). In some embodiments, a control circuitry of a system can use heuristics to determine whether to perform buffering of one or more write commands received from a file system. In other embodiments, the control circuitry can minimize read energy and buffering overhead by efficiently re-ordering write commands in a queue along page-aligned boundaries of a buffer. In further embodiments, the control circuitry can optimally combine write commands from a buffer with write commands from a queue. After combining the commands, the control circuitry can dispatch the commands in a single transaction.
    Type: Grant
    Filed: April 22, 2015
    Date of Patent: July 11, 2017
    Assignee: APPLE INC.
    Inventors: Daniel J. Post, Nir J. Wakrat
  • Patent number: 9472285
    Abstract: Systems and methods are provided for testing a non-volatile memory, such as a flash memory. The non-volatile memory may be virtually partitioned into a test region and a general purpose region. A test application may be stored in the general purpose region, and the test application can be executed to run a test of the memory locations in the test region. The results of the test may be stored in the general purpose region. At the completion of the test, the test results may be provided from the general purpose region and displayed to a user. The virtual partitions may be removed prior to shipping the electronic device for distribution.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: October 18, 2016
    Assignee: APPLE INC.
    Inventors: Matthew J. Byom, Nir J. Wakrat, Kenneth L. Herman
  • Patent number: 9383808
    Abstract: Systems and methods are disclosed for dynamically allocating power for a system having non-volatile memory. A power budgeting manager of a system can determine if the total amount of power available for the system is below a pre-determined power level (e.g., a low power state). While the system is operating in the low power state, the power budgeting manager can dynamically allocate power among various components of the system (e.g., a processor and non-volatile memory).
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: July 5, 2016
    Assignee: APPLE INC.
    Inventors: Nir J. Wakrat, Kenneth L. Herman, Matthew J. Byom
  • Patent number: 9239785
    Abstract: Systems and methods are disclosed for stochastic block allocation for improved wear leveling for a system having non-volatile memory (“NVM”). The system can probabilistically allocate a block or super block for wear leveling based on statistics associated with the block or super block. In some embodiments, the system can select a set of blocks or super blocks based on a pre-determined threshold of a number of cycles (e.g., erase cycles and/or write cycles). The block or super block can then be selected from the set of super blocks. In other embodiments, the system can use a fully stochastic approach by selecting a block or super block based on a biased random variable. The biased random variable may be generated based in part on the number of cycles associated with each block or super block of the NVM.
    Type: Grant
    Filed: June 9, 2014
    Date of Patent: January 19, 2016
    Assignee: APPLE INC.
    Inventors: Daniel J. Post, Nir J. Wakrat
  • Patent number: 9146821
    Abstract: Systems and methods are disclosed for monitoring the time it takes to perform a write operation, and based on the time it takes, a determination is made whether to retire a block that is a recipient of the write operation. The time duration of the write operation for a page or a combination of pages may indicate whether any block or blocks containing the page or combination of pages is experiencing a physical failure. That is, if the time duration of the write operation for a particular page exceeds time threshold, this may indicate that this page requires a larger number of program cycles than other pages. The longer programming cycle can be an indication of cell leakage or a failing block.
    Type: Grant
    Filed: May 1, 2014
    Date of Patent: September 29, 2015
    Assignee: APPLE INC.
    Inventors: Matthew J. Byom, Nir J. Wakrat
  • Publication number: 20150227460
    Abstract: Systems and methods are disclosed for efficient buffering for a system having non-volatile memory (“NVM”). In some embodiments, a control circuitry of a system can use heuristics to determine whether to perform buffering of one or more write commands received from a file system. In other embodiments, the control circuitry can minimize read energy and buffering overhead by efficiently re-ordering write commands in a queue along page-aligned boundaries of a buffer. In further embodiments, the control circuitry can optimally combine write commands from a buffer with write commands from a queue. After combining the commands, the control circuitry can dispatch the commands in a single transaction.
    Type: Application
    Filed: April 22, 2015
    Publication date: August 13, 2015
    Inventors: Daniel J. Post, Nir J. Wakrat
  • Patent number: 9063886
    Abstract: Systems and methods are provided for storing data to or reading data from a non-volatile memory (“NVM”), such as flash memory, using a metadata redundancy scheme. In some embodiments, an electronic device, which includes an NVM, may also include a memory interface for controlling access to the NVM. The memory interface may receive requests to write user data to the NVM. The user data from each request may be associated with metadata, such as a logical address, flags, or other data. In response to a write request, the NVM interface may store the user data and its associated metadata in a first memory location (e.g., page), and may store a redundant copy of the metadata in a second memory location. This way, even if the first memory location becomes inaccessible, the memory interface can still recover the metadata from the backup copy stored in the second memory location.
    Type: Grant
    Filed: September 18, 2009
    Date of Patent: June 23, 2015
    Assignee: APPLE INC.
    Inventors: Daniel J. Post, Vadim Khmelnitsky, Nir J. Wakrat
  • Patent number: 8949508
    Abstract: Systems and methods are provided for handling temporary data that is stored in a non-volatile memory, such as NAND flash memory. The temporary data may include hibernation data or any other data needed for only one boot cycle of an electronic device. When storing the temporary data in one or more pages of the non-volatile memory, the electronic device can store a temporary marker as part of the metadata in at least one of the pages. This way, on the next bootup of the electronic device, the electronic device can use the temporary marker to determine that the associated page contains unneeded data. The electronic device can therefore invalidate the page and omit the page from its metadata tables.
    Type: Grant
    Filed: July 18, 2011
    Date of Patent: February 3, 2015
    Assignee: Apple Inc.
    Inventors: Nir J. Wakrat, Daniel J. Post
  • Publication number: 20140344609
    Abstract: Systems and methods are disclosed for dynamically allocating power for a system having non-volatile memory. A power budgeting manager of a system can determine if the total amount of power available for the system is below a pre-determined power level (e.g., a low power state). While the system is operating in the low power state, the power budgeting manager can dynamically allocate power among various components of the system (e.g., a processor and non-volatile memory).
    Type: Application
    Filed: July 31, 2014
    Publication date: November 20, 2014
    Inventors: Nir J. Wakrat, Kenneth L. Herman, Matthew J. Byom
  • Patent number: 8886875
    Abstract: This can relate to handling a non-volatile memory (“NVM”) operating at a substantially full memory. The non-volatile memory can report its physical capacity to an NVM driver. The NVM driver can scale-up the physical capacity a particular number of times to generate a “scaled physical capacity,” which is then reported to the file system. Because the scaled physical capacity is greater than the NVM's actual physical capacity, the file system allocates a logical space to the NVM that is substantially greater than the NVM's capacity. This can cause less crowding of the logical block addresses within the logical space, thus making it easier for the file system to operate and improving system performance. A commitment budget can also be reported to the file system that corresponds to the NVM's physical capacity, and which can define the amount of data the file system can commit for storage in the NVM.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: November 11, 2014
    Assignee: Apple Inc.
    Inventors: Daniel J. Post, Nir J. Wakrat
  • Publication number: 20140281179
    Abstract: Systems and methods are disclosed for stochastic block allocation for improved wear leveling for a system having non-volatile memory (“NVM”). The system can probabilistically allocate a block or super block for wear leveling based on statistics associated with the block or super block. In some embodiments, the system can select a set of blocks or super blocks based on a pre-determined threshold of a number of cycles (e.g., erase cycles and/or write cycles). The block or super block can then be selected from the set of super blocks. In other embodiments, the system can use a fully stochastic approach by selecting a block or super block based on a biased random variable. The biased random variable may be generated based in part on the number of cycles associated with each block or super block of the NVM.
    Type: Application
    Filed: June 9, 2014
    Publication date: September 18, 2014
    Applicant: Apple Inc.
    Inventors: Daniel J. Post, Nir J. Wakrat
  • Patent number: 8826051
    Abstract: Systems and methods are disclosed for dynamically allocating power for a system having non-volatile memory. A power budgeting manager of a system can determine if the total amount of power available for the system is below a pre-determined power level (e.g., a low power state). While the system is operating in the low power state, the power budgeting manager can dynamically allocate power among various components of the system (e.g., a processor and non-volatile memory).
    Type: Grant
    Filed: July 26, 2010
    Date of Patent: September 2, 2014
    Assignee: Apple Inc.
    Inventors: Nir J. Wakrat, Kenneth Herman, Matthew Byom
  • Publication number: 20140245084
    Abstract: Systems and methods are disclosed for monitoring the time it takes to perform a write operation, and based on the time it takes, a determination is made whether to retire a block that is a recipient of the write operation. The time duration of the write operation for a page or a combination of pages may indicate whether any block or blocks containing the page or combination of pages is experiencing a physical failure. That is, if the time duration of the write operation for a particular page exceeds time threshold, this may indicate that this page requires a larger number of program cycles than other pages. The longer programming cycle can be an indication of cell leakage or a failing block.
    Type: Application
    Filed: May 1, 2014
    Publication date: August 28, 2014
    Applicant: Apple Inc.
    Inventors: Matthew J. Byom, Nir J. Wakrat
  • Publication number: 20140192599
    Abstract: Systems and methods are provided for testing a non-volatile memory, such as a flash memory. The non-volatile memory may be virtually partitioned into a test region and a general purpose region. A test application may be stored in the general purpose region, and the test application can be executed to run a test of the memory locations in the test region. The results of the test may be stored in the general purpose region. At the completion of the test, the test results may be provided from the general purpose region and displayed to a user. The virtual partitions may be removed prior to shipping the electronic device for distribution.
    Type: Application
    Filed: March 11, 2014
    Publication date: July 10, 2014
    Applicant: Apple Inc.
    Inventors: Matthew J. Byom, Nir J. Wakrat, Kenneth L. Herman
  • Patent number: 8762625
    Abstract: Systems and methods are disclosed for stochastic block allocation for improved wear leveling for a system having non-volatile memory (“NVM”). The system can probabilistically allocate a block or super block for wear leveling based on statistics associated with the block or super block. In some embodiments, the system can select a set of blocks or super blocks based on a pre-determined threshold of a number of cycles (e.g., erase cycles and/or write cycles). The block or super block can then be selected from the set of super blocks. In other embodiments, the system can use a fully stochastic approach by selecting a block or super block based on a biased random variable. The biased random variable may be generated based in part on the number of cycles associated with each block or super block of the NVM.
    Type: Grant
    Filed: April 14, 2011
    Date of Patent: June 24, 2014
    Assignee: Apple Inc.
    Inventors: Daniel J. Post, Nir J. Wakrat
  • Patent number: 8751903
    Abstract: Systems and methods are disclosed for monitoring the time it takes to perform a write operation, and based on the time it takes, a determination is made whether to retire a block that is a recipient of the write operation. The time duration of the write operation for a page or a combination of pages may indicate whether any block or blocks containing the page or combination of pages is experiencing a physical failure. That is, if the time duration of the write operation for a particular page exceeds time threshold, this may indicate that this page requires a larger number of program cycles than other pages. The longer programming cycle can be an indication of cell leakage or a failing block.
    Type: Grant
    Filed: July 26, 2010
    Date of Patent: June 10, 2014
    Assignee: Apple Inc.
    Inventors: Matthew Byom, Nir J. Wakrat
  • Publication number: 20140115242
    Abstract: This can relate to handling a non-volatile memory (“NVM”) operating at a substantially full memory. The non-volatile memory can report its physical capacity to an NVM driver. The NVM driver can scale-up the physical capacity a particular number of times to generate a “scaled physical capacity,” which is then reported to the file system. Because the scaled physical capacity is greater than the NVM's actual physical capacity, the file system allocates a logical space to the NVM that is substantially greater than the NVM's capacity. This can cause less crowding of the logical block addresses within the logical space, thus making it easier for the file system to operate and improving system performance. A commitment budget can also be reported to the file system that corresponds to the NVM's physical capacity, and which can define the amount of data the file system can commit for storage in the NVM.
    Type: Application
    Filed: December 30, 2013
    Publication date: April 24, 2014
    Applicant: Apple Inc.
    Inventors: Daniel J. Post, Nir J. Wakrat
  • Publication number: 20140112079
    Abstract: Systems and methods are disclosed for managing the peak power consumption of a system, such as a non-volatile memory system (e.g., flash memory system). The system can include multiple subsystems and a controller for controlling the subsystems. Each subsystem may have a current profile that is peaky. Thus, the controller may control the peak power of the system by, for example, limiting the number of subsystems that can perform power-intensive operations at the same time or by aiding a subsystem in determining the peak power that the subsystem may consume at any given time.
    Type: Application
    Filed: December 30, 2013
    Publication date: April 24, 2014
    Applicant: Apple Inc.
    Inventors: Nir J. Wakrat, Daniel J. Post, Kenneth L. Herman, Vadim Khmelnitsky, Nicholas C. Seroff, Hsiao H. Thio, Matthew J. Byom
  • Patent number: 8683456
    Abstract: Systems and methods are provided for testing a non-volatile memory, such as a flash memory. The non-volatile memory may be virtually partitioned into a test region and a general purpose region. A test application may be stored in the general purpose region, and the test application can be executed to run a test of the memory locations in the test region. The results of the test may be stored in the general purpose region. At the completion of the test, the test results may be provided from the general purpose region and displayed to a user. The virtual partitions may be removed prior to shipping the electronic device for distribution.
    Type: Grant
    Filed: July 13, 2009
    Date of Patent: March 25, 2014
    Assignee: Apple Inc.
    Inventors: Matthew Byom, Nir J. Wakrat, Kenneth Herman