Patents by Inventor Noah D. Zamdmer

Noah D. Zamdmer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8932884
    Abstract: Structures and methods are disclosed for evaluating the effect of a process environment variation. A structure and related method are disclosed including a plurality of electrical structures arranged in a non-collinear fashion for determining a magnitude and direction of a process environment variation in the vicinity of the plurality of electrical structures. The plurality of structures may include a first polarity FET coupled to a second polarity FET, each of the first polarity FET and the second polarity FET are coupled to a first pad and a second pad such that the structure allows independent measurement of the first polarity FET and the second polarity FET using only the first and second pads. Alternatively, the electrical structures may include resistors, diodes or ring oscillators. Appropriate measurements of each electrical structure allow a gradient field including a magnitude and direction of the effect of a process environment variation to be determined.
    Type: Grant
    Filed: August 27, 2010
    Date of Patent: January 13, 2015
    Assignee: International Business Machines Corporation
    Inventors: Brent A. Anderson, Edward J. Nowak, Noah D. Zamdmer
  • Publication number: 20100323462
    Abstract: Structures and methods are disclosed for evaluating the effect of a process environment variation. A structure and related method are disclosed including a plurality of electrical structures arranged in a non-collinear fashion for determining a magnitude and direction of a process environment variation in the vicinity of the plurality of electrical structures. The plurality of structures may include a first polarity FET coupled to a second polarity FET, each of the first polarity FET and the second polarity FET are coupled to a first pad and a second pad such that the structure allows independent measurement of the first polarity FET and the second polarity FET using only the first and second pads. Alternatively, the electrical structures may include resistors, diodes or ring oscillators. Appropriate measurements of each electrical structure allow a gradient field including a magnitude and direction of the effect of a process environment variation to be determined.
    Type: Application
    Filed: August 27, 2010
    Publication date: December 23, 2010
    Inventors: Brent A. Anderson, Edward J. Nowak, Noah D. Zamdmer
  • Patent number: 7408421
    Abstract: A device and method for determining a thermal absorption of a part of an integrated circuit (IC) are provided. A specially designed ring oscillator including a non-silicided poly-silicon resistor is used for the determination. The parameters of the ring oscillator are designed/tuned so that a delay of the ring oscillator varies predominantly with a variation in a resistance of the non-silicided poly-silicon resistor. The dimensions of the non-silicided poly-silicon resistor are large enough so that the resistance of the non-silicided poly-silicon resistor is immune to the small process variations of the poly-silicon length and width. The resistance of the non-silicided poly-silicon resistor varies with the thermal absorption of the part of the IC. As such, the thermal absorption of the part of the IC may be determined based on the delay of the ring oscillator.
    Type: Grant
    Filed: July 5, 2006
    Date of Patent: August 5, 2008
    Assignee: International Business Machines Corporation
    Inventors: Ishtiaq Ahsan, Edward P. Maciejewski, Noah D. Zamdmer
  • Publication number: 20080007354
    Abstract: A device and method for determining a thermal absorption of a part of an integrated circuit (IC) are provided. A specially designed ring oscillator including an un-silicided poly-silicon resistor is used for the determination. The parameters of the ring oscillator are designed/tuned so that a delay of the ring oscillator varies predominantly with a variation in a resistance of the un-silicided poly-silicon resistor. The dimensions of the un-silicided poly-silicon resistor are large enough so that the resistance of the un-silicided poly-silicon resistor is immune to the small process variations of the poly-silicon length and width. The resistance of the un-silicided poly-silicon resistor varies with the thermal absorption of the part of the IC. As such, the thermal absorption of the part of the IC may be determined based on the delay of the ring oscillator.
    Type: Application
    Filed: July 5, 2006
    Publication date: January 10, 2008
    Inventors: Ishtiaq Ahsan, Edward P. Maciejewski, Noah D. Zamdmer
  • Patent number: 6750109
    Abstract: A semiconductor chip includes a semiconductor substrate having a rectifying contact diffusion and a non-rectifying contact diffusion. A halo diffusion is adjacent the rectifying contact diffusion and no halo diffusion is adjacent the non-rectifying contact diffusion. The rectifying contact diffusion can be a source/drain diffusion of an FET to improve resistance to punch-through. The non-rectifying contact diffusion may be an FET body contact, a lateral diode contact, or a resistor or capacitor contact. Avoiding a halo for non-rectifying contacts reduces series resistance and improves device characteristics. In another embodiment on a chip having devices with halos adjacent diffusions, no halo diffusion is adjacent a rectifying contact diffusion of a lateral diode, significantly improving ideality of the diode and increasing breakdown voltage.
    Type: Grant
    Filed: July 1, 2002
    Date of Patent: June 15, 2004
    Assignee: International Business Machines Corporation
    Inventors: James A. Culp, Jawahar P. Nayak, Werner A. Rausch, Melanie J. Sherony, Steven H. Voldman, Noah D. Zamdmer
  • Publication number: 20020149058
    Abstract: A semiconductor chip includes a semiconductor substrate having a rectifying contact diffusion and a non-rectifying contact diffusion. A halo diffusion is adjacent the rectifying contact diffusion and no halo diffusion is adjacent the non-rectifying contact diffusion. The rectifying contact diffusion can be a source/drain diffusion of an FET to improve resistance to punch-through. The non-rectifying contact diffusion may be an FET body contact, a lateral diode contact, or a resistor or capacitor contact. Avoiding a halo for non-rectifying contacts reduces series resistance and improves device characteristics. In another embodiment on a chip having devices with halos adjacent diffusions, no halo diffusion is adjacent a rectifying contact diffusion of a lateral diode, significantly improving ideality of the diode and increasing breakdown voltage.
    Type: Application
    Filed: July 1, 2002
    Publication date: October 17, 2002
    Applicant: International Business Machines Corporation
    Inventors: James A. Culp, Jawahar P. Nayak, Werner A. Rausch, Melanie J. Sherony, Steven H. Voldman, Noah D. Zamdmer
  • Patent number: 6429482
    Abstract: A semiconductor chip includes a semiconductor substrate having a rectifying contact diffusion and a non-rectifying contact diffusion. A halo diffusion is adjacent the rectifying contact diffusion and no halo diffusion is adjacent the non-rectifying contact diffusion. The rectifying contact diffusion can be a source/drain diffusion of an FET to improve resistance to punch-through. The non-rectifying contact diffusion may be an FET body contact, a lateral diode contact, or a resistor or capacitor contact. Avoiding a halo for non-rectifying contacts reduces series resistance and improves device characteristics. In another embodiment on a chip having devices with halos adjacent diffusions, no halo diffusion is adjacent a rectifying contact diffusion of a lateral diode, significantly improving ideality of the diode and increasing breakdown voltage.
    Type: Grant
    Filed: June 8, 2000
    Date of Patent: August 6, 2002
    Assignee: International Business Machines Corporation
    Inventors: James A. Culp, Jawahar P. Nayak, Werner A. Rausch, Melanie J. Sherony, Steven H. Voldman, Noah D. Zamdmer