Patents by Inventor Noboru Ohtani
Noboru Ohtani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11081347Abstract: In this method for manufacturing a semiconductor element, a modified layer produced by subjecting a substrate (70) to mechanical polishing is removed by heating the substrate (70) under Si vapor pressure. An epitaxial layer formation step, an ion implantation step, an ion activation step, and a second removal step are then performed. In the second removal step, macro-step bunching and insufficient ion-implanted portions of the surface of the substrate (70) performed the ion activation step are removed by heating the substrate (70) under Si vapor pressure. After that, an electrode formation step in which electrodes are formed on the substrate (70) is performed.Type: GrantFiled: February 27, 2018Date of Patent: August 3, 2021Assignee: KWANSEI GAKUIN EDUCATIONAL FOUNDATIONInventors: Tadaaki Kaneko, Noboru Ohtani, Kenta Hagiwara
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Publication number: 20180233358Abstract: In this method for manufacturing a semiconductor element, a modified layer produced by subjecting a substrate (70) to mechanical polishing is removed by heating the substrate (70) under Si vapor pressure. An epitaxial layer formation step, an ion implantation step, an ion activation step, and a second removal step are then performed. In the second removal step, macro-step bunching and insufficient ion-implanted portions of the surface of the substrate (70) performed the ion activation step are removed by heating the substrate (70) under Si vapor pressure. After that, an electrode formation step in which electrodes are formed on the substrate (70) is performed.Type: ApplicationFiled: February 27, 2018Publication date: August 16, 2018Applicant: KWANSEI GAKUIN EDUCATIONAL FOUNDATIONInventors: Tadaaki Kaneko, Noboru Ohtani, Kenta Hagiwara
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Patent number: 9978597Abstract: This method for treating a surface of a SiC substrate includes a first removal step in which a modified layer produced by subjecting the substrate (70) to mechanical polishing or chemical-mechanical polishing is removed by heating the substrate (70) under Si vapor pressure. A second removal step in which macro-step bunching occurred in an epitaxial layer (71) is removed by heating the substrate (70) under Si vapor pressure may also be performed. Since the etching rate can be varied, etching rate in the first removal step is high, so that the modified layer can be removed in a short time. Meanwhile, etching rate in the second removal step is comparatively low, so that excessive removal of the epitaxial layer (71) can be prevented.Type: GrantFiled: June 6, 2014Date of Patent: May 22, 2018Assignee: KWANSEI GAKUIN EDUCATIONAL FOUNDATIONInventors: Tadaaki Kaneko, Noboru Ohtani, Kenta Hagiwara
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Patent number: 9941116Abstract: In this method for manufacturing a semiconductor element, a modified layer produced by subjecting a substrate (70) to mechanical polishing is removed by heating the substrate (70) under Si vapor pressure. An epitaxial layer formation step, an ion implantation step, an ion activation step, and a second removal step are then performed. In the second removal step, macro-step bunching and insufficient ion-implanted portions of the surface of the substrate (70) performed the ion activation step are removed by heating the substrate (70) under Si vapor pressure. After that, an electrode formation step in which electrodes are formed on the substrate (70) is performed.Type: GrantFiled: June 6, 2014Date of Patent: April 10, 2018Assignee: KWANSEI GAKUIN EDUCATIONAL FOUNDATIONInventors: Tadaaki Kaneko, Noboru Ohtani, Kenta Hagiwara
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Patent number: 9915011Abstract: The invention provides a low resistivity silicon carbide single crystal wafer for fabricating semiconductor devices having excellent characteristics. The low resistivity silicon carbide single crystal wafer has a specific volume resistance of 0.001 ?cm to 0.012 ?cm and 90% or greater of the entire wafer surface area is covered by an SiC single crystal surface of a roughness (Ra) of 1.0 nm or less.Type: GrantFiled: December 1, 2009Date of Patent: March 13, 2018Assignee: NIPPON STEEL & SUMITOMO METAL CORPORATIONInventors: Tatsuo Fujimoto, Noboru Ohtani, Masakazu Katsuno, Masashi Nakabayashi, Hirokatsu Yashiro
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Publication number: 20160118257Abstract: This method for treating a surface of a SiC substrate includes a first removal step in which a modified layer produced by subjecting the substrate (70) to mechanical polishing or chemical-mechanical polishing is removed by heating the substrate (70) under Si vapor pressure. A second removal step in which macro-step bunching occurred in an epitaxial layer (71) is removed by heating the substrate (70) under Si vapor pressure may also be performed. Since the etching rate can be varied, etching rate in the first removal step is high, so that the modified layer can be removed in a short time. Meanwhile, etching rate in the second removal step is comparatively low, so that excessive removal of the epitaxial layer (71) can be prevented.Type: ApplicationFiled: June 6, 2014Publication date: April 28, 2016Applicant: KWANSEI GAKUIN EDUCATIONAL FOUNDATIONInventors: Tadaaki Kaneko, Noboru Ohtani, Kenta Hagiwara
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Publication number: 20160111279Abstract: In this method for manufacturing a semiconductor element, a modified layer produced by subjecting a substrate (70) to mechanical polishing is removed by heating the substrate (70) under Si vapor pressure. An epitaxial layer formation step, an ion implantation step, an ion activation step, and a second removal step are then performed. In the second removal step, macro-step bunching and insufficient ion-implanted portions of the surface of the substrate (70) performed the ion activation step are removed by heating the substrate (70) under Si vapor pressure. After that, an electrode formation step in which electrodes are formed on the substrate (70) is performed.Type: ApplicationFiled: June 6, 2014Publication date: April 21, 2016Applicant: KWANSEI GAKUIN EDUCATIONAL FOUNDATIONInventors: Tadaaki Kaneko, Noboru Ohtani, Kenta Hagiwara
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Patent number: 9068277Abstract: The invention provides an apparatus for manufacturing good quality single-crystal silicon carbide stably without formation of cracks and the like, which apparatus comprises: at least a crucible for accommodating silicon carbide feedstock powder and seed crystal; heat insulation material installed around the crucible; and a heating device for heating the crucible, wherein the outer profile of the crucible includes at least one region of narrower diameter than a vertically adjacent region, insulation material is also installed in the space left by the diameter difference, and thickness of the insulation material at the narrower diameter region is greater than that of the insulation material at the vertically adjacent region. The apparatus for manufacturing single-crystal silicon carbide enables precise control of the temperature gradient inside the crucible, thereby enabling manufacture of good quality single-crystal silicon carbide.Type: GrantFiled: April 1, 2009Date of Patent: June 30, 2015Assignee: NIPPON STEEL & SUMITOMO METAL CORPORATIONInventors: Masashi Nakabayashi, Tatsuo Fujimoto, Hiroshi Tsuge, Masakazu Katsuno, Noboru Ohtani
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Patent number: 9029219Abstract: A method for manufacturing a semiconductor wafer includes a carbon layer formation step, a through hole formation step, a feed layer formation step, and an epitaxial layer formation step. In the carbon layer formation step, a carbon layer (71) is formed on a surface of a substrate (70) made of polycrystalline SiC. In the through hole formation step, through holes (71c) are formed in the carbon layer (71) formed on the substrate (70). In the feed layer formation step, a Si layer (72) and a 3C—SiC polycrystalline layer (73) are formed on a surface of the carbon layer (71). In the epitaxial layer formation step, the substrate (70) is heated so that a seed crystal made of 4H—SiC single crystal is formed on portions of the surface of the substrate (70) that are exposed through the through holes (71c), and a close-spaced liquid-phase epitaxial growth of the seed crystal is caused to form a 4H—SiC single crystal layer.Type: GrantFiled: August 24, 2012Date of Patent: May 12, 2015Assignees: Kwansei Gakuin Educational Foundation, Toyo Tanso Co., Ltd.Inventors: Tadaaki Kaneko, Noboru Ohtani, Shoji Ushio, Ayumu Adachi, Satoru Nogami
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Patent number: 8889570Abstract: Disclosed is a light-transmitting electromagnetic-shielding laminate, which is characterized in that two or more layers including an electromagnetic-shielding layer are arranged in layers using a (meth)acrylate adhesive composition which contains a (meth)acrylate monomer, a (meth)acrylate oligomer and at least one member selected from the group consisting of acrylic amide derivatives, silane compounds and organophosphorus compounds. Also disclosed is a light-transmitting radio wave absorber which is characterized in that a resistive layer, a dielectric spacer and a reflective layer are arranged in layers using a (meth)acrylate adhesive composition which contains a (meth)acrylate monomer, a (meth)acrylate oligomer and at least one member selected from the group consisting of acrylic amide derivatives, silane compounds and organophosphorus compounds.Type: GrantFiled: March 11, 2008Date of Patent: November 18, 2014Assignee: Mitsubishi Gas Chemical Company, IncInventors: Takatoshi Matsumura, Noboru Ohtani, Yoshiyuki Masuda, Masahiko Ishikawa, Yoshiya Kimura, Kyoko Nishizaki, Yoshitaka Masuda
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Publication number: 20140319539Abstract: A method for manufacturing a semiconductor wafer includes a carbon layer formation step, a through hole formation step, a feed layer formation step, and an epitaxial layer formation step. In the carbon layer formation step, a carbon layer (71) is formed on a surface of a substrate (70) made of polycrystalline SiC. In the through hole formation step, through holes (71c) are formed in the carbon layer (71) formed on the substrate (70). In the feed layer formation step, a Si layer (72) and a 3C—SiC polycrystalline layer (73) are formed on a surface of the carbon layer (71). In the epitaxial layer formation step, the substrate (70) is heated so that a seed crystal made of 4H—SiC single crystal is formed on portions of the surface of the substrate (70) that are exposed through the through holes (71c), and a close-spaced liquid-phase epitaxial growth of the seed crystal is caused to form a 4H—SiC single crystal layer.Type: ApplicationFiled: August 24, 2012Publication date: October 30, 2014Applicants: TOYO TANSO CO., LTD., KWANSEI GAKUIN EDUCATIONAL FOUNDATIONInventors: Tadaaki Kaneko, Noboru Ohtani, Shoji Ushio, Ayumu Adachi, Satoru Nogami
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Patent number: 8795624Abstract: Provided is a monocrystalline silicon carbide ingot containing a dopant element, wherein a maximum concentration of the dopant element is less than 5×1017 atoms/cm3 and the maximum concentration is 50 times or less than that of a minimum concentration of the dopant element. Also provided is a monocrystalline silicon carbide wafer made by cutting and polishing the monocrystalline silicon carbide ingot, wherein a electric resistivity at room temperature of the wafer is 5×103 ?cm or more. Further provided is a method for manufacturing the monocrystalline silicon carbide including growing the monocrystalline silicon carbide on a seed crystal from a sublimation material by a sublimation method. The sublimation material includes a solid material containing a dopant element, and the specific surface of the solid material containing the dopant element is 0.5 m2/g or less.Type: GrantFiled: October 5, 2005Date of Patent: August 5, 2014Assignee: Nippon Steel & Sumitomo Metal CorporationInventors: Masashi Nakabayashi, Tatsuo Fujimoto, Mitsuru Sawamura, Noboru Ohtani
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Patent number: 8673254Abstract: Provided is a monocrystalline silicon carbide ingot containing a dopant element, wherein a maximum concentration of the dopant element is less than 5×1017 atoms/cm3 and the maximum concentration is 50 times or less than that of a minimum concentration of the dopant element. Also provided is a monocrystalline silicon carbide wafer made by cutting and polishing the monocrystalline silicon carbide ingot, wherein a electric resistivity at room temperature of the wafer is 5×103 ?cm or more. Further provided is a method for manufacturing the monocrystalline silicon carbide including growing the monocrystalline silicon carbide on a seed crystal from a sublimation material by a sublimation method. The sublimation material includes a solid material containing a dopant element, and the specific surface of the solid material containing the dopant element is 0.5 m2/g or less.Type: GrantFiled: March 4, 2011Date of Patent: March 18, 2014Assignee: Nippon Steel & Sumitomo Metal CorporationInventors: Masashi Nakabayashi, Tatsuo Fujimoto, Mitsuru Sawamura, Noboru Ohtani
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Patent number: 8491719Abstract: The present invention provides a high resistivity, high quality, large size SiC single crystal, SiC single crystal wafer, and method of production of the same, that is, a silicon carbide single crystal containing uncompensated impurities in an atomic number density of 1×1015/cm3 or more and containing vanadium in an amount less than said uncompensated impurity concentration, silicon carbide single crystal wafer obtained by processing and polishing the silicon carbide single crystal and having an electrical resistivity at room temperature of 5×103 ?cm or more, and a method of production of a silicon carbide single crystal.Type: GrantFiled: May 29, 2009Date of Patent: July 23, 2013Assignee: Nippon Steel & Sumitomo Metal CorporationInventors: Masashi Nakabayashi, Tatsuo Fujimoto, Mitsuru Sawamura, Noboru Ohtani
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Patent number: 8178389Abstract: Provided is a monocrystalline silicon carbide ingot containing a dopant element, wherein a maximum concentration of the dopant element is less than 5×1017 atoms/cm3 and the maximum concentration is 50 times or less than that of a minimum concentration of the dopant element. Also provided is a monocrystalline silicon carbide wafer made by cutting and polishing the monocrystalline silicon carbide ingot, wherein a electric resistivity at room temperature of the wafer is 5×103 ?cm or more. Further provided is a method for manufacturing the monocrystalline silicon carbide including growing the monocrystalline silicon carbide on a seed crystal from a sublimation material by a sublimation method. The sublimation material includes a solid material containing a dopant element, and the specific surface of the solid material containing the dopant element is 0.5 m2/g or less.Type: GrantFiled: February 18, 2010Date of Patent: May 15, 2012Assignee: Nippon Steel CorporationInventors: Masashi Nakabayashi, Tatsuo Fujimoto, Mitsuru Sawamura, Noboru Ohtani
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Patent number: 8063391Abstract: The present invention provides a light-transmitting electromagnetic wave-shielding material for use in displays or in-vehicle panels each having a polarizing plate or a retardation plate, wherein the light-transmitting electromagnetic wave-shielding material undergoes no generation of light interference fringes and is satisfactory in visibility even through sunglasses, goggles, glare-proof panels or glare-proof window materials having polarizing capability. By using unstretched light-transmitting organic polymer materials low in molecular orientation or small in molecular orientation unevenness as the base substrate of an electromagnetic wave-shielding layer, the light-transmitting electromagnetic wave-shielding material excellent in light interference fringe prevention capability can be obtained.Type: GrantFiled: June 3, 2008Date of Patent: November 22, 2011Assignee: Mitsubishi Gas Chemical Company, Inc.Inventors: Takatoshi Matsumura, Masahiko Ishikawa, Yoshitaka Masuda, Noboru Ohtani, Yoshiya Kimura, Yoshiyuki Masuda, Noriyuki Kato
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Patent number: 8044408Abstract: The invention provides a high-quality SiC single-crystal substrate, a seed crystal for producing the high-quality SiC single-crystal substrate, and a method of producing the high-quality SiC single-crystal substrate, which enable improvement of device yield and stability. Provided is an SiC single-crystal substrate wherein, when the SiC single-crystal substrate is divided into 5-mm square regions, such regions in which dislocation pairs or dislocation rows having intervals between their dislocation end positions of 5 ?m or less are present among the dislocations that have ends at the substrate surface account for 50% or less of all such regions within the substrate surface and the dislocation density in the substrate of dislocations other than the dislocation pairs or dislocation is 8,000/cm2.Type: GrantFiled: May 20, 2009Date of Patent: October 25, 2011Assignee: Nippon Steel CorporationInventors: Tatsuo Fujimoto, Kohei Tatsumi, Taizo Hoshino, Masakazu Katsuno, Noboru Ohtani, Masashi Nakabayashi, Hiroshi Tsuge, Housei Hirano, Hirokatsu Yashiro
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Publication number: 20110180765Abstract: Provided is a monocrystalline silicon carbide ingot containing a dopant element, wherein a maximum concentration of the dopant element is less than 5×1017 atoms/cm3 and the maximum concentration is 50 times or less than that of a minimum concentration of the dopant element. Also provided is a monocrystalline silicon carbide wafer made by cutting and polishing the monocrystalline silicon carbide ingot, wherein a electric resistivity at room temperature of the wafer is 5×103 ?cm or more. Further provided is a method for manufacturing the monocrystalline silicon carbide including growing the monocrystalline silicon carbide on a seed crystal from a sublimation material by a sublimation method. The sublimation material includes a solid material containing a dopant element, and the specific surface of the solid material containing the dopant element is 0.5 m2/g or less.Type: ApplicationFiled: March 4, 2011Publication date: July 28, 2011Inventors: Masashi Nakabayashi, Tatsuo Fujimoto, Mitsuru Sawamura, Noboru Ohtani
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Patent number: 7972704Abstract: The present invention provides a single-crystal silicon carbide ingot capable of providing a good-quality substrate low in dislocation defects, and a substrate and epitaxial wafer obtained therefrom. It is a single-crystal silicon carbide ingot comprising single-crystal silicon carbide which contains donor-type impurity at a concentration of 2×1018 cm?3 to 6×1020 cm?3 and acceptor-type impurity at a concentration of 1×1018 cm?3 to 5.99×1020 cm?3 and wherein the concentration of the donor-type impurity is greater than the concentration of the acceptor-type impurity and the difference is 1×1018 cm?3 to 5.99×1020 cm?3, and a substrate and epitaxial wafer obtained therefrom.Type: GrantFiled: January 14, 2009Date of Patent: July 5, 2011Assignee: Nippon Steel CorporationInventors: Noboru Ohtani, Masakazu Katsuno, Hiroshi Tsuge, Masashi Nakabayashi, Tatsuo Fujimoto
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Publication number: 20100295059Abstract: The invention provides a high-quality SiC single-crystal substrate, a seed crystal for producing the high-quality SiC single-crystal substrate, and a method of producing the high-quality SiC single-crystal substrate, which enable improvement of device yield and stability. Provided is an SiC single-crystal substrate wherein, when the SiC single-crystal substrate is divided into 5-mm square regions, such regions in which dislocation pairs or dislocation rows having intervals between their dislocation end positions of 5 ?m or less are present among the dislocations that have ends at the substrate surface account for 50% or less of all such regions within the substrate surface and the dislocation density in the substrate of dislocations other than the dislocation pairs or dislocation is 8,000/cm2.Type: ApplicationFiled: May 20, 2009Publication date: November 25, 2010Applicant: NIPPON STEEL CORPORATIONInventors: Tatsuo FUJIMOTO, Kohei TATSUMI, Taizo HOSHINO, Masakazu KATSUNO, Noboru OHTANI, Masashi NAKABAYASHI, Hiroshi TSUGE, Housei HIRANO, Hirokatsu YASHIRO