Abstract: A write-back cache device of an embodiment includes a first storage device capable of storing n pieces of unit data in each of a plurality of cache lines, a second storage device configured to store state instruction data in each of the plurality of cache lines, and a cache controller configured to control inputting to and outputting from the first and second storage devices. The state instruction data has a first value when data in a cache line is not different from data in a main memory, has a second value when two or more pieces of unit data are different from data in the main memory, or has a third value when only one piece of unit data is different from data in the main memory.

Abstract: A write-back cache device of an embodiment includes a first storage device capable of storing n pieces of unit data in each of a plurality of cache lines, a second storage device configured to store state instruction data in each of the plurality of cache lines, and a cache controller configured to control inputting to and outputting from the first and second storage devices. The state instruction data has a first value when data in a cache line is not different from data in a main memory, has a second value when two or more pieces of unit data are different from data in the main memory, or has a third value when only one piece of unit data is different from data in the main memory.

Abstract: According to the embodiments, a semiconductor device includes: an adder configured to generate positive multiple data of the multiplicand which is used for a plurality of the multiplication in plurality and does not include a value of 2n (n is a positive integer) of the multiplicand; a Wallace tree circuit provided in each of the multiplier circuits and configured to operate a sum of a plurality of partial products by using a plurality of adders; and a selection circuit provided in each of the multiplier circuits and configured to select, according to a plurality of bits selected from the multiplier, data falling in a multiple of one of the multiplicand, data of 2n of the multiplicand, and the positive multiple data from the adder in order to output as one partial product of the plurality of partial products to the Wallace tree circuit.

Abstract: According to the embodiments, a semiconductor device includes: an adder configured to generate positive multiple data of the multiplicand which is used for a plurality of the multiplication in plurality and does not include a value of 2n (n is a positive integer) of the multiplicand; a Wallace tree circuit provided in each of the multiplier circuits and configured to operate a sum of a plurality of partial products by using a plurality of adders; and a selection circuit provided in each of the multiplier circuits and configured to select, according to a plurality of bits selected from the multiplier, data falling in a multiple of one of the multiplicand, data of 2n of the multiplicand, and the positive multiple data from the adder in order to output as one partial product of the plurality of partial products to the Wallace tree circuit.

Abstract: A parts mounting system includes: a parts checking section that detects parts information which is identification information applied to the electronic parts and includes a parts code for specifying parts of the electronic parts and a parts maker code for specifying the parts maker and checks the detected parts information with parts information previously registered in a storing part; and a parts data generation section that, when the detected parts information is unregistered parts information in which the parts code is stored in the storing part and the parts maker code of the parts code is not stored in the storing part, generates parts data of the electronic parts relating to the unregistered parts information based on previously registered parts data having the same parts code.

Abstract: According to an embodiment, an information processing apparatus includes a cache memory and a cache controller. The cache controller includes a first circuit, a second circuit and a third circuit. The first control circuit is configured to store a designated address range for a process of cache maintenance. The second circuit is configured to determine whether or not the addresses to be accessed for the cache memory by the information processing apparatus are within the designated address range. The third circuit is configured to store reservation information for reserving execution of a process of cache maintenance for cache lines corresponding to addresses within the designated address range.

Abstract: An operator support system includes a controller which controls a component mounting apparatus. The controller includes: an input unit which receives an operator ID; a display unit which displays an operation instruction content or an operation learning content with respect to the operator; a memory unit which stores, in correspondence with the operator ID, an operator level and display history of the operation learning content; and an arithmetic processing unit which determines, at a time of executing an operation, the operation instruction content or the operation learning content to be displayed by the display unit, based on the operator ID input into the input unit, and the operator level and the display history corresponding to the input operator ID.

Abstract: A parts mounting system includes: a parts checking section that detects parts information which is identification information applied to the electronic parts and includes a parts code for specifying parts of the electronic parts and a parts maker code for specifying the parts maker and checks the detected parts information with parts information previously registered in a storing part; and a parts data generation section that, when the detected parts information is unregistered parts information in which the parts code is stored in the storing part and the parts maker code of the parts code is not stored in the storing part, generates parts data of the electronic parts relating to the unregistered parts information based on previously registered parts data having the same parts code.

Abstract: A part model creation unit creates part models necessary for the assembly of a three-dimensional object model, in the form of three-dimensional part models having junction reference data for joining to other part models, and stores them in a part storage unit. An assembly processing unit selects at least two part models from the part storage unit for the arrangement in a work coordinate space and joins the part models together on the basis of the junction reference point data to thereby assemble a three-dimensional object model.