Patents by Inventor Nobuhisa Sakaguchi
Nobuhisa Sakaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7633476Abstract: A display element drive unit is provided with a power-on time display section which separately presets grayscale display digital data to output a grayscale display level voltage different from a grayscale display level voltage based on incoming display data signal to the display elements during a given period between power-on of the display panel and output of the grayscale display level voltage based on the incoming display data signal. With this arrangement, the present invention provides a display element drive unit capable of easing an instantaneous display of distorted image that occurs in a given period at power-on of the panel while minimizing increase of a circuit scale; a display device including the display element drive unit; and a display element drive method.Type: GrantFiled: October 3, 2005Date of Patent: December 15, 2009Assignee: Sharp Kabushiki KaishaInventor: Nobuhisa Sakaguchi
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Patent number: 7307610Abstract: A display driving device includes: a tone voltage generating circuit generating as many standard voltages as tones; and a DA converter circuit selecting one of the standard voltages in accordance with display data and outputting the selected standard voltage, and applies a tone display voltage to data signal lines of an active matrix scheme display panel. In the tone voltage generating circuit are there provided: a resistance dividing circuit generating as many standard voltages as tones, the standard voltages having voltage values between an upper limit voltage and a lower limit voltage; and an adjusting circuit generating the upper limit voltage and the lower limit voltage. A reference voltage regulated by an electronic volume control provided externally to the tone voltage generating circuit is supplied to the adjusting circuit, and both the upper limit voltage and the lower limit voltage are varied in accordance with the reference voltage.Type: GrantFiled: April 24, 2003Date of Patent: December 11, 2007Assignee: Sharp Kabushiki KaishaInventor: Nobuhisa Sakaguchi
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Patent number: 7161591Abstract: This driving device for a display apparatus includes display driving circuit element regions, which are physically separated for a plurality of display data, respectively. In each of the display driving circuit element regions, the driving device includes at least a display data capturing portion for capturing display data corresponding to the region; a holding portion for latching the captured display data for a predetermined period of time; a reference voltage generating portion for generating a predetermined number of reference voltages for gray-scale display; and a selecting portion for selecting a reference voltage corresponding to the latched display data from the generated reference voltages for gray-scale display, wherein the reference voltage selected for each of the plurality of display data is output to the display apparatus as a display driving signal.Type: GrantFiled: January 22, 2003Date of Patent: January 9, 2007Assignee: Sharp Kabushiki KaishaInventor: Nobuhisa Sakaguchi
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Publication number: 20060071892Abstract: A display element drive unit is provided with a power-on time display section which separately presets grayscale display digital data to output a grayscale display level voltage different from a grayscale display level voltage based on incoming display data signal to the display elements during a given period between power-on of the display panel and output of the grayscale display level voltage based on the incoming display data signal. With this arrangement, the present invention provides a display element drive unit capable of easing an instantaneous display of distorted image that occurs in a given period at power-on of the panel while minimizing increase of a circuit scale; a display device including the display element drive unit; and a display element drive method.Type: ApplicationFiled: October 3, 2005Publication date: April 6, 2006Inventor: Nobuhisa Sakaguchi
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Patent number: 7006114Abstract: A standard voltage generating circuit generates standard voltages as many as the number of gradations. Then, the standard voltages are separated into standard voltages of high level and those of low level, by a selector circuit, regardless of polarities thereof. One of the standard voltages of high level thus separated by the selector circuit is selected by a Pch-arranged converting section of a D/A converting circuit. Then, the selected one of the standard voltages of high level is outputted as a gradation-display-use voltage. Meanwhile, One of the standard voltages of low level thus separated by the selector circuit is selected by an Nch-arranged converting section of the D/A converting circuit. Then, the selected one of the standard voltages of low level is outputted as a gradation-display-use voltage. With this arrangement, it is possible to attain miniaturization of a circuit and lower power consumption in a display apparatus which performs gradation display by a voltage modulation method.Type: GrantFiled: January 21, 2003Date of Patent: February 28, 2006Assignee: Sharp Kabushiki KaishaInventor: Nobuhisa Sakaguchi
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Publication number: 20050184979Abstract: The present invention provides a liquid crystal display device that achieves increase in operating speed of a drive circuit, reduction in load of signal source, low power consumption, and improvement in reliability of electric conduction between a liquid crystal display section and a liquid crystal driver. The liquid crystal display device includes a liquid crystal display section 44, a source driver 30 having an input latch circuit 48 and circuits 33 to 37, and 39 each of which samples gradation displaying data signal R,G, or B outputted from a control circuit 45 and holds the signal in output terminals thereof for a predetermined period. The circuits 33 to 37, and 39 are each formed of a p-Si thin film on a glass substrate 43 on which the liquid crystal display section 44 is provided. Moreover, the input latch circuit 48 is formed inside a logic circuit 41 formed on a monocrystal silicon substrate.Type: ApplicationFiled: February 18, 2005Publication date: August 25, 2005Inventor: Nobuhisa Sakaguchi
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Patent number: 6864562Abstract: A semiconductor device of the present invention has (1) an active element provided on a semiconductor substrate, (2) an interlayer insulating film formed so as to cover the active element, (3) a pad metal for an electrode pad which is provided on the interlayer insulating film, (4) a barrier metal layer which is provided on the active element with the interlayer insulating film therebetween, so that the pad metal is formed on the barrier metal layer, and (5) an insulating layer having high adherence to the barrier metal layer, the insulating layer being provided between the interlayer insulating film and the barrier metal layer. With this arrangement, the adherence between the barrier metal layer, the insulating film and the interlayer insulating film is surely improved, and even in the case where an external force is applied to the electrode pad upon bonding or after bonding, the barrier metal layer hardly comes off the part thereunder.Type: GrantFiled: June 21, 2000Date of Patent: March 8, 2005Assignee: Sharp Kabushiki KaishaInventors: Kenji Toyosawa, Atsushi Ono, Yasunori Chikawa, Nobuhisa Sakaguchi, Nakae Nakamura, Yukinori Nakata
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Patent number: 6697041Abstract: A display drive device of the present invention includes a plurality of cascade connected source driver LSI chips for driving a liquid crystal panel in accordance with an image data signal, and each of the source driver LSI chips includes: a shift register for shifting and transmitting a start pulse signal in synchronization with a clock signal; a sampling memory for sampling the image data signal in accordance with an output of the shift register; and a hold memory for latching a selected image data signal in accordance with a latch signal, wherein a delay circuit for generating the latch signal by delaying the start pulse signal supplied by the shift register in each of the source driver LSI chips is disposed. This arrangement enables the whole device, including a controller, etc., to be produced in a smaller size and at a lower cost.Type: GrantFiled: January 5, 2000Date of Patent: February 24, 2004Assignee: Sharp Kabushiki KaishaInventors: Shigeki Tamai, Nobuhisa Sakaguchi
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Patent number: 6650002Abstract: A semiconductor device of the present invention has (1) an active element provided on a semiconductor substrate, (2) an interlayer insulating film formed so as to cover the active element, (3) a pad metal for an electrode pad which is provided on the interlayer insulating film, (4) a barrier metal layer which is provided on the active element with the interlayer insulating film therebetween, so that the pad metal is i formed on the barrier metal layer, and (5) an insulating layer having high adherence to the barrier metal layer, the insulating layer being provided between the interlayer insulating film and the barrier metal layer. With this arrangement, the adherence between the barrier metal layer, the insulating film and the interlayer insulating film is surely improved, even in the case where an external force is applied to the electrode pad upon bonding or after bonding, the barrier metal layer hardly comes off the part thereunder.Type: GrantFiled: June 21, 2000Date of Patent: November 18, 2003Assignee: Sharp Kabushiki KaishiInventors: Kenji Toyosawa, Atsushi Ono, Yasunori Chikawa, Nobuhisa Sakaguchi, Nakae Nakamura, Yukinori Nakata
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Publication number: 20030201959Abstract: A display driving device includes: a tone voltage generating circuit generating as many standard voltages as tones; and a DA converter circuit selecting one of the standard voltages in accordance with display data and outputting the selected standard voltage, and applies a tone display voltage to data signal lines of an active matrix scheme display panel. In the tone voltage generating circuit are there provided: a resistance dividing circuit generating as many standard voltages as tones, the standard voltages having voltage values between an upper limit voltage and a lower limit voltage; and an adjusting circuit generating the upper limit voltage and the lower limit voltage. A reference voltage regulated by an electronic volume control provided externally to the tone voltage generating circuit is supplied to the adjusting circuit, and both the upper limit voltage and the lower limit voltage are varied in accordance with the reference voltage.Type: ApplicationFiled: April 24, 2003Publication date: October 30, 2003Inventor: Nobuhisa Sakaguchi
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Patent number: 6621478Abstract: A liquid crystal drive device includes: a shift register circuit for transfer a start pulse signal SP in synchronism with a clock signal CK; an input latch circuit for picking up display data DR, DG, and DB in synchronism with the clock signal CK; and a sampling memory circuit for sampling and storing the display data DR, DG, and DB according to the transferred start pulse signal SP, wherein the input latch circuit is adapted to pick up the display data DR, DG, and DB at both a leading edge and a trailing edge of the clock signal CK. The liquid crystal drive device provides a versatile solution to improvement of the resolution of the liquid crystal display.Type: GrantFiled: November 28, 2000Date of Patent: September 16, 2003Assignee: Sharp Kabushiki KaishaInventors: Nobuhisa Sakaguchi, Yoshinori Ogawa
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Publication number: 20030164843Abstract: This driving device for a display apparatus includes display driving circuit element regions, which are physically separated for a plurality of display data, respectively. In each of the display driving circuit element regions, the driving device includes at least a display data capturing portion for capturing display data corresponding to the region; a holding portion for latching the captured display data for a predetermined period of time; a reference voltage generating portion for generating a predetermined number of reference voltages for gray-scale display; and a selecting portion for selecting a reference voltage corresponding to the latched display data from the generated reference voltages for gray-scale display, wherein the reference voltage selected for each of the plurality of display data is output to the display apparatus as a display driving signal.Type: ApplicationFiled: January 22, 2003Publication date: September 4, 2003Inventor: Nobuhisa Sakaguchi
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Patent number: 6603466Abstract: A semiconductor device includes source drivers connected in cascade, each of which is provided with a data latch output circuit for converting input display data into parallel data and a data output control circuit for converting the display data into serial data and outputting the serial data to the next source driver. The data latch output circuit divides and fetches the display data at both of the leading and trailing edges of a transfer-use clock signal of each source driver. With this structure, the clock frequency of the transfer-use clock signal can be made lower than a necessary data transfer rate of the display data while stabilizing the transfer of the display data. It is therefore possible to widen the operating frequency range of the transfer-use clock signal, and provide a highly reliable semiconductor device and a display device module using the semiconductor device.Type: GrantFiled: June 22, 2000Date of Patent: August 5, 2003Assignee: Sharp Kabushiki KaishaInventors: Nobuhisa Sakaguchi, Yoshinori Ogawa
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Publication number: 20030137526Abstract: A standard voltage generating circuit generates standard voltages as many as the number of gradations. Then, the standard voltages are separated into standard voltages of high level and those of low level, by a selector circuit, regardless of polarities thereof. One of the standard voltages of high level thus separated by the selector circuit is selected by a Pch-arranged converting section of a D/A converting circuit. Then, the selected one of the standard voltages of high level is outputted as a gradation-display-use voltage. Meanwhile, One of the standard voltages of low level thus separated by the selector circuit is selected by an Nch-arranged converting section of the D/A converting circuit. Then, the selected one of the standard voltages of low level is outputted as a gradation-display-use voltage. With this arrangement, it is possible to attain miniaturization of a circuit and lower power consumption in a display apparatus which performs gradation display by a voltage modulation method.Type: ApplicationFiled: January 21, 2003Publication date: July 24, 2003Inventor: Nobuhisa Sakaguchi
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System construction of semiconductor devices and liquid crystal display device module using the same
Patent number: 6476789Abstract: A system construction of semiconductor devices, in which a plurality of semiconductor devices of similar properties are cascaded, each of the semiconductor devices including a clock half-period delaying means which delays a propagation and a reference signal by a half period of the reference signal relative to the input signals before outputting the signals. The propagation signal and the reference signal are cascaded and propagated to the plurality of semiconductors.Type: GrantFiled: November 16, 1999Date of Patent: November 5, 2002Assignee: Sharp Kabushiki KaishaInventors: Nobuhisa Sakaguchi, Shigeki Tamai -
Patent number: 6441467Abstract: A semiconductor device of the present invention has (1) an active element provided on a semiconductor substrate, (2) an interlayer insulating film formed so as to cover the active element, (3) a pad metal for an electrode pad which is provided on the interlayer insulating film, (4) a barrier metal layer which is provided on the active element with the interlayer insulating film therebetween, so that the pad metal is formed on the barrier metal layer, and (5) an insulating layer having high adherence to the barrier metal layer, the insulating layer being provided between the interlayer insulating film and the barrier metal layer. With this arrangement, the adherence between the barrier metal layer, the insulating film and the interlayer insulating film is surely improved, and even in the case where an external force is applied to the electrode pad upon bonding or after bonding, the barrier metal layer hardly comes off the part thereunder.Type: GrantFiled: April 22, 1998Date of Patent: August 27, 2002Assignee: Sharp Kabushiki KaishaInventors: Kenji Toyosawa, Atsushi Ono, Yasunori Chikawa, Nobuhisa Sakaguchi, Nakae Nakamura, Yukinori Nakata
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Publication number: 20020000659Abstract: A semiconductor device of the present invention has (1) an active element provided on a semiconductor substrate, (2) an interlayer insulating film formed so as to cover the active element, (3) a pad metal for an electrode pad which is provided on the interlayer insulating film, (4) a barrier metal layer which is provided on the active element with the interlayer insulating film therebetween, so that the pad metal is formed on the barrier metal layer, and (5) an insulating layer having high adherence to the barrier metal layer, the insulating layer being provided between the interlayer insulating film and the barrier metal layer. With this arrangement, the adherence between the barrier metal layer, the insulating film and the interlayer insulating film is surely improved, and even in the case where an external force is applied to the electrode pad upon bonding or after bonding, the barrier metal layer hardly comes off the part thereunder.Type: ApplicationFiled: April 22, 1998Publication date: January 3, 2002Inventors: KENJI TOYOSAWA, ATSUSHI ONO, YASUNORI CHIKAWA, NOBUHISA SAKAGUCHI, NAKAE NAKAMURA, YUKINORI NAKATA