Patents by Inventor Nobuyuki Uemura

Nobuyuki Uemura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8126673
    Abstract: The invention offers a calculation method and program capable of performing line-by-line calculations using a Voigt function at speeds of 50-100 times what is conventional. The Voigt function is divided into a first range around the peak and a skirt portion not contained in the first range. The first range is replaced by a cubic function, and the skirt portion is taken as the Voigt function to perform calculations in predetermined ranges of equal intervals. Furthermore, the peak area of the first range is replaced by a cubic function, and the skirt portion is taken as a function representing the difference between the Voigt function and the cubic function to perform calculations in second predetermined intervals smaller than the aforementioned first predetermined intervals. This is repeated until the desired level of precision is reached. Additionally, interpolation is performed by dividing these predetermined intervals into four or five parts.
    Type: Grant
    Filed: August 26, 2004
    Date of Patent: February 28, 2012
    Assignee: Fujitsu FIP Corporation
    Inventor: Nobuyuki Uemura
  • Patent number: 7309794
    Abstract: Episulfide compounds useful as starting materials of optical materials are stably stored for a long period of time at a temperature ranging from their solidifying points to 20° C., preventing the production or precipitation of polymers and the yellowing.
    Type: Grant
    Filed: November 7, 2000
    Date of Patent: December 18, 2007
    Assignee: Mitsubishi Gas Chemical Co., Inc.
    Inventors: Akikazu Amagai, Yuichi Yoshimura, Motoharu Takeuchi, Atsuki Niimi, Hiroshi Horikoshi, Masanori Shimuta, Nobuyuki Uemura
  • Publication number: 20070097122
    Abstract: The invention offers a calculation method and program capable of performing line-by-line calculations using a Voigt function at speeds of 50-100 times what is conventional. The Voigt function is divided into a first range around the peak and a skirt portion not contained in the first range. The first range is replaced by a cubic function, and the skirt portion is taken as the Voigt function to perform calculations in predetermined ranges of equal intervals. Furthermore, the peak area of the first range is replaced by a cubic function, and the skirt portion is taken as a function representing the difference between the Voigt function and the cubic function to perform calculations in second predetermined intervals smaller than the aforementioned first predetermined intervals. This is repeated until the desired level of precision is reached. Additionally, interpolation is performed by dividing these predetermined intervals into four or five parts.
    Type: Application
    Filed: August 26, 2004
    Publication date: May 3, 2007
    Applicant: FUJITSU FIP CORPORATION
    Inventor: Nobuyuki Uemura
  • Patent number: 6810057
    Abstract: A semiconductor device having a plurality of semiconductor laser elements is provided, which is capable of reducing an interval of emission points between the semiconductor laser elements and also capable of preventing heat generated by a semiconductor laser element from affecting other semiconductor elements. A concave portion is formed on a silicon substrate, and a protrusion of a quadrangular truncated pyramidal shape consisting of slanted faces of a (1 1 1) plane, a (1 {overscore (1)} 1) plane, a ({overscore (1)} {overscore (1)} 1) plane and a ({overscore (1)} 1 1) plane is formed near the center of the concave portion by using the silicon process. Among these slanted faces, a (1 1 1) outer face and a (1 1 1) inner face are determined to be reflecting mirror surfaces.
    Type: Grant
    Filed: November 22, 2000
    Date of Patent: October 26, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kunio Itoh, Nobuyuki Uemura, Masaaki Yuri
  • Publication number: 20030149231
    Abstract: The episulfide compound of the present invention has, in one molecule, one or more epithio structures represented by the following Formula 1: 1
    Type: Application
    Filed: September 27, 2002
    Publication date: August 7, 2003
    Inventors: Akikazu Amagai, Yuichi Yoshimura, Motoharu Takeuchi, Atsuki Niimi, Hiroshi Horikoshi, Masanori Shimuta, Nobuyuki Uemura
  • Patent number: 6344375
    Abstract: A substrate containing a compound semiconductor layer comprises a substrate layer 11, a first semiconductor layer 12 formed on the substrate layer 11, and a second semiconductor layer 13 made of a Group III nitride-based compound semiconductor formed on the first semiconductor layer 12. The semiconductor layer 12 is provided with a plurality of pores 14. Thus, a compound semiconductor layer containing a Group III nitride-based compound semiconductor with excellent surface planarity and crystallinity can be provided, as well as a method for manufacturing the same, and a semiconductor device using the same.
    Type: Grant
    Filed: July 20, 1999
    Date of Patent: February 5, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd
    Inventors: Kenji Orita, Masahiro Isida, Shinji Nakamura, Masaaki Yuri, Nobuyuki Uemura
  • Patent number: 6281522
    Abstract: First of all, a semiconductor substrate which consists of SiC is soaked for ten minutes in a buffered hydrofluoric acid, thereby the oxidized film formed on the surface of the semiconductor substrate being etched. Then, TMA, NH3, TMG, and hydrogen for carrier are supplied at the rates of 10 &mgr;mol/min., 2.5 L/min., and 2 L/min., respectively to the semiconductor substrate at a temperature of 1090° C. by using MOVPE, thereby a buffer layer which consists of single crystal AlN and has a thickness of 15 nm being grown on the main surface of the semiconductor substrate. After lowering the temperature to 800° C., TMA, TMG, TMI, and NH3are supplied at the rates of 0.2 &mgr;mol/min., 2 &mgr;mol/min., 20 &mgr;mol/min., and 5 L/min., respectively, thereby a single crystal layer which consists of AlGaInN being grown on the buffer layer.
    Type: Grant
    Filed: February 3, 1999
    Date of Patent: August 28, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akihiko Ishibashi, Yuzaburo Ban, Yoshihiro Hara, Nobuyuki Uemura, Masahiro Kume
  • Patent number: 6165812
    Abstract: The method for producing gallium nitride group compound semiconductor includes the steps of: forming a polycrystalline nitride layer 11a in a first temperature range on a substrate 10; forming a nucleus layer 11b of gallium nitride single crystals in a second temperature range on the polycrystalline nitride layer 11a; growing the nucleus layer 11b of gallium nitride single crystals in a third temperature range such that resulting crystals of the nucleus layer 11b of gallium nitride single crystals come into contact with each other in a direction parallel to a surface of the substrate 10; and growing the nucleus layer 11b of gallium nitride single crystals in a fourth temperature range in a direction vertical to the surface of the substrate 10.
    Type: Grant
    Filed: September 19, 1997
    Date of Patent: December 26, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akihiko Ishibashi, Yuuzaburou Ban, Hidemi Takeisi, Nobuyuki Uemura, Masahiro Kume, Isao Kidoguchi
  • Patent number: 6030849
    Abstract: On an entire surface of a substrate of sapphire having a projection with a width in the lateral direction of approximately 10 .mu.m thereon, a first semiconductor layer of Al.sub.y Ga.sub.1-y N and a second semiconductor layer of In.sub.x Ga.sub.1-x N are successively grown by MOVPE. In this manner, an island-like stacked substance including the isolated first semiconductor layer and the isolated second semiconductor layer can be formed on the top surface of the projection of the substrate.
    Type: Grant
    Filed: June 15, 1998
    Date of Patent: February 29, 2000
    Assignee: Matsushita Electric Industrial Co. Ltd.
    Inventors: Yoshiaki Hasegawa, Akihiko Ishibashi, Nobuyuki Uemura, Yuzaburo Ban, Masahiro Kume, Yoshihiro Hara, Isao Kidoguchi, Ayumu Tsujimura
  • Patent number: 5945504
    Abstract: An episulfide which has an alicyclic, aromatic or heterocyclic skeleton and has two or more moieties represented by the formula ##STR1## wherein X is S or O, and S is in an amount of 50% or more, on the average, of the total of S and O constituting a three-membered ring. A cured material obtained by polymerizing this episulfide compound is a desirable optical material for various uses, particularly as a lens material for spectacles.
    Type: Grant
    Filed: January 13, 1997
    Date of Patent: August 31, 1999
    Assignee: Mitsubishi Gas Chemical Company, Inc.
    Inventors: Akikazu Amagi, Nobuyuki Uemura, Motoharu Takeuchi, Kenichi Takahashi, Minoru Ohashi, Hiroshi Horikoshi, Masanori Shimuta
  • Patent number: 5923690
    Abstract: A gallium nitride group compound semiconductor laser device of the present invention includes: a substrate; and a layered structure provided on the substrate, wherein the layered structure includes an In.sub.z Ga.sub.1-z N active layer (0.ltoreq.z.ltoreq.1) which is formed at least in a first region, an n-type Al.sub.x Ga.sub.1-x N cladding layer (0.ltoreq.x.ltoreq.1) and a p-type Al.sub.y Ga.sub.1-y N cladding layer (0.ltoreq.y.ltoreq.1) interposing the active layer therebetween, and a current-defining structure made of Al.sub.u Ga.sub.1-u N (0.ltoreq.u.ltoreq.1) having an opening corresponding to the first region for defining a current within the first region.
    Type: Grant
    Filed: January 24, 1997
    Date of Patent: July 13, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahiro Kume, Yuuzaburou Ban, Akihiko Ishibashi, Nobuyuki Uemura, Hidemi Takeisi, Isao Kidoguchi
  • Patent number: 5923950
    Abstract: A method for manufacturing a semiconductor is disclosed. The method involves soaking a semiconductor substrate that consists of SiC for ten minutes in a buffered hydrofluoric acid, thereby etching the oxidized film formed on the surface of the semiconductor substrate. Then, TMA, NH.sub.3, TMG, and hydrogen for carrier are supplied at the rates of 10 .mu.mol/min., 2.5 L/min., and 2 L/min., respectively, to the semiconductor substrate at a temperature of 1090.degree. C. by using MOVPE. A buffer layer that consists of a single crystal AlN and has a thickness of about 15 nm is grown on the main surface of the semiconductor substrate. After lowering the temperature to 800.degree. C., TMA, TMG, TMI, and NH.sub.3 are supplied at the rates of 0.2 .mu.mol/min., 2 .mu.mol/min., 20 .mu.mol/min., and 5 L/min., respectively. A single crystal layer which consists of AlGaInN is thus grown on the buffer layer.
    Type: Grant
    Filed: June 10, 1997
    Date of Patent: July 13, 1999
    Assignee: Matsushita Electric Industrial Co., Inc.
    Inventors: Akihiko Ishibashi, Yuzaburo Ban, Yoshihiro Hara, Nobuyuki Uemura, Masahiro Kume
  • Patent number: 5742629
    Abstract: A semiconductor laser includes: an active layer formed of a II-VI group compound semiconductor material; a first cladding layer and a second cladding layer disposed so as to put the active layer therebetween; a light confinement layer provided on the second cladding layer, having an opening for current flow and formed of ZnMgSSe; and a third cladding layer provided at the opening of the light confinement layer. The light confinement layer has high resistivity or has a conductivity type opposite to that of the third cladding layer; the second and third cladding layers are formed of ZnMgSSe; and a Mg content and a S content of the light confinement layer are larger than a Mg content and a S content of the second and third cladding layers.
    Type: Grant
    Filed: July 19, 1996
    Date of Patent: April 21, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takashi Nishikawa, Nobuyuki Uemura, Satoshi Kamiyama
  • Patent number: 5705831
    Abstract: According to one aspect of the invention, a crystal-growing method for forming a II-VI single crystalline semiconductor expressed by Zn.sub.1-x Cd.sub.x Se (where 0<x<0.35) is provided. The crystal-growing method includes a step of epitaxially growing the II-VI single crystalline semiconductor on a substrate by: supplying a II element Zn onto the substrate by using a molecular beam from a ZnSe compound source and a molecular beam from a Zn elemental source; supplying a II element Cd onto the substrate by using a molecular beam from a CdSe compound source; and supplying a VI element Se onto the substrate by using a molecular beam from a ZnSe compound source.
    Type: Grant
    Filed: April 3, 1995
    Date of Patent: January 6, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Nobuyuki Uemura, Minoru Kubo, Yoichi Sasai, Kazuhiro Ohkawa, Satoshi Kamiyama, Takeshi Uenoyama
  • Patent number: 5619520
    Abstract: A semiconductor laser of this invention includes: a semiconductor substrate; a first cladding layer made of first conductivity type ZnMgSSe, which is held by the semiconductor substrate and lattice-matches with the semiconductor substrate; a stripe-shaped second cladding layer made of second conductivity type ZnMgSSe lattice-matching with the semiconductor substrate; a light-emitting layer including a first and a second light guiding layers made of Zn.sub.1-x Mg.sub.x S.sub.1-y Se.sub.y (0.ltoreq.x<1, 0.ltoreq.y<1) and a quantum well layer made of Zn.sub.1-z Cd.sub.z Se (0.ltoreq.z<1) which is interposed between the first and the second light guiding layers, the light-emitting layer being interposed between the first and the second cladding layers; and a burying layer which is made of ZnMgSSe lattice-matching with the semiconductor substrate and formed on sides of the second cladding layer.
    Type: Grant
    Filed: September 5, 1995
    Date of Patent: April 8, 1997
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoichi Sasai, Nobuyuki Uemura, Satoshi Kamiyama, Minoru Kubo, Takashi Nishikawa