Patents by Inventor Noriaki Okamoto
Noriaki Okamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230309279Abstract: A power conversion device includes an element module, a condenser, a case, a cooler, a positive terminal and a negative terminal on a primary side, and a positive terminal and a negative terminal on a secondary side. The case accommodates the element module, the condenser, and the case. The element module and the condenser are disposed on a surface side of the cooler. The power conversion device includes a secondary side positive electrode bus bar and a secondary side negative electrode bus bar that are connected between the positive terminal and negative terminal on the secondary side and the condenser. The secondary side positive electrode bus bar and the secondary side negative electrode bus bar are arranged on the surface side of the cooler.Type: ApplicationFiled: February 23, 2023Publication date: September 28, 2023Inventors: Keisuke Itai, Noriaki Okamoto
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Patent number: 10663493Abstract: An electric current sensor of electric equipment includes a detection element, a reference voltage line to which a reference voltage signal is transmitted, an output signal line to which an output signal of the detection element is transmitted, and a ground line connected to a ground potential. The reference voltage line, the output signal line, and the ground line are bundled together by a cylindrical member which does not contain metal, and in this state, the reference voltage line, the output signal line, and the ground line are routed inside a casing containing a reactor, and connected to a control device.Type: GrantFiled: May 30, 2018Date of Patent: May 26, 2020Assignee: HONDA MOTOR CO., LTD.Inventors: Noriaki Okamoto, Masahiro Shimada, Naoto Kochi, Satoshi Hashino, Satoru Fujita
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Patent number: 10641797Abstract: In an electric power device and a method of producing the electric power device, in an axial direction of a reactor, a distance between a detection element of a second electric current sensor and a central position of a winding part is shorter than a distance between a detection element of a first electric current sensor and a central position of a winding part. Further, a gap length of a core of the second electric current sensor is smaller than a gap length of a core of the first electric current sensor.Type: GrantFiled: May 30, 2018Date of Patent: May 5, 2020Assignee: HONDA MOTOR CO., LTD.Inventors: Noriaki Okamoto, Masahiro Shimada, Naoto Kochi, Satoshi Hashino, Satoru Fujita
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Patent number: 10325716Abstract: In electric equipment, a switching substrate is provided along winding axes of winding parts. A part of the switching substrate is overlapped with a reactor, as viewed in a direction perpendicular to a virtual plane including the winding axes. Further, an electric current sensor is shifted from the reactor in a direction of winding axes, and a sensor substrate is provided in parallel to the virtual plane.Type: GrantFiled: May 30, 2018Date of Patent: June 18, 2019Assignee: HONDA MOTOR CO., LTD.Inventors: Noriaki Okamoto, Masahiro Shimada, Naoto Kochi, Satoshi Hashino, Satoru Fujita
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Publication number: 20180350515Abstract: In electric equipment, a switching substrate is provided along winding axes of winding parts. A part of the switching substrate is overlapped with a reactor, as viewed in a direction perpendicular to a virtual plane including the winding axes. Further, an electric current sensor is shifted from the reactor in a direction of winding axes, and a sensor substrate is provided in parallel to the virtual plane.Type: ApplicationFiled: May 30, 2018Publication date: December 6, 2018Inventors: Noriaki Okamoto, Masahiro Shimada, Naoto Kochi, Satoshi Hashino, Satoru Fujita
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Publication number: 20180348262Abstract: In an electric power device and a method of producing the electric power device, in an axial direction of a reactor, a distance between a detection element of a second electric current sensor and a central position of a winding part is shorter than a distance between a detection element of a first electric current sensor and a central position of a winding part. Further, a gap length of a core of the second electric current sensor is smaller than a gap length of a core of the first electric current sensor.Type: ApplicationFiled: May 30, 2018Publication date: December 6, 2018Inventors: Noriaki Okamoto, Masahiro Shimada, Naoto Kochi, Satoshi Hashino, Satoru Fujita
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Publication number: 20180348261Abstract: An electric current sensor of electric equipment includes a detection element, a reference voltage line to which a reference voltage signal is transmitted, an output signal line to which an output signal of the detection element is transmitted, and a ground line connected to a ground potential. The reference voltage line, the output signal line, and the ground line are bundled together by a cylindrical member which does not contain metal, and in this state, the reference voltage line, the output signal line, and the ground line are routed inside a casing containing a reactor, and connected to a control device.Type: ApplicationFiled: May 30, 2018Publication date: December 6, 2018Inventors: Noriaki Okamoto, Masahiro Shimada, Naoto Kochi, Satoshi Hashino, Satoru Fujita
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Patent number: 7442593Abstract: In forming an electrode 2 on a silicon oxide film 5 on a semiconductor substrate 4 through a silicon oxide film 5, for example, the gate electrode 2 is structured in a laminated structure of a plurality of polycrystalline silicon layers 6. The portion of the gate electrode 2 is formed by a method of manufacturing a thin film having a process of depositing amorphous layers and a process of crystallizing (recrystallizing) this amorphous material.Type: GrantFiled: July 6, 2006Date of Patent: October 28, 2008Assignee: Renesas Technology Corp.Inventors: Takashi Nakajima, Hideo Miura, Hiroyuki Ohta, Noriaki Okamoto
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Patent number: 7292000Abstract: An angular velocity measuring device (1) includes a first sensor (2) (vibration gyro) and a second sensor (3) (gas rate gyro). The detection output of the first sensor (2) is inputted to a high pass filter (4). Output of the filter (4) is stored and held in time series in a memory (10). Subtraction processing means (11) successively executes processing of subtracting the output of the filter (4) ?v?(t?tsd) before a predetermined time tsd from the output of the filter (4) ?v?(1). The value thus obtained is successively added to the output of the second sensor (3) ?g(t) by addition processing means (12) so as to obtain the measurement value of the angular velocity. Thus, it is possible to provide an angular velocity measuring device capable of giving an angular velocity measurement value having a high response and stability at a reasonable cost.Type: GrantFiled: July 13, 2005Date of Patent: November 6, 2007Assignee: Honda Motor Co., Ltd.Inventors: Kouji Saotome, Noriaki Okamoto, Shinyu Hirayama, Tomohiro Sakogoshi, Yoichi Shimada, Shigeto Akahori, Kengo Hori, Hitoshi Saika
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Publication number: 20070152618Abstract: An angular velocity measuring device (1) includes a first sensor (2) (vibratory gyroscope) and a second sensor (3) (gas rate gyroscope). A detected output of the first sensor (2) is input to a highpass filter (4) and an output of this filter (4) is stored in the time series into a memory (10). Subtraction means (11) sequentially performs operations of subtracting an output ?v?(t?tsd) of the filter (4) at a time a predetermined time period tsd earlier from an output ?v?(t) of the filter (4), and addition means (12) sequentially adds the value obtained by the above to an output ?g(t) of the second sensor (3), whereby an angular velocity measurement is obtained. Thereby, it is possible to provide an angular velocity measuring device whose angular velocity measurements are high in response and stability at a low price.Type: ApplicationFiled: July 13, 2005Publication date: July 5, 2007Inventors: Kouji Saotome, Noriaki Okamoto, Shinyu Hirayama, Tomohiro Sakogoshi, Yoichi Shimada, Shigeto Akahori, Kengo Hori, Hitoshi Saika
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Publication number: 20060252186Abstract: In forming an electrode 2 on a silicon oxide film 5 on a semiconductor substrate 4 through a silicon oxide film 5, for example, the gate electrode 2 is structured in a laminated structure of a plurality of polycrystalline silicon layers 6. The portion of the gate electrode 2 is formed by a method of manufacturing a thin film having a process of depositing amorphous layers and a process of crystallizing (recrystallizing) this amorphous material.Type: ApplicationFiled: July 6, 2006Publication date: November 9, 2006Inventors: Takashi Nakajima, Hideo Miura, Hiroyuki Ohta, Noriaki Okamoto
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Patent number: 7091520Abstract: In forming an electrode 2 on a silicon oxide film 5 on a semiconductor substrate 4 through a silicon oxide film 5, for example, the gate electrode 2 is structured in a laminated structure of a plurality of polycrystalline silicon layers 6. The portion of the gate electrode 2 is formed by a method of manufacturing a thin film having a process of depositing amorphous layers and a process of crystallizing (recrystallizing) this amorphous material.Type: GrantFiled: October 7, 2002Date of Patent: August 15, 2006Assignee: Renesas Technology Corp.Inventors: Takashi Nakajima, Hideo Miura, Hiroyuki Ohta, Noriaki Okamoto
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Patent number: 6949387Abstract: A technique for a semiconductor device is provided that includes forming circuit regions on a device formation region and device isolation regions on a semiconductor substrate, a ratio of the width of a device isolation region to the width of adjacent circuit regions thereto is set at 2 to 50. A design method is also provided and includes conducting measurements such as of thicknesses of a pad oxide film and a nitride film, the internal stress of the nitride film, the width of both device formation and isolation regions, the depth of the etched portion of the nitride film for forming the groove in a device isolation region, conducting stress analysis in the proximity of the groove due to thermal oxidation, and setting values pertaining to the width of the device formation region and of the device isolation region which do not lead to occurrence of dislocation.Type: GrantFiled: July 25, 2003Date of Patent: September 27, 2005Assignee: Hitachi, Ltd.Inventors: Hideo Miura, Makoto Ogasawara, Hiroo Masuda, Jun Murata, Noriaki Okamoto
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Publication number: 20040214355Abstract: A technique for a semiconductor device is provided that includes forming circuit regions on a device formation region and device isolation regions on a semiconductor substrate, a ratio of the width of a device isolation region to the width of adjacent circuit regions thereto is set at 2 to 50. A design method is also provided and includes conducting measurements such as of thicknesses of a pad oxide film and a nitride film, the internal stress of the nitride film, the width of both device formation and isolation regions, the depth of the etched portion of the nitride film for forming the groove in a device isolation region, conducting stress analysis in the proximity of the groove due to thermal oxidation, and setting values pertaining to the width of the device formation region and of the device isolation region which do not lead to occurrence of dislocation.Type: ApplicationFiled: July 25, 2003Publication date: October 28, 2004Inventors: Hideo Miura, Makoto Ogasawara, Hiroo Masuda, Jun Murata, Noriaki Okamoto, Jun Murata, Noriaki Okamoto
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Publication number: 20030183311Abstract: Firstly, a heat transfer tube, in which grooves are formed on its inside surface in groove working step (1) and then its forming is applied in forming step (2), is softened in annealing step (3). Then, the tube is coiled in line in coiling in-line step (4). Here, while supplied in the length direction, the heat transfer tube is heated and cooled in the annealing step (3). Further, in the coiling in-line step (4), the heat transfer tube is coiled in line on a body of bobbin, so that works of installing the heat transfer tube to the bobbin can be simplified.Type: ApplicationFiled: December 6, 2002Publication date: October 2, 2003Inventors: Noriaki Okamoto, Hideki Jou, Noriaki Nakao
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Patent number: 6620704Abstract: A method is provided of fabricating a semiconductor device that includes forming a silicon oxide film on a semiconductor substrate. A silicon nitrite film may be formed on the silicon oxide film. A portion of the silicon nitrite film and the silicon oxide film may be removed at a desired portion. Additionally, a groove may be formed in the semiconductor substrate in the portion in which the silicon oxide film is removed. A part of the silicon oxide film may be etched back around the groove with hydrofluoric acid type at the portion in which the silicon nitrite film is located above. Additionally, an oxidized film may be formed in the groove of the semiconductor substrate and the groove may be oxidized.Type: GrantFiled: June 29, 2001Date of Patent: September 16, 2003Assignee: Hitachi, Ltd.Inventors: Hideo Miura, Makoto Ogasawara, Hiroo Masuda, Jun Murata, Noriaki Okamoto
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Publication number: 20030032264Abstract: In forming an electrode 2 on a silicon oxide film 5 on a semiconductor substrate 4 through a silicon oxide film 5, for example, the gate electrode 2 is structured in a laminated structure of a plurality of polycrystalline silicon layers 6. The portion of the gate electrode 2 is formed by a method of manufacturing a thin film having a process of depositing amorphous layers and a process of crystallizing (recrystallizing) this amorphous material.Type: ApplicationFiled: October 7, 2002Publication date: February 13, 2003Inventors: Takashi Nakajima, Hideo Miura, Hiroyuki Ohta, Noriaki Okamoto
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Patent number: 6468845Abstract: In forming an electrode 2 on a silicon oxide film 5 on a semiconductor substrate 4 through a silicon oxide film 5, for example, the gate electrode 2 is structured in a laminated structure of a plurality of polycrystalline silicon layers 6. The portion of the gate electrode 2 is formed by a method of manufacturing a thin film having a process of depositing amorphous layers and a process of crystallizing (recrystallizing) this amorphous material.Type: GrantFiled: March 28, 2000Date of Patent: October 22, 2002Assignee: Hitachi, Ltd.Inventors: Takashi Nakajima, Hideo Miura, Hiroyuki Ohta, Noriaki Okamoto
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Publication number: 20020093060Abstract: A width of a circuit device isolation region and a width of a device region formed on a semiconductor substrate are determined in such a manner as to satisfy a condition which prevents the occurrence of dislocation due to thermal oxidation for forming the isolation region. A semiconductor device can be fabrication which includes a semiconductor substrate, a plurality of circuit regions formed on a device formation region in the semiconductor substrate and having a width of 0.1 to 125 &mgr;m and device isolation regions so formed on the semiconductor substrate as to isolate a plurality of circuit regions from one another and having a width of 0.05 to 2.5 &mgr;m, and wherein a ratio of the width of the device isolation region to the width of a plurality of circuit regions adjacent to the device isolation region is from 2 to 50.Type: ApplicationFiled: June 29, 2001Publication date: July 18, 2002Inventors: Hideo Miura, Makoto Ogasawara, Hiroo Masuda, Jun Murata, Noriaki Okamoto, Yasunobu Tanizaki, Eiji Wakimoto, Shinji Sakata
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Patent number: 6379998Abstract: A process of contacting sides of a plurality of chips having semiconductor elements formed in a substrate surface, directly to each other on the same {111} crystal plane.Type: GrantFiled: January 21, 1993Date of Patent: April 30, 2002Assignee: Hitachi, Ltd.Inventors: Hiroyuki Ohta, Hideo Miura, Mitsuo Usami, Masatsugu Kametani, Munetoshi Zen, Noriaki Okamoto