Patents by Inventor Norihiro Iwai
Norihiro Iwai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20080205463Abstract: A selective oxidation layer is formed by alternately growing an AlAs layer and an XAs layer containing a group III element X with a thickness ratio in a range between 97:3 and 99:1 on a plurality of semiconductor layers including an active layer. The selective oxidation layer is selectively oxidized to manufacture a vertical-cavity surface-emitting laser.Type: ApplicationFiled: February 11, 2008Publication date: August 28, 2008Applicant: The Furukawa Electric Co., Ltd.Inventors: Keishi TAKAKI, Norihiro Iwai, Hitoshi Shimizu, Takeo Kageyama
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Patent number: 7418020Abstract: A VCSEL device includes a polyimide having a larger thickness (d1) on the surface of a semiconductor layer structure in a peripheral area 54, which is separated from a mesapost by an annular groove 52. The top surface of the central mesapost 30 is located at a lower position compared to the top surface of the peripheral area 54. A structure is obtained wherein the mesapost is not contacted by a jig or probe during handling the device in the test or assembly thereof.Type: GrantFiled: October 31, 2006Date of Patent: August 26, 2008Assignee: The Furukawa Electric Co., Ltd.Inventors: Koji Hiraiwa, Takeo Kageyama, Norihiro Iwai, Keishi Takaki
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Patent number: 7368316Abstract: A method for fabricating a surface-emission semiconductor laser on a p-type substrate includes the step of interposing an Au film between an AuGeNi film or AuGe film of an n-side electrode and a compound semiconductor layer of an n-type DBR, followed by annealing to form an Au alloy in the n-side electrode. The presence of the Au alloy film improves the adherence between the n-side electrode and the compound semiconductor layer to improve an injection current vs. applied voltage characteristic.Type: GrantFiled: March 30, 2006Date of Patent: May 6, 2008Assignee: The Furukawa Electric Co., Ltd.Inventors: Noriyuki Yokouchi, Norihiro Iwai
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Publication number: 20070110115Abstract: A VCSEL device includes a polyimide having a larger thickness (d1) on the surface of a semiconductor layer structure in a peripheral area 54, which is separated from a mesapost by an annular groove 52. The top surface of the central mesapost 30 is located at a lower position compared to the top surface of the peripheral area 54. A structure is obtained wherein the mesapost is not contacted by a jig or probe during handling the device in the test or assembly thereof.Type: ApplicationFiled: October 31, 2006Publication date: May 17, 2007Applicant: The Furukawa Electric Co, Ltd.Inventors: Koji HIRAIWA, Takeo Kageyama, Norihiro Iwai, Keishi Takaki
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Patent number: 7215693Abstract: A surface emitting semiconductor laser device including a substrate, a bottom DBR, and a mesa post having a layer structure, the layer structure including a top DBR including a plurality of pairs, each of said pairs including an Al-containing high-reflectivity layer and an Al-containing low-reflectivity layer, an active layer structure sandwiched between the DBRs for emitting laser, and a current confinement layer disposed within or in a vicinity of one of the DBRs, the current confinement layer including a central current injection area and an annular current blocking area encircling the central current injection area, the annular current blocking area being formed by selective oxidation of Al in an AlXGa1-XAs layer (0.95?x<1) having a thickness below 60 nm, the Al-containing low-reflectivity layer including Al at an atomic ratio not more than 0.8 and below 0.9.Type: GrantFiled: July 27, 2004Date of Patent: May 8, 2007Assignee: The Furukawa Electric Co., Ltd.Inventors: Norihiro Iwai, Tatsuyuki Shinagawa, Noriyuki Yokouchi
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Publication number: 20070091965Abstract: A vertical-cavity surface-emitting (VCSEL) device has a layer structure including a top DBR mirror, an active layer, a current confinement oxide layer, and a bottom DBR mirror, the layer structure being configured as a mesa post. The current confinement oxide layer has a central current injection area and a peripheral current blocking area oxidized from the sidewall of the mesa post. The mesa post has a substantially square cross-sectional shape, thereby allowing an oxidation heat treatment to configure a substantially circular current injection area in the current-confinement oxide layer.Type: ApplicationFiled: October 19, 2006Publication date: April 26, 2007Applicant: FURUKAWA ELECTRIC CO., LTD.Inventors: Kinuka Tanabe, Yoshihiko Ikenaga, Norihiro Iwai, Takeo Kageyama, Koji Hiraiwa, Hirokazu Yoshikawa
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Publication number: 20070030874Abstract: A cavity is formed by a lower multilayer mirror and an upper multilayer mirror and an active layer is arranged between the lower multilayer mirror and the upper multilayer mirror in a surface-emitting laser element. A relaxation oscillation frequency at a bias point in the cavity is set to exceed an optical communication frequency for modulating a laser light output from the surface-emitting laser element.Type: ApplicationFiled: September 5, 2006Publication date: February 8, 2007Applicant: The Furukawa Electric Co, Ltd.Inventors: Maiko Ariga, Norihiro Iwai, Setiagung Casimirus, Hitoshi Shimizu, Fumio Koyama, Masakazu Arai, Takeo Kageyama
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Publication number: 20060223209Abstract: A method for fabricating a surface-emission semiconductor laser on a p-type substrate includes the step of interposing an Au film between an AuGeNi film or AuGe film of an n-side electrode and a compound semiconductor layer of an n-type DBR, followed by annealing to form an Au alloy in the n-side electrode. The presence of the Au alloy film improves the adherence between the n-side electrode and the compound semiconductor layer to improve an injection current vs. applied voltage characteristic.Type: ApplicationFiled: March 30, 2006Publication date: October 5, 2006Applicant: THE FURUKAWA ELECTRIC CO., LTD.Inventors: Noriyuki Yokouchi, Norihiro Iwai
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Patent number: 7061954Abstract: A method for manufacturing a semiconductor optical waveguide comprises the steps of forming a core layer having an Al content which monotonically increases from the central part thereof to the film surface, and selectively oxidizing the core layer to obtain a peripheral, oxidized region and a central, non-oxidized region acting as a waveguide. The waveguide is tapered to have a circular mode field at the distal end thereof for efficiently coupling with an optical fiber.Type: GrantFiled: June 25, 2001Date of Patent: June 13, 2006Assignee: The Furukawa Electric Co. Ltd.Inventors: Norihiro Iwai, Kazuaki Nishikata, Akihiko Kasukawa
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Publication number: 20050220160Abstract: A vertical cavity surface emitting semiconductor laser (VCSEL) device has p-type and n-type DBRs sandwiching therebetween a resonant cavity including an active layer. Each the DBRs has a plurality of layer pairs each including a Alx1Ga1-x1As high-reflectivity layer and an Alx2Ga1-x2As low-reflectivity layer and an Alx3Ga1-x3As slope content layer interposed between each of the high-reflectivity layers and adjacent low-reflectivity layer. The slope content layers in the vicinity of the active layer has an Al content x3 wherein 0<x3?0.3 and 0.55?x3<1 and an impurity concentration of 3×1017 cm?3 or above.Type: ApplicationFiled: May 27, 2005Publication date: October 6, 2005Applicant: The Furukawa Electric Co., Ltd.Inventors: Tatsuyuki Shinagawa, Norihiro Iwai, Noriyuki Yokouchi
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Publication number: 20050186693Abstract: A method for fabricating a surface-emission semiconductor laser on a p-type substrate includes the step of interposing an Au film between an AuGeNi film or AuGe film of an n-side electrode and a compound semiconductor layer of an n-type DBR, followed by annealing to form an Au alloy in the n-side electrode. The presence of the Au alloy film improves the adherence between the n-side electrode and the compound semiconductor layer to improve an injection current vs. applied voltage characteristic.Type: ApplicationFiled: April 20, 2005Publication date: August 25, 2005Applicant: FURUKAWA ELECTRIC CO., LTD.Inventors: Noriyuki Yokouchi, Norihiro Iwai
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Patent number: 6914925Abstract: A vertical cavity surface emitting semiconductor laser (VCSEL) device has p-type and n-type DBRs sandwiching therebetween a resonant cavity including an active layer. Each the DBRs has a plurality of layer pairs each including a Alx1Ga1-x1As high-reflectivity layer and an Alx2Ga1-x2As low-reflectivity layer and an Alx3Ga1-x3As slope content layer interposed between each of the high-reflectivity layers and adjacent low-reflectivity layer. The slope content layers in the vicinity of the active layer has an Al content x3 wherein 0<x3?0.3 and 0.55?x3<1 and an impurity concentration of 3×1017 cm?3 or above.Type: GrantFiled: August 9, 2002Date of Patent: July 5, 2005Assignee: The Furukawa Electric Co., Ltd.Inventors: Tatsuyuki Shinagawa, Norihiro Iwai, Noriyuki Yokouchi
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Publication number: 20050123014Abstract: A surface emitting laser includes a lower semiconductor multilayer mirror formed of a plurality of pairs of a high-refractive-index area and a low-refractive-index area; an active layer vertically sandwiched by cladding layers; a current confinement layer of AlzGa1-zAs having an oxide area in a peripheral portion of the current confinement layer, where 0.95?z?1; and an upper semiconductor multilayer mirror formed of a plurality of pairs of a high-refractive-index area and a low-refractive-index area. The low-refractive-index area of at least one of the lower semiconductor multilayer mirror and the upper semiconductor multilayer mirror includes an Alz1Ga1-z1As layer with a thickness thinner than that of the current confinement layer, where z?z1.Type: ApplicationFiled: October 5, 2004Publication date: June 9, 2005Applicant: THE FURUKAWA ELECTRONIC CO., LTD.Inventors: Hitoshi Shimizu, Setiagung Casimirus, Yasukazu Shiina, Takeshi Hama, Norihiro Iwai
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Patent number: 6900475Abstract: A method for fabricating a surface-emission semiconductor laser on a p-type substrate includes the step of interposing an Au film between an AuGeNi film or AuGe film of an n-side electrode and a compound semiconductor layer of an n-type DBR, followed by annealing to form an Au alloy in the n-side electrode. The presence of the Au alloy film improves the adherence between the n-side electrode and the compound semiconductor layer to improve an injection current vs. applied voltage characteristic.Type: GrantFiled: September 19, 2002Date of Patent: May 31, 2005Assignee: The Furukawa Electric Co., Ltd.Inventors: Noriyuki Yokouchi, Norihiro Iwai
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Publication number: 20050041713Abstract: A surface emitting semiconductor laser device including a substrate, a bottom DBR, and a mesa post having a layer structure, the layer structure including a top DBR including a plurality of pairs, each of said pairs including an Al-containing high-reflectivity layer and an Al-containing low-reflectivity layer, an active layer structure sandwiched between the DBRs for emitting laser, and a current confinement layer disposed within or in a vicinity of one of the DBRs, the current confinement layer including a central current injection area and an annular current blocking area encircling the central current injection area, the annular current blocking area being formed by selective oxidation of Al in an AlXGa1-XAs layer (0.95?x<1) having a thickness below 60 nm, the Al-containing low-reflectivity layer including Al at an atomic ratio not more than 0.8 and below 0.9.Type: ApplicationFiled: July 27, 2004Publication date: February 24, 2005Inventors: Norihiro Iwai, Tatsuyuki Shinagawa, Noriyuki Yokouchi
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Patent number: 6858863Abstract: A semiconductor laser device includes a resonant cavity formed on a GaAs substrate, the resonant cavity including a quantum well (QW) active layer structure having a GaInNAs(Sb) well layer and a pair of barrier layers. The QW structure has a conduction band offset energy (?Ec) equal to or higher than 350 milli-electron-volts (meV) between the well layer and the barrier layers, and each of the barrier layers a tensile strain equal to or lower than 2.5%.Type: GrantFiled: March 8, 2002Date of Patent: February 22, 2005Assignee: The Furukawa Electric Co., Ltd.Inventors: Hitoshi Shimizu, Kouji Kumada, Norihiro Iwai
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Patent number: 6839369Abstract: A surface emitting semiconductor laser device including a substrate, a bottom DBR, and a mesa post having a layer structure, the layer structure including a top DBR including a plurality of pairs, each of said pairs including an Al-containing high-reflectivity layer and an Al-containing low-reflectivity layer, an active layer structure sandwiched between the DBRs for emitting laser, and a current confinement layer disposed within or in a vicinity of one of the DBRs, the current confinement layer including a central current injection area and an annular current blocking area encircling the central current injection area, the annular current blocking area being formed by selective oxidation of Al in an AlxGa1?xAs layer (0.95?x<1) having a thickness below 60 nm, the Al-containing low-reflectivity layer including Al at an atomic ratio not more than 0.8 and below 0.9.Type: GrantFiled: June 26, 2002Date of Patent: January 4, 2005Assignee: The Furukawa Electric Co., Ltd.Inventors: Norihiro Iwai, Tatsuyuki Shinagawa, Noriyuki Yokouchi
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Patent number: 6643315Abstract: A distributed feedback semiconductor laser device including an active layer, a diffraction grating disposed in a vicinity of the active layer and having a substantially uniform space period and a distributed feedback function, and a functional layer disposed in a vicinity of the diffraction grating and the active layer and having a function of controlling a refractive index of the active layer, whereby the functional layer controls a lasing wavelength of the active layer. The functional layer of controlling the refractive index of the distributed feedback semiconductor laser device can generate a plurality of the lasing wavelengths different among one another and easily controllable.Type: GrantFiled: January 26, 2001Date of Patent: November 4, 2003Assignee: The Furukawa Electric Co., Ltd.Inventors: Akihiko Kasukawa, Norihiro Iwai, Masaki Funabashi
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Patent number: 6636543Abstract: A semiconductor device including a substrate, a mesa post overlying the substrate and having a substantially cylindrical shape, a resin member surrounding the mesa post and a stress moderating member received in the mesa post for moderating stress between the mesa post and the resin member. The stress applied to the mesa post is reduced because the entire volume of the resin member is divided by the stress moderating member and each of the divided resin members reduces the stress.Type: GrantFiled: June 26, 2002Date of Patent: October 21, 2003Assignee: The Furukawa Electric Co., Ltd.Inventors: Norihiro Iwai, Tatsuyuki Shinagawa, Noriyuki Yokouchi
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Publication number: 20030048824Abstract: A vertical cavity surface emitting semiconductor laser (VCSEL) device has p-type and n-type DBRs sandwiching therebetween a resonant cavity including an active layer. Each the DBRs has a plurality of layer pairs each including a Alx1Ga1-x1As high-reflectivity layer and an Alx2Ga1-x2As low-reflectivity layer and an Alx3Ga1-x3As slope content layer interposed between each of the high-reflectivity layers and adjacent low-reflectivity layer. The slope content layers in the vicinity of the active layer has an Al content x3 wherein 0<x3≦0.3 and 0.55≦x3<1 and an impurity concentration of 3×1017 cm−3 or above.Type: ApplicationFiled: August 9, 2002Publication date: March 13, 2003Inventors: Tatsuyuki Shinagawa, Norihiro Iwai, Noriyuki Yokouchi