Patents by Inventor Norihisa Uchimoto

Norihisa Uchimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7724751
    Abstract: A first communication device receives an ATM cell bound for a second ATM device from a first ATM device via an ATM interface, and then the first communication device sends a data frame including the ATM cell to the second ATM device via wide area Ethernet. In addition, the first communication device sends a synchronization frame to the second ATM device via the wide area Ethernet continuously at a predetermined time interval in accordance with a clock frequency of the first ATM device. A second communication device receives the synchronization frame and measures a clock frequency of the first ATM device in accordance with a time interval of receiving the synchronization frame so as to reproduce a clock having the same frequency as the measured clock frequency. After that, the second communication device sends the clock to the second ATM device via an ATM interface.
    Type: Grant
    Filed: April 25, 2005
    Date of Patent: May 25, 2010
    Assignee: Fujitsu Limited
    Inventors: Norihisa Uchimoto, Koji Tatsumi, Kazuhisa Shimazaki, Koichiro Yamada, Satoshi Namura, Akio Morimoto, Michio Kusayanagi
  • Publication number: 20100046522
    Abstract: An ATM-ETHERNET converter (21B) is provided for relaying ATM cells (70) transmitted from a CLAD (22) of an ATM network (2B) to a CLAD (22) of an ATM network (2A) via a wide area Ethernet (3). The ATM-ETHERNET converter (21B) is provided with an ATM-PHY (212) receiving the ATM cells (70) transmitted from the CLAD (22) of the ATM network (2B), a buffer (41) storing the ATM cells (70) thus received, a LAN switch (214) that encapsulates the ATM cells (70) stored in the buffer (41) in a frame (FRD) corresponding to the wide area Ethernet (3) and sends the ATM cells (70) to the wide area Ethernet (3), and a CPU (211) starting discarding the ATM cells (70) stored in the buffer (41) at a predetermined time.
    Type: Application
    Filed: September 4, 2009
    Publication date: February 25, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Kouji Tatsumi, Toshihiko Inoue, Hayato Masuhara, Kazuhisa Shimazaki, Norihisa Uchimoto, Kouichiro Yamada
  • Publication number: 20090252169
    Abstract: A first communication device receives an ATM cell bound for a second ATM device from a first ATM device via an ATM interface, and then the first communication device sends a data frame including the ATM cell to the second ATM device via wide area Ethernet. In addition, the first communication device sends a synchronization frame to the second ATM device via the wide area Ethernet continuously at a predetermined time interval in accordance with a clock frequency of the first ATM device. A second communication device receives the synchronization frame and measures a clock frequency of the first ATM device in accordance with a time interval of receiving the synchronization frame so as to reproduce a clock having the same frequency as the measured clock frequency. After that, the second communication device sends the clock to the second ATM device via an ATM interface.
    Type: Application
    Filed: June 11, 2009
    Publication date: October 8, 2009
    Applicant: Fujitsu Limited
    Inventors: Norihisa UCHIMOTO, Koji Tatsumi, Kazuhisa Shimazaki, Koichiro Yamada, Satoshi Namura, Akio Morimoto, Michio Kusayanagi
  • Publication number: 20090243731
    Abstract: An apparatus includes an oscillator, a memory for storing data of a first frequency and of a first voltage, a first controller for causing the oscillator to generate a clock having a required frequency by applying a voltage on the basis of the data of the first frequency and of the first voltage, a second controller for causing the oscillator to generate a clock having a second frequency by applying a second voltage at predetermined timing, an output section for outputting data of the clock of the second frequency to a frequency counter, a writing section for updating the data of the first voltage to data of the second voltage and the data of the first frequency to data of the second frequency when a difference between the second frequency and a third frequency is within a predetermine range.
    Type: Application
    Filed: March 5, 2009
    Publication date: October 1, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Koji TATSUMI, Norihisa Uchimoto, Kazuhisa Shimazaki
  • Publication number: 20060109849
    Abstract: A first communication device receives an ATM cell bound for a second ATM device from a first ATM device via an ATM interface, and then the first communication device sends a data frame including the ATM cell to the second ATM device via wide area Ethernet. In addition, the first communication device sends a synchronization frame to the second ATM device via the wide area Ethernet continuously at a predetermined time interval in accordance with a clock frequency of the first ATM device. A second communication device receives the synchronization frame and measures a clock frequency of the first ATM device in accordance with a time interval of receiving the synchronization frame so as to reproduce a clock having the same frequency as the measured clock frequency. After that, the second communication device sends the clock to the second ATM device via an ATM interface.
    Type: Application
    Filed: April 25, 2005
    Publication date: May 25, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Norihisa Uchimoto, Koji Tatsumi, Kazuhisa Shimazaki, Koichiro Yamada, Satoshi Namura, Akio Morimoto, Michio Kusayanagi