Patents by Inventor Norikatsu Koide

Norikatsu Koide has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150228847
    Abstract: Disclosed are a nitride light-emitting device having high luminance even while saving on manufacturing costs by using a silicon substrate as a growth substrate, and a method for manufacturing the same. A nitride light-emitting device according to the present invention comprises: a light-emitting structure comprising, from the top down, a first nitride semiconductor layer, an active layer, and a second nitride semiconductor layer and having a plurality of trenches from the bottom up to at least the second nitride semiconductor layer and the active layer; and a bonding substrate combined to a lower surface of the light-emitting structure, wherein a width of the light-emitting structure between the trenches is 20-300 mm.
    Type: Application
    Filed: September 13, 2013
    Publication date: August 13, 2015
    Inventor: Norikatsu Koide
  • Patent number: 7939349
    Abstract: The nitride-based semiconductor light-emitting device and manufacturing method thereof are disclosed: the nitride-based semiconductor light-emitting device includes a reflective layer formed on a support substrate, a p-type nitride-based semiconductor layer, a light-emitting layer and an n-type nitride-based semiconductor layer successively formed on the reflective layer, wherein irregularities are formed on a light extracting surface located above the n-type nitride-based semiconductor layer.
    Type: Grant
    Filed: July 27, 2006
    Date of Patent: May 10, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Norikatsu Koide, Toshio Hata, Mayuko Fudeta, Daigaku Kimura
  • Patent number: 7619261
    Abstract: An Al0.15Ga0.85N layer 2 is formed on a silicon substrate 1 in a striped or grid pattern. A GaN layer 3 is formed in regions A where the substrate 1 is exposed and in regions B which are defined above the layer 2. At this time, the GaN layer grows epitaxially and three-dimensionally (not only in a vertical direction but also in a lateral direction) on the Al0.15Ga0.85N layer 2. Since the GaN layer grows epitaxially in the lateral direction as well, a GaN compound semiconductor having a greatly reduced number of dislocations is obtained in lateral growth regions (regions A where the substrate 1 is exposed).
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: November 17, 2009
    Assignee: Toyoda Gosei Co., Ltd.
    Inventor: Norikatsu Koide
  • Publication number: 20070099320
    Abstract: An Al0.15Ga0.85N layer 2 is formed on a silicon substrate 1 in a striped or grid pattern. A GaN layer 3 is formed in regions A where the substrate 1 is exposed and in regions B which are defined above the layer 2. At this time, the GaN layer grows epitaxially and three-dimensionally (not only in a vertical direction but also in a lateral direction) on the Al0.15Ga0.85N layer 2. Since the GaN layer grows epitaxially in the lateral direction as well, a GaN compound semiconductor having a greatly reduced number of dislocations is obtained in lateral growth regions (regions A where the substrate 1 is exposed).
    Type: Application
    Filed: December 19, 2006
    Publication date: May 3, 2007
    Applicant: Toyoda Gosei Co., Ltd.
    Inventor: Norikatsu Koide
  • Patent number: 7176497
    Abstract: An Al0.15Ga0.85N layer 2 is formed on a silicon substrate 1 in a striped or grid pattern. A GaN layer 3 is formed in regions A where the substrate 1 is exposed and in regions B which are defined above the layer 2. At this time, the GaN layer grows epitaxially and three-dimensionally (not only in a vertical direction but also in a lateral direction) on the Al0.15Ga0.85N layer 2. Since the GaN layer grows epitaxially in the lateral direction as well, a GaN compound semiconductor having a greatly reduced number of dislocations is obtained in lateral growth regions (regions A where the substrate 1 is exposed).
    Type: Grant
    Filed: July 5, 2005
    Date of Patent: February 13, 2007
    Assignee: Toyoda Gosei Co., Ltd.
    Inventor: Norikatsu Koide
  • Patent number: 7154125
    Abstract: The nitride-based semiconductor light-emitting device and manufacturing method thereof are disclosed: the nitride-based semiconductor light-emitting device includes a reflective layer formed on a support substrate, a p-type nitride-based semiconductor layer, a light-emitting layer and an n-type nitride-based semiconductor layer successively formed on the reflective layer, wherein irregularities are formed on a light extracting surface located above the n-type nitride-based semiconductor layer.
    Type: Grant
    Filed: April 23, 2003
    Date of Patent: December 26, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Norikatsu Koide, Toshio Hata, Mayuko Fudeta, Daigaku Kimura
  • Publication number: 20060267033
    Abstract: The nitride-based semiconductor light-emitting device and manufacturing method thereof are disclosed: the nitride-based semiconductor light-emitting device includes a reflective layer formed on a support substrate, a p-type nitride-based semiconductor layer, a light-emitting layer and an n-type nitride-based semiconductor layer successively formed on the reflective layer, wherein irregularities are formed on a light extracting surface located above the n-type nitride-based semiconductor layer.
    Type: Application
    Filed: July 27, 2006
    Publication date: November 30, 2006
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Norikatsu Koide, Toshio Hata, Mayuko Fudeta, Daigaku Kimura
  • Patent number: 7045809
    Abstract: A barrier layer made of AlxGa1?xN (0<x?0.18) is formed in a light-emitting semiconductor device using gallium nitride compound having a multi quantum-well (MQW) structure. By controlling a composition ratio x of aluminum (Al) or thickness of the barrier layer, luminous intensity of the device is improved. An n-cladding layer made of AlxGa1?xN (0<x?0.06) is formed in a light-emitting semiconductor device using gallium nitride compound. By controlling a composition ratio x of aluminum or thickness of the n-cladding layer, luminous intensity of the device is improved. A p-type layer and an n-type layer are formed in a light-emitting semiconductor device using gallium nitride compound having a double-hetero junction structure. By controlling a ratio of a hole concentration of the p-type layer and an electron concentration of the n-type layer approximates to 1, luminous intensity of the device is improved.
    Type: Grant
    Filed: August 6, 2003
    Date of Patent: May 16, 2006
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Hisaki Kato, Hiroshi Watanabe, Norikatsu Koide, Shinya Asami
  • Patent number: 6984536
    Abstract: Disclosed herein are (1) a light-emitting semiconductor device that uses a gallium nitride compound semiconductor (AlxGa1?xN) in which the n-layer of n-type gallium nitride compound semiconductor (AlxGa1?xN) is of double-layer structure including an n-layer of low carrier concentration and an n+-layer of high carrier concentration, the former being adjacent to the i-layer of insulating gallium nitride compound semiconductor (AlxGa1?xN); (2) a light-emitting semiconductor device of similar structure as above in which the i-layer is of double-layer structure including an iL-layer of low impurity concentration containing p-type impurities in comparatively low concentration and an iH-layer of high impurity concentration containing p-type impurities in comparatively high concentration, the former being adjacent to the n-layer; (3) a light-emitting semiconductor device having both of the above-mentioned features and (4) a method of producing a layer of an n-type gallium nitride compound semiconductor (AlxGa1?xN) ha
    Type: Grant
    Filed: January 23, 2002
    Date of Patent: January 10, 2006
    Assignees: Toyoda Gosei Co., Ltd., Japan Science and Technology Agency, Nagoya University
    Inventors: Katsuhide Manabe, Akira Mabuchi, Hisaki Kato, Michinari Sassa, Norikatsu Koide, Shiro Yamazaki, Masafumi Hashimoto, Isamu Akasaki
  • Publication number: 20050260781
    Abstract: An Al0.15Ga0.85N layer 2 is formed on a silicon substrate 1 in a striped or grid pattern. A GaN layer 3 is formed in regions A where the substrate 1 is exposed and in regions B which are defined above the layer 2. At this time, the GaN layer grows epitaxially and three-dimensionally (not only in a vertical direction but also in a lateral direction) on the Al0.15Ga0.85N layer 2. Since the GaN layer grows epitaxially in the lateral direction as well, a GaN compound semiconductor having a greatly reduced number of dislocations is obtained in lateral growth regions (regions A where the substrate 1 is exposed).
    Type: Application
    Filed: July 5, 2005
    Publication date: November 24, 2005
    Applicant: Toyoda Gosei Co., Ltd.
    Inventor: Norikatsu Koide
  • Patent number: 6962828
    Abstract: A novel light-emitting device includes a saphire substrate with a light-emitting layer comprising InXGa1?XN, where the critical value of the indium mole fraction X is determined by a newly derived relationship between the indium mole fraction X and the wavelength ? of emitted light.
    Type: Grant
    Filed: November 15, 2000
    Date of Patent: November 8, 2005
    Assignees: Toyoda Gosei Co., Ltd.
    Inventors: Norikatsu Koide, Masayoshi Koike, Shiro Yamasaki, Isamu Akasaki, Hiroshi Amano
  • Patent number: 6930329
    Abstract: An Al0.15Ga0.85N layer 2 is formed on a silicon substrate 1 in a striped or grid pattern. A GaN layer 3 is formed in regions A where the substrate 1 is exposed and in regions B which are defined above the layer 2. At this time, the GaN layer grows epitaxially and three-dimensionally (not only in a vertical direction but also in a lateral direction) on the Al0.15Ga0.85N layer 2. Since the GaN layer grows epitaxially in the lateral direction as well, a GaN compound semiconductor having a greatly reduced number of dislocations is obtained in lateral growth regions (regions A where the substrate 1 is exposed).
    Type: Grant
    Filed: October 15, 2003
    Date of Patent: August 16, 2005
    Assignee: Toyoda Gosei Co., Ltd.
    Inventor: Norikatsu Koide
  • Patent number: 6893945
    Abstract: An Al0.15Ga0.85N layer 2 is formed on a silicon substrate 1 in a striped or grid pattern. A GaN layer 3 is formed in regions A where the substrate 1 is exposed and in regions B which are defined above the layer 2. At this time, the GaN layer grows epitaxially and three-dimensionally (not only in a vertical direction but also in a lateral direction) on the Al0.15Ga0.85N layer 2. Since the GaN layer grows epitaxially in the lateral direction as well, a GaN compound semiconductor having a greatly reduced number of dislocations is obtained in lateral growth regions (regions A where the substrate 1 is exposed).
    Type: Grant
    Filed: July 27, 2004
    Date of Patent: May 17, 2005
    Assignee: Toyoda Gosei Co., Ltd.
    Inventor: Norikatsu Koide
  • Patent number: 6888867
    Abstract: A semiconductor laser device includes a substrate and an n-GaN layer composed of a nitride semiconductor formed on the substrate. The substrate includes a trench having as a slope a plane inclined 62 degrees from the main plane of the substrate, or a plane inclined within 3 degrees in an arbitrary direction from the inclined plane. The n-GaN layer is formed on the slope. On the n-GaN layer are formed a lower clad layer, an active layer, and an upper clad layer, each composed of a nitride semiconductor. The active layer has a plane orientation substantially matching the plane orientation of the main plane.
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: May 3, 2005
    Assignees: Sharp Kabushiki Kaisha
    Inventors: Nobuhiko Sawaki, Yoshio Honda, Norifumi Kameshiro, Masahito Yamaguchi, Norikatsu Koide, Shigetoshi Ito, Tomoki Ono, Katsuki Furukawa
  • Patent number: 6881651
    Abstract: A layer comprising silicon oxide (SiO2) is formed on (111) plane of a silicon (Si) substrate in a striped pattern which is longer in the [1-10] axis direction perpendicular to the [110] axis direction. Then a group III nitride compound semiconductor represented by a general formula AlxGayIn1?x?yN (0?x?1, 0?y?1, 0?x+y?1) is laminated thereon. The group III nitride compound semiconductor represented by a general formula AlxGayIn1?x?yN (0?x?1, 0?y?1, 0?x+y?1) grows epitaxially on the substrate-exposed regions B which are not covered by the SiO2 layer, and grows epitaxially on the SiO2 layer in lateral direction from the regions B. Consequently, a group III nitride compound semiconductor having no dislocations can be obtained.
    Type: Grant
    Filed: March 7, 2003
    Date of Patent: April 19, 2005
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Norikatsu Koide, Hisaki Kato
  • Patent number: 6853009
    Abstract: A barrier layer made of AlxGa1-xN (0<x?0.18) is formed in a light-emitting semiconductor device using gallium nitride compound having a multi quantum-well (MQW) structure. By controlling a composition ratio x of aluminum (Al) or thickness of the barrier layer, luminous intensity of the device is improved. An n-cladding layer made of AlxGa1-xN (0<x?0.06) is formed in a light-emitting semiconductor device using gallium nitride compound. By controlling a composition ratio x of aluminum or thickness of the n-cladding layer, luminous intensity of the device is improved. A p-type layer and an n-type layer are formed in a light-emitting semiconductor device using gallium nitride compound having a double-hetero junction structure. By controlling a ratio of a hole concentration of the p-type layer and an electron concentration of the n-type layer approximates to 1, luminous intensity of the device is improved.
    Type: Grant
    Filed: June 11, 2002
    Date of Patent: February 8, 2005
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Hisaki Kato, Hiroshi Watanabe, Norikatsu Koide, Shinya Asami
  • Patent number: 6844572
    Abstract: A light emitting semiconductor device includes a silicon substrate and a compound semiconductor layer disposed on a main plane of the silicon substrate and represented by a general expression InxGayAlzN, wherein x+y+z=1, 0?x?1, 0?y?1, and 0?z?1. The silicon substrate has a groove having an oblique plane corresponding to a plane inclined relative to the substrate's main plane by 62 degrees or a plane inclined relative to the inclined plane in any direction within three degrees, and on the oblique plane a plurality or quantum well layers different in thickness are stacked.
    Type: Grant
    Filed: March 18, 2003
    Date of Patent: January 18, 2005
    Assignees: Sharp Kabushiki Kaisha, Nobuhiko Swaki
    Inventors: Nobuhiko Sawaki, Norikatsu Koide, Kensaku Yamamoto
  • Publication number: 20050001245
    Abstract: An Al0.15Ga0.85N layer 2 is formed on a silicon substrate 1 in a striped or grid pattern. A GaN layer 3 is formed in regions A where the substrate 1 is exposed and in regions B which are defined above the layer 2. At this time, the GaN layer grows epitaxially and three-dimensionally (not only in a vertical direction but also in a lateral direction) on the Al0.15Ga0.85N layer 2. Since the GaN layer grows epitaxially in the lateral direction as well, a GaN compound semiconductor having a greatly reduced number of dislocations is obtained in lateral growth regions (regions A where the substrate 1 is exposed).
    Type: Application
    Filed: July 27, 2004
    Publication date: January 6, 2005
    Applicant: Toyoda Gosei Co., Ltd.
    Inventor: Norikatsu Koide
  • Patent number: 6835966
    Abstract: An Al0.15Ga0.85N layer 2 is formed on a silicon substrate 1 in a striped or grid pattern. A GaN layer 3 is formed in regions A where the substrate 1 is exposed and in regions B which are defined above the layer 2. At this time, the GaN layer grows epitaxially and three-dimensionally (not only in a vertical direction but also in a lateral direction) on the Al0.15Ga0.85N layer 2. Since the GaN layer grows epitaxially in the lateral direction as well, a GaN compound semiconductor having a greatly reduced number of dislocations is obtained in lateral growth regions (regions A where the substrate 1 is exposed).
    Type: Grant
    Filed: March 20, 2003
    Date of Patent: December 28, 2004
    Assignee: Toyoda Gosei Co., Ltd.
    Inventor: Norikatsu Koide
  • Patent number: 6830992
    Abstract: Disclosed herein are (1) a light-emitting semiconductor device that uses a gallium nitride compound semiconductor (AlxGa1−xN) in which the n-layer of n-type gallium nitride compound semiconductor (AlxGa1−xN) is of double-layer structure including an n-layer of low carrier concentration and an n+-layer of high carrier concentration, the former being adjacent to the i-layer of insulating gallium nitride compound semiconductor (AlxGa1−xN); (2) a light-emitting semiconductor device of similar structure as above in which the i-layer is of double-layer structure including an iL-layer of low impurity concentration containing p-type impurities in comparatively low concentration and an iH-layer of high impurity concentration containing p-type impurities in comparatively high concentration, the former being adjacent to the n-layer; (3) a light-emitting semiconductor device having both of the above-mentioned features and (4) a method of producing a layer of an n-type gallium nitride compound semic
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: December 14, 2004
    Assignees: Toyoda Gosei Co., Ltd., Nagoya University, Japan Science and Technology Corporation
    Inventors: Katsuhide Manabe, Akira Mabuchi, Hisaki Kato, Michinari Sassa, Norikatsu Koide, Shiro Yamazaki, Masafumi Hashimoto, Isamu Akasaki