Patents by Inventor Norio Chujo

Norio Chujo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220404967
    Abstract: A storage system includes a CPU, a first memory module, a second memory module, and a storage device. The processor and the first memory module are installed in the same node. The second memory module are replaceable without shutting down power supply of the node. The first memory module stores an operating system and a program for managing user data to be stored in the storage device. The second memory module stores cache data of the user data to be stored in the storage device. The processor is configured to store a copy of data to be stored in the second memory module in the third memory module.
    Type: Application
    Filed: March 22, 2022
    Publication date: December 22, 2022
    Applicant: Hitachi, Ltd.
    Inventor: Norio CHUJO
  • Patent number: 11229115
    Abstract: In a multilayer wiring board having through holes used in an electronic device, wiring is efficiently performed at high density while preventing crosstalk of differential signals. A wiring board includes: a plurality of pads arranged linearly at a predetermined pitch; a plurality of through holes arranged in parallel along an arrangement direction of the pads; and a wiring pattern connecting the pad to the through hole. Between the through holes connected to the pads which are connected to the ground via the wiring patterns, two through holes through which each of a pair of differential signals constituting a differential signal pair passes are provided such that a direction of a straight line connecting the two through holes is inclined to the arrangement direction of the pads.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: January 18, 2022
    Assignee: Hitachi, Ltd.
    Inventors: Norio Chujo, Yutaka Uematsu, Masayoshi Yagyu
  • Publication number: 20220013937
    Abstract: A wiring substrate is connected to a backplane, and includes: a first connector that is mounted on one surface of the wiring substrate and is connected to the backplane; an opening portion that is formed in the one surface on a side opposite to a side connected to the backplane of the first connector, and through which a cable having one end connected to the first connector is passed; an integrated circuit that is mounted on the one surface on a side opposite to a side on which the first connector is present relative to the opening portion; and a second connector that is mounted on the other surface on a side opposite to the one surface in the vicinity of the integrated circuit on the side opposite to the side on which the first connector is present relative to the opening portion, is connected to the integrated circuit via a through hole penetrating the wiring substrate, and is connected to the other end of the cable.
    Type: Application
    Filed: May 24, 2021
    Publication date: January 13, 2022
    Inventors: Norio CHUJO, Yasuhiro IKEDA
  • Patent number: 10763214
    Abstract: Performance of a semiconductor device is improved. The semiconductor device includes a semiconductor chip and a chip component that are electrically connected to each other via a wiring substrate. The semiconductor chip includes an input/output circuit and an electrode pad electrically connected to the input/output circuit and transmitting the signal. The chip component includes a plurality of types of passive elements and includes an equalizer circuit for correcting signal waveforms of the signal, and electrodes electrically connected to the equalizer circuit. The path length from the signal electrode of the semiconductor chip to the electrode of the chip component is 1/16 or more and 3.5/16 or less with respect to the wavelength of the signal.
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: September 1, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Shuuichi Kariyazaki, Kazuyuki Nakagawa, Keita Tsuchiya, Yosuke Katsura, Shinji Katayama, Norio Chujo, Masayoshi Yagyu, Yutaka Uematsu
  • Publication number: 20200260570
    Abstract: In a multilayer wiring board having through holes used in an electronic device, wiring is efficiently performed at high density while preventing crosstalk of differential signals. A wiring board includes: a plurality of pads arranged linearly at a predetermined pitch; a plurality of through holes arranged in parallel along an arrangement direction of the pads; and a wiring pattern connecting the pad to the through hole. Between the through holes connected to the pads which are connected to the ground via the wiring patterns, two through holes through which each of a pair of differential signals constituting a differential signal pair passes are provided such that a direction of a straight line connecting the two through holes is inclined to the arrangement direction of the pads.
    Type: Application
    Filed: December 13, 2017
    Publication date: August 13, 2020
    Inventors: Norio CHUJO, Yutaka UEMATSU, Masayoshi YAGYU
  • Patent number: 10541216
    Abstract: A semiconductor device includes a semiconductor chip mounted over a wiring substrate. A signal wiring for input for transmitting input signals to the semiconductor chip and a signal wiring for output for transmitting output signals from the semiconductor chip are placed in different wiring layers in the wiring substrate and overlap with each other. In the direction of thickness of the wiring substrate, each of the signal wirings is sandwiched between conductor planes supplied with reference potential. In the front surface of the semiconductor chip, a signal electrode for input and a signal electrode for output are disposed in different rows. In cases where the signal wiring for output is located in a layer higher than the signal wiring for input in the wiring substrate, the signal electrode for output is placed in a row closer to the outer edge of the front surface than the signal electrode for input.
    Type: Grant
    Filed: October 30, 2018
    Date of Patent: January 21, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Kazuyuki Nakagawa, Keita Tsuchiya, Yoshiaki Sato, Shuuichi Kariyazaki, Norio Chujo, Masayoshi Yagyu, Yutaka Uematsu
  • Publication number: 20190363050
    Abstract: Performance of a semiconductor device is improved. The semiconductor device includes a semiconductor chip and a chip component that are electrically connected to each other via a wiring substrate. The semiconductor chip includes an input/output circuit and an electrode pad electrically connected to the input/output circuit and transmitting the signal. The chip component includes a plurality of types of passive elements and includes an equalizer circuit for correcting signal waveforms of the signal, and electrodes electrically connected to the equalizer circuit. The path length from the signal electrode of the semiconductor chip to the electrode of the chip component is 1/16 or more and 3.5/16 or less with respect to the wavelength of the signal.
    Type: Application
    Filed: May 7, 2019
    Publication date: November 28, 2019
    Inventors: Shuuichi KARIYAZAKI, Kazuyuki NAKAGAWA, Keita TSUCHIYA, Yosuke KATSURA, Shinji KATAYAMA, Norio CHUJO, Masayoshi YAGYU, Yutaka UEMATSU
  • Publication number: 20190198462
    Abstract: A semiconductor device includes a semiconductor chip mounted over a wiring substrate. A signal wiring for input for transmitting input signals to the semiconductor chip and a signal wiring for output for transmitting output signals from the semiconductor chip are placed in different wiring layers in the wiring substrate and overlap with each other. In the direction of thickness of the wiring substrate, each of the signal wirings is sandwiched between conductor planes supplied with reference potential. In the front surface of the semiconductor chip, a signal electrode for input and a signal electrode for output are disposed in different rows. In cases where the signal wiring for output is located in a layer higher than the signal wiring for input in the wiring substrate, the signal electrode for output is placed in a row closer to the outer edge of the front surface than the signal electrode for input.
    Type: Application
    Filed: October 30, 2018
    Publication date: June 27, 2019
    Inventors: Kazuyuki NAKAGAWA, Keita TSUCHIYA, Yoshiaki SATO, Shuuichi KARIYAZAKI, Norio CHUJO, Masayoshi YAGYU, Yutaka UEMATSU
  • Patent number: 9698783
    Abstract: Provided is a configuration of a driver integrated circuit that can output a voltage exceeding the withstand voltage of a process, and that satisfies required apparatus performance (high speed and high voltage). A differential input circuit, a level shift circuit, and an output circuit are manufactured by the same process and divided and disposed on three or more chips with different substrate potentials (sub-potentials). By setting different applied voltages to the substrates of the chips, an output voltage greater than the process withstand voltage can be provided (see FIG. 2).
    Type: Grant
    Filed: May 24, 2012
    Date of Patent: July 4, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Wen Li, Norio Chujo, Masami Makuuchi, Takehito Kamimura
  • Patent number: 9470863
    Abstract: The present invention achieves a way of mounting plural optical modules onto a wiring board more simply and more densely. There is provided an optical module assembly for mounting plural optical modules onto a wiring board. The optical module assembly includes the optical modules to which optical wiring has been connected and a module case to accommodate the optical modules. The optical modules and the module case are unified. The module case is provided with a floating mechanism for making the optical modules floating, when accommodated therein. The floating mechanism is comprised of plate springs or the like.
    Type: Grant
    Filed: April 1, 2015
    Date of Patent: October 18, 2016
    Assignee: Hitachi Metals, Ltd.
    Inventors: Toshiaki Takai, Yoshinori Sunaga, Masataka Sato, Kinya Yamazaki, Norio Chujo, Naoki Matsushima
  • Patent number: 9217835
    Abstract: There is provided a photoelectric conversion module that can be mounted two-dimensionally over a device board in a high-density, low-height manner and cooled efficiently with an easy-to-install collective-type radiator. In the photoelectric conversion module mounted over the device board, an optical connector is attached to that surface of an optical subassembly facing the device board. An electric connector has at least two sides thereof opened so that the optical transmission medium is threaded therethrough and extended through at least two facing sides of the optical subassembly. The optical transmission medium is thus extended between the optical subassembly and the device board in a vertically stacked manner.
    Type: Grant
    Filed: October 7, 2014
    Date of Patent: December 22, 2015
    Assignee: Hitachi Metals, Ltd.
    Inventors: Kazuo Ishiyama, Yasunobu Matsuoka, Hideo Arimoto, Norio Chujo, Yoshinori Sunaga, Kinya Yamazaki, Yoshiaki Ishigami
  • Patent number: 9182555
    Abstract: A backplane optical connector includes a first connector secured to a backplane and a second connector mounted on a daughter board. The first connector includes a first optical input-output part, guide holes, and a shutter. The shutter is a plate that covers the first optical input-output part when the daughter board is not inserted. The second connector includes guide pins, a pressing part, and a second optical input-output part. The guide pins first make contact with the first connector and are inserted into the guide holes. The pressing part pivots the shutter after degrees of freedom of the second connector are restricted by the guide pins and the guide holes. There is a space for accommodating the pivoted shutter between the pressing part and the second optical input-output part. The pressing part does not make contact with the first connector until the pressing part makes contact with the shutter.
    Type: Grant
    Filed: April 11, 2013
    Date of Patent: November 10, 2015
    Assignee: JAPAN AVIATION ELECTRONICS INDUSTRY, LIMITED
    Inventors: Yuichi Koreeda, Kohji Nakagawa, Rika Nomura, Norio Chujo
  • Publication number: 20150286017
    Abstract: The present invention achieves a way of mounting plural optical modules onto a wiring board more simply and more densely. There is provided an optical module assembly for mounting plural optical modules onto a wiring board. The optical module assembly includes the optical modules to which optical wiring has been connected and a module case to accommodate the optical modules. The optical modules and the module case are unified. The module case is provided with a floating mechanism for making the optical modules floating, when accommodated therein. The floating mechanism is comprised of plate springs or the like.
    Type: Application
    Filed: April 1, 2015
    Publication date: October 8, 2015
    Applicant: Hitachi Metals, Ltd.
    Inventors: Toshiaki TAKAI, Yoshinori SUNAGA, Masataka SATO, Kinya YAMAZAKI, Norio CHUJO, Naoki MATSUSHIMA
  • Publication number: 20150147031
    Abstract: The present invention relates to a A backplane optical connector comprising includes a first connector secured to a backplane and a second connector mounted on a daughter board. The first connector comprises includes a first optical input-output part, guide holes, and a shutter. The shutter is a plate that covers the first optical input-output part when the daughter board is not inserted. The second connector comprises includes guide pins, a pressing part, and a second optical input-output part. The guide pins first make contact with the first connector and are inserted into the guide holes during insertion of the daughter board. The pressing part pivots the shutter after degrees of freedom of the second connector are restricted by the guide pins and the guide holes. There is a space for accommodating the pivoted shutter between the pressing part and the second optical input-output part.
    Type: Application
    Filed: April 11, 2013
    Publication date: May 28, 2015
    Applicant: JAPAN AVIATION ELECTRONICS INDUSTRY, LIMITED
    Inventors: Yuichi Koreeda, Kohji Nakagawa, Rika Nomura, Norio Chujo
  • Publication number: 20150098675
    Abstract: There is provided a photoelectric conversion module that can be mounted two-dimensionally over a device board in a high-density, low-height manner and cooled efficiently with an easy-to-install collective-type radiator. In the photoelectric conversion module mounted over the device board, an optical connector is attached to that surface of an optical subassembly facing the device board. An electric connector has at least two sides thereof opened so that the optical transmission medium is threaded therethrough and extended through at least two facing sides of the optical subassembly. The optical transmission medium is thus extended between the optical subassembly and the device board in a vertically stacked manner.
    Type: Application
    Filed: October 7, 2014
    Publication date: April 9, 2015
    Inventors: Kazuo ISHIYAMA, Yasunobu MATSUOKA, Hideo ARIMOTO, Norio CHUJO, Yoshinori SUNAGA, Kinya YAMAZAKI, Yoshiaki ISHIGAMI
  • Publication number: 20140125398
    Abstract: Provided is a configuration of a driver integrated circuit that can output a voltage exceeding the withstand voltage of a process, and that satisfies required apparatus performance (high speed and high voltage). A differential input circuit, a level shift circuit, and an output circuit are manufactured by the same process and divided and disposed on three or more chips with different substrate potentials (sub-potentials). By setting different applied voltages to the substrates of the chips, an output voltage greater than the process withstand voltage can be provided (see FIG. 2).
    Type: Application
    Filed: May 24, 2012
    Publication date: May 8, 2014
    Applicant: Hitachi, Ltd.
    Inventors: Wen Li, Norio Chujo, Masami Makuuchi, Takehito Kamimura
  • Publication number: 20140023315
    Abstract: An optical module achieving optical coupling at a low cost and by a simple and convenient process is intended to be provided. For attaining the purpose, a transparent member sealing an optical device and an optical transmission channel are connected as an optical coupling structure. Specifically, optical coupling is achieved in an optical module having an optical device, a first substrate having the optical device mounted thereon, and a second substrate or a transparent resin provided over the first substrate so as to hermetically seal the optical device by connecting an optical transmission channel over the second substrate or the transparent resin at a portion in which light from the optical device is transmitted.
    Type: Application
    Filed: November 18, 2011
    Publication date: January 23, 2014
    Applicant: Hitachi Ltd
    Inventors: Toshiaki Takai, Norio Chujo, Saori Hamamura
  • Patent number: 8451063
    Abstract: A circuit having a sensor with a stray capacitance value. An output from the sensor is connected to the input of an amplifier while a negative capacitance circuit is electrically connected in parallel with the sensor output. The negative capacitance circuit reduces the effect of the sensor stray capacitance to provide an increased bandwidth and decreased noise on the amplifier output.
    Type: Grant
    Filed: September 29, 2010
    Date of Patent: May 28, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Masayoshi Takahashi, Norio Chujo, Masami Makuuchi
  • Patent number: D704645
    Type: Grant
    Filed: April 9, 2012
    Date of Patent: May 13, 2014
    Assignees: Hitachi, Ltd., Japan Aviation Electronics Industry, Limited
    Inventors: Rika Nomura, Koji Nakagawa, Norio Chujo, Yuichi Koreeda
  • Patent number: D705172
    Type: Grant
    Filed: April 9, 2012
    Date of Patent: May 20, 2014
    Assignees: Hitachi, Ltd., Japan Aviation Electronics Industry, Limited
    Inventors: Rika Nomura, Koji Nakagawa, Norio Chujo, Yuichi Koreeda