Patents by Inventor Noritaka ISHIHARA
Noritaka ISHIHARA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20180151596Abstract: A metal oxide film including a crystal part and having highly stable physical properties is provided. The size of the crystal part is less than or equal to 10 nm, which allows the observation of circumferentially arranged spots in a nanobeam electron diffraction pattern of the cross section of the metal oxide film when the measurement area is greater than or equal to 5 nm? and less than or equal to 10 n?.Type: ApplicationFiled: January 25, 2018Publication date: May 31, 2018Inventors: Masahiro TAKAHASHI, Takuya HIROHASHI, Masashi TSUBUKU, Noritaka ISHIHARA, Masashi OOTA
-
Patent number: 9947777Abstract: Provided is a semiconductor device having favorable reliability.Type: GrantFiled: April 20, 2017Date of Patent: April 17, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kazutaka Kuriki, Yuji Egi, Hiromi Sawai, Yusuke Nonaka, Noritaka Ishihara, Daisuke Matsubayashi
-
Patent number: 9911864Abstract: Defects in an oxide semiconductor film are reduced in a semiconductor device including the oxide semiconductor film. The electrical characteristics of a semiconductor device including an oxide semiconductor film are improved. The reliability of a semiconductor device including an oxide semiconductor film is improved. A semiconductor device including an oxide semiconductor layer; a metal oxide layer in contact with the oxide semiconductor layer, the metal oxide layer including an In-M oxide (M is Ti, Ga, Y, Zr, La, Ce, Nd, or Hf); and a conductive layer in contact with the metal oxide layer, the conductive layer including copper, aluminum, gold, or silver is provided. In the semiconductor device, y/(x+y) is greater than or equal to 0.75 and less than 1 where the atomic ratio of In to M included in the metal oxide layer is In:M=x:y.Type: GrantFiled: June 27, 2017Date of Patent: March 6, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Noritaka Ishihara, Masashi Oota, Masashi Tsubuku, Masami Jintyou, Yukinori Shima, Junichi Koezuka, Yasuharu Hosaka, Shunpei Yamazaki
-
Patent number: 9882058Abstract: A semiconductor device in which variation in electrical characteristics between transistors is reduced is provided. A transistor where a channel is formed in an oxide semiconductor layer is included, and a concentration of carriers contained in a region where the channel is formed in the oxide semiconductor layer is lower than or equal to 1×1015/cm3, preferably lower than or equal to 1×1013/cm3, more preferably lower than or equal to 1×1011/cm3, whereby an energy barrier height which electrons flowing between a source and a drain should go over converges at a constant value. In this manner, a semiconductor device in which variation in the electrical characteristics between the transistors is inhibited is provided.Type: GrantFiled: April 22, 2014Date of Patent: January 30, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Daisuke Matsubayashi, Toshimitsu Obonai, Noritaka Ishihara, Shunpei Yamazaki
-
Patent number: 9881939Abstract: A metal oxide film including a crystal part and having highly stable physical properties is provided. The size of the crystal part is less than or equal to 10 nm, which allows the observation of circumferentially arranged spots in a nanobeam electron diffraction pattern of the cross section of the metal oxide film when the measurement area is greater than or equal to 5 nm? and less than or equal to 10 nm?.Type: GrantFiled: November 5, 2013Date of Patent: January 30, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masahiro Takahashi, Takuya Hirohashi, Masashi Tsubuku, Noritaka Ishihara, Masashi Oota
-
Patent number: 9871058Abstract: A metal oxide film including a crystal part and having highly stable physical properties is provided. The size of the crystal part is less than or equal to 10 nm, which allows the observation of circumferentially arranged spots in a nanobeam electron diffraction pattern of the cross section of the metal oxide film when the measurement area is greater than or equal to 5 nm? and less than or equal to 10 nm?.Type: GrantFiled: April 16, 2015Date of Patent: January 16, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masahiro Takahashi, Takuya Hirohashi, Masashi Tsubuku, Noritaka Ishihara, Masashi Oota
-
Publication number: 20180013005Abstract: After a sputtering gas is supplied to a deposition chamber, plasma including an ion of the sputtering gas is generated in the vicinity of a target. The ion of the sputtering gas is accelerated and collides with the target, so that flat-plate particles and atoms of the target are separated from the target. The flat-plate particles are deposited with a gap therebetween so that the flat plane faces a substrate. The atom and the aggregate of the atoms separated from the target enter the gap between the deposited flat-plate particles and grow in the plane direction of the substrate to fill the gap. A film is formed over the substrate. After the deposition, heat treatment is performed at high temperature in an oxygen atmosphere, which forms an oxide with a few oxygen vacancies and high crystallinity.Type: ApplicationFiled: September 7, 2017Publication date: January 11, 2018Inventors: Shunpei YAMAZAKI, Haruyuki BABA, Akio SUZUKI, Hiromi SAWAI, Masahiko HAYAKAWA, Noritaka ISHIHARA, Masashi OOTA
-
Patent number: 9831274Abstract: A metal oxide film including a crystal part and having highly stable physical properties is provided. The size of the crystal part is less than or equal to 10 nm, which allows the observation of circumferentially arranged spots in a nanobeam electron diffraction pattern of the cross section of the metal oxide film when the measurement area is greater than or equal to 5 nm? and less than or equal to 10 nm?.Type: GrantFiled: June 9, 2015Date of Patent: November 28, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masahiro Takahashi, Takuya Hirohashi, Masashi Tsubuku, Noritaka Ishihara, Masashi Oota
-
Patent number: 9825181Abstract: A transistor in which a change in characteristics is small is provided. A circuit, a semiconductor device, a display device, or an electronic device in which a change in characteristics of the transistor is small is provided. The transistor includes an oxide semiconductor; a channel region is formed in the oxide semiconductor; the channel region contains indium, an element M, and zinc; the element M is one or more selected from aluminum, gallium, yttrium, tin, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium; a gate insulator contains silicon and oxygen whose atomic number is 1.5 times or more as large as the atomic number of silicon; the carrier density of the channel region is higher than or equal to 1×109 cm?3 and lower than or equal to 5×1016 cm?3; and the energy gap of the channel region is higher than or equal to 2.7 eV and lower than or equal to 3.1 eV.Type: GrantFiled: December 9, 2016Date of Patent: November 21, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masashi Tsubuku, Kazuya Sugimoto, Tsutomu Murakawa, Motoki Nakashima, Shinpei Matsuda, Noritaka Ishihara, Daisuke Kurosaki, Toshimitsu Obonai, Hiroshi Kanemura, Junichi Koezuka
-
Patent number: 9806201Abstract: A method for forming an oxide that can be used as a semiconductor of a transistor or the like is provided. In particular, a method for forming an oxide with fewer defects such as grain boundaries is provided. One embodiment of the present invention is a semiconductor device including an oxide semiconductor, an insulator, and a conductor. The oxide semiconductor includes a region overlapping with the conductor with the insulator therebetween. The oxide semiconductor includes a crystal grain with an equivalent circle diameter of 1 nm or more and a crystal grain with an equivalent circle diameter less than 1 nm.Type: GrantFiled: March 3, 2015Date of Patent: October 31, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yoshinori Yamada, Yusuke Nonaka, Masashi Oota, Yoichi Kurosawa, Noritaka Ishihara, Takashi Hamada, Mitsuhiro Ichijo, Yuji Egi
-
Publication number: 20170309732Abstract: Provided is a semiconductor device having favorable reliability.Type: ApplicationFiled: April 20, 2017Publication date: October 26, 2017Inventors: Shunpei YAMAZAKI, Kazutaka KURIKI, Yuji EGI, Hiromi SAWAI, Yusuke NONAKA, Noritaka ISHIHARA, Daisuke MATSUBAYASHI
-
Publication number: 20170301796Abstract: Defects in an oxide semiconductor film are reduced in a semiconductor device including the oxide semiconductor film. The electrical characteristics of a semiconductor device including an oxide semiconductor film are improved. The reliability of a semiconductor device including an oxide semiconductor film is improved. A semiconductor device including an oxide semiconductor layer; a metal oxide layer in contact with the oxide semiconductor layer, the metal oxide layer including an In-M oxide (M is Ti, Ga, Y, Zr, La, Ce, Nd, or Hf); and a conductive layer in contact with the metal oxide layer, the conductive layer including copper, aluminum, gold, or silver is provided. In the semiconductor device, y/(x+y) is greater than or equal to 0.75 and less than 1 where the atomic ratio of In to M included in the metal oxide layer is In:M=x:y.Type: ApplicationFiled: June 27, 2017Publication date: October 19, 2017Inventors: Noritaka ISHIHARA, Masashi OOTA, Masashi TSUBUKU, Masami JINTYOU, Yukinori SHIMA, Junichi KOEZUKA, Yasuharu HOSAKA, Shunpei YAMAZAKI
-
Patent number: 9761734Abstract: Defects in an oxide semiconductor film are reduced in a semiconductor device including the oxide semiconductor film. The electrical characteristics of a semiconductor device including an oxide semiconductor film are improved. The reliability of a semiconductor device including an oxide semiconductor film is improved. A semiconductor device including an oxide semiconductor layer; a metal oxide layer in contact with the oxide semiconductor layer, the metal oxide layer including an In-M oxide (M is Ti, Ga, Y, Zr, La, Ce, Nd, or Hf); and a conductive layer in contact with the metal oxide layer, the conductive layer including copper, aluminum, gold, or silver is provided. In the semiconductor device, y/(x+y) is greater than or equal to 0.75 and less than 1 where the atomic ratio of In to M included in the metal oxide layer is In:M=x:y.Type: GrantFiled: June 6, 2016Date of Patent: September 12, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Noritaka Ishihara, Masashi Oota, Masashi Tsubuku, Masami Jintyou, Yukinori Shima, Junichi Koezuka, Yasuharu Hosaka, Shunpei Yamazaki
-
Patent number: 9761733Abstract: After a sputtering gas is supplied to a deposition chamber, plasma including an ion of the sputtering gas is generated in the vicinity of a target. The ion of the sputtering gas is accelerated and collides with the target, so that flat-plate particles and atoms of the target are separated from the target. The flat-plate particles are deposited with a gap therebetween so that the flat plane faces a substrate. The atom and the aggregate of the atoms separated from the target enter the gap between the deposited flat-plate particles and grow in the plane direction of the substrate to fill the gap. A film is formed over the substrate. After the deposition, heat treatment is performed at high temperature in an oxygen atmosphere, which forms an oxide with a few oxygen vacancies and high crystallinity.Type: GrantFiled: November 30, 2015Date of Patent: September 12, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Haruyuki Baba, Akio Suzuki, Hiromi Sawai, Masahiko Hayakawa, Noritaka Ishihara, Masashi Oota
-
Patent number: 9754972Abstract: A metal oxide film including a crystal part and having highly stable physical properties is provided. The size of the crystal part is less than or equal to 10 nm, which allows the observation of circumferentially arranged spots in a nanobeam electron diffraction pattern of the cross section of the metal oxide film when the measurement area is greater than or equal to 5 nm? and less than or equal to 10 nm?.Type: GrantFiled: April 16, 2015Date of Patent: September 5, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masahiro Takahashi, Takuya Hirohashi, Masashi Tsubuku, Noritaka Ishihara, Masashi Oota
-
Publication number: 20170236949Abstract: A semiconductor device with improved electrical characteristics is provided. A semiconductor device with improved field effect mobility is provided. A semiconductor device in which the field-effect mobility is not lowered even at high temperatures is provided. A semiconductor device which can be formed at low temperatures is provided. A semiconductor device with improved productivity can be provided. In the semiconductor device, there is a range of a gate voltage where the field-effect mobility increases as the temperature increases within a range of the gate voltage from 0 V to 10 V. For example, such a range of a gate voltage exists at temperatures ranging from a room temperature (25° C.) to 120° C. In the semiconductor device, the off-state current is kept extremely low (lower than or equal to the detection limit of a measurement device) within the above temperature range.Type: ApplicationFiled: February 10, 2017Publication date: August 17, 2017Inventors: Shunpei YAMAZAKI, Kenichi OKAZAKI, Masashi TSUBUKU, Satoru SAITO, Noritaka ISHIHARA
-
Publication number: 20170178904Abstract: A method for manufacturing a sputtering target with which an oxide semiconductor film with a small amount of defects can be formed is provided. Alternatively, an oxide semiconductor film with a small amount of defects is formed. A method for manufacturing a sputtering target is provided, which includes the steps of: forming a polycrystalline In-M-Zn oxide (M represents a metal chosen among aluminum, titanium, gallium, yttrium, zirconium, lanthanum, cesium, neodymium, and hafnium) powder by mixing, sintering, and grinding indium oxide, an oxide of the metal, and zinc oxide; forming a mixture by mixing the polycrystalline In-M-Zn oxide powder and a zinc oxide powder; forming a compact by compacting the mixture; and sintering the compact.Type: ApplicationFiled: March 7, 2017Publication date: June 22, 2017Inventors: Shunpei YAMAZAKI, Masashi TSUBUKU, Masashi OOTA, Yoichi KUROSAWA, Noritaka ISHIHARA
-
Publication number: 20170170326Abstract: A transistor in which a change in characteristics is small is provided. A circuit, a semiconductor device, a display device, or an electronic device in which a change in characteristics of the transistor is small is provided. The transistor includes an oxide semiconductor; a channel region is formed in the oxide semiconductor; the channel region contains indium, an element M, and zinc; the element M is one or more selected from aluminum, gallium, yttrium, tin, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium; a gate insulator contains silicon and oxygen whose atomic number is 1.5 times or more as large as the atomic number of silicon; the carrier density of the channel region is higher than or equal to 1×109 cm?3 and lower than or equal to 5×1016 cm?3; and the energy gap of the channel region is higher than or equal to 2.7 eV and lower than or equal to 3.1 eV.Type: ApplicationFiled: December 9, 2016Publication date: June 15, 2017Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masashi TSUBUKU, Kazuya SUGIMOTO, Tsutomu MURAKAWA, Motoki NAKASHIMA, Shinpei MATSUDA, Noritaka ISHIHARA, Daisuke KUROSAKI, Toshimitsu OBONAI, Hiroshi KANEMURA, Junichi KOEZUKA
-
Publication number: 20170141233Abstract: Favorable electrical characteristics are given to a semiconductor device. Furthermore, a semiconductor device having high reliability is provided. One embodiment of the present invention is an oxide semiconductor film having a plurality of electron diffraction patterns which are observed in such a manner that a surface where the oxide semiconductor film is formed is irradiated with an electron beam having a probe diameter whose half-width is 1 nm. The plurality of electron diffraction patterns include 50 or more electron diffraction patterns which are observed in different areas, the sum of the percentage of first electron diffraction patterns and the percentage of second electron diffraction patterns accounts for 100%, the first electron diffraction patterns account for 90% or more, the first electron diffraction pattern includes observed points which indicates that a c-axis is oriented in a direction substantially perpendicular to the surface where the oxide semiconductor film is formed.Type: ApplicationFiled: January 27, 2017Publication date: May 18, 2017Inventors: Akihisa SHIMOMURA, Yasumasa YAMANE, Yuhei SATO, Takahisa ISHIYAMA, Kenichi OKAZAKI, Chiho KAWANABE, Masashi OOTA, Noritaka ISHIHARA
-
Patent number: 9595435Abstract: To form an oxide semiconductor film with a low density of localized levels. To improve electric characteristics of a semiconductor device including the oxide semiconductor. After oxygen is added to an oxide film containing In or Ga in contact with an oxide semiconductor film functioning as a channel, heat treatment is performed to make oxygen in the oxide film containing In or Ga transfer to the oxide semiconductor film functioning as a channel, so that the amount of oxygen vacancies in the oxide semiconductor film is reduced. Further, an oxide film containing In or Ga is formed, oxygen is added to the oxide film, an oxide semiconductor film is formed over the oxide film, and then heat treatment is performed.Type: GrantFiled: October 17, 2013Date of Patent: March 14, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masashi Tsubuku, Ryosuke Watanabe, Noritaka Ishihara, Masashi Oota