Patents by Inventor Noritaka Nakayama
Noritaka Nakayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10322934Abstract: A silicon nitride substrate including silicon nitride crystal grains and a grain boundary phase and having a thermal conductivity of 50 W/m·K or more, wherein, in a sectional structure of the silicon nitride substrate, a ratio (T2/T1) of a total length T2 of the grain boundary phase in a thickness direction with respect to a thickness T1 of the silicon nitride substrate is 0.01 to 0.30, and a variation from a dielectric strength mean value when measured by a four-terminal method in which electrodes are brought into contact with a front and a rear surfaces of the substrate is 20% or less. The dielectric strength mean value of the silicon nitride substrate can be 15 kV/mm or more. According to above structure, there can be obtained a silicon nitride substrate and a silicon nitride circuit board using the substrate in which variation in the dielectric strength is decreased.Type: GrantFiled: December 6, 2017Date of Patent: June 18, 2019Assignees: Kabushiki Kaisha Toshiba, Toshiba Materials Co., Ltd.Inventors: Noritaka Nakayama, Katsuyuki Aoki, Takashi Sano
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Publication number: 20180134558Abstract: A silicon nitride substrate including silicon nitride crystal grains and a grain boundary phase and having a thermal conductivity of 50 W/m·K or more, wherein, in a sectional structure of the silicon nitride substrate, a ratio (T2/T1) of a total length T2 of the grain boundary phase in a thickness direction with respect to a thickness T1 of the silicon nitride substrate is 0.01 to 0.30, and a variation from a dielectric strength mean value when measured by a four-terminal method in which electrodes are brought into contact with a front and a rear surfaces of the substrate is 20% or less. The dielectric strength mean value of the silicon nitride substrate can be 15 kV/mm or more. According to above structure, there can be obtained a silicon nitride substrate and a silicon nitride circuit board using the substrate in which variation in the dielectric strength is decreased.Type: ApplicationFiled: December 6, 2017Publication date: May 17, 2018Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA MATERIALS CO., LTD.Inventors: Noritaka NAKAYAMA, Katsuyuki AOKI, Takashi SANO
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Patent number: 9884762Abstract: A silicon nitride substrate including silicon nitride crystal grains and a grain boundary phase and having a thermal conductivity of 50 W/m·K or more, wherein, in a sectional structure of the silicon nitride substrate, a ratio (T2/T1) of a total length T2 of the grain boundary phase in a thickness direction with respect to a thickness T1 of the silicon nitride substrate is 0.01 to 0.30, and a variation from a dielectric strength mean value when measured by a four-terminal method in which electrodes are brought into contact with a front and a rear surfaces of the substrate is 20% or less. The dielectric strength mean value of the silicon nitride substrate can be 15 kV/rum or more. According to above structure, there can be obtained a silicon nitride substrate and a silicon nitride circuit board using the substrate in which variation in the dielectric strength is decreased.Type: GrantFiled: February 13, 2017Date of Patent: February 6, 2018Assignees: Kabushiki Kaisha Toshiba, Toshiba Materials Co., Ltd.Inventors: Noritaka Nakayama, Katsuyuki Aoki, Takashi Sano
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Publication number: 20170152143Abstract: A silicon nitride substrate including silicon nitride crystal grains and a grain boundary phase and having a thermal conductivity of 50 W/m·K or more, wherein, in a sectional structure of the silicon nitride substrate, a ratio (T2/T1) of a total length T2 of the grain boundary phase in a thickness direction with respect to a thickness T1 of the silicon nitride substrate is 0.01 to 0.30, and a variation from a dielectric strength mean value when measured by a four-terminal method in which electrodes are brought into contact with a front and a rear surfaces of the substrate is 20% or less. The dielectric strength mean value of the silicon nitride substrate can be 15 kV/rum or more. According to above structure, there can be obtained a silicon nitride substrate and a silicon nitride circuit board using the substrate in which variation in the dielectric strength is decreased.Type: ApplicationFiled: February 13, 2017Publication date: June 1, 2017Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA MATERIALS CO., LTD.Inventors: Noritaka NAKAYAMA, Katsuyuki AOKI, Takashi SANO
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Patent number: 9630846Abstract: A silicon nitride substrate including silicon nitride crystal grains and a grain boundary phase and having a thermal conductivity of 50 W/m·K or more, wherein, in a sectional structure of the silicon nitride substrate, a ratio (T2/T1) of a total length T2 of the grain boundary phase in a thickness direction with respect to a thickness T1 of the silicon nitride substrate is 0.01 to 0.30, and a variation from a dielectric strength mean value when measured by a four-terminal method in which electrodes are brought into contact with a front and a rear surfaces of the substrate is 20% or less. The dielectric strength mean value of the silicon nitride substrate can be 15 kV/mm or more. According to above structure, there can be obtained a silicon nitride substrate and a silicon nitride circuit board using the substrate in which variation in the dielectric strength is decreased.Type: GrantFiled: October 21, 2014Date of Patent: April 25, 2017Assignees: Kabushiki Kaisha Toshiba, Toshiba Materials Co., Ltd.Inventors: Noritaka Nakayama, Katsuyuki Aoki, Takashi Sano
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Publication number: 20160251223Abstract: A silicon nitride substrate including silicon nitride crystal grains and a grain boundary phase and having a thermal conductivity of 50 W/m·K or more, wherein, in a sectional structure of the silicon nitride substrate, a ratio (T2/T1) of a total length T2 of the grain boundary phase in a thickness direction with respect to a thickness T1 of the silicon nitride substrate is 0.01 to 0.30, and a variation from a dielectric strength mean value when measured by a four-terminal method in which electrodes are brought into contact with a front and a rear surfaces of the substrate is 20% or less. The dielectric strength mean value of the silicon nitride substrate can be 15 kV/mm or more. According to above structure, there can be obtained a silicon nitride substrate and a silicon nitride circuit board using the substrate in which variation in the dielectric strength is decreased.Type: ApplicationFiled: October 21, 2014Publication date: September 1, 2016Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA MATERIALS CO., LTD.Inventors: Noritaka NAKAYAMA, Katsuyuki AOKI, Takashi SANO
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Patent number: 9356101Abstract: There is provided a polycrystalline aluminum nitride substrate that is effective in growing a GaN crystal. The polycrystalline aluminum nitride base material for use as a substrate material for grain growth of GAN-base semiconductors, contains 1 to 10% by weight of a sintering aid component and has a thermal conductivity of not less than 150 W/m·K, the substrate having a surface free from recesses having a maximum diameter of more than 200 ?m.Type: GrantFiled: September 26, 2011Date of Patent: May 31, 2016Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA MATERIALS CO., LTD.Inventors: Hiroshi Komorita, Noritaka Nakayama, Kentaro Takanami
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Patent number: 9214617Abstract: An electronic component module has a circuit board in which metal plates are bonded to both surfaces of a ceramic substrate, and an electronic component that is bonded to at least one surface of the metal plate and is operable at least 125° C. The electronic component is bonded to the metal plate via a brazing material layer having a higher melting point than a operating temperature of the electronic component.Type: GrantFiled: August 20, 2012Date of Patent: December 15, 2015Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA MATERIALS CO., LTD.Inventors: Hiromasa Kato, Takayuki Naba, Noritaka Nakayama
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Patent number: 8518554Abstract: A ceramic-metal composite includes a ceramic substrate, an active metal brazing alloy layer, and a metal plate bonded to the ceramic substrate through the active metal brazing alloy layer disposed therebetween. The active metal brazing alloy layer contains a transition metal that is at least one element selected from Group-8 elements specified in the periodic table. According to the above configuration, the following composite and device can be provided: the ceramic-metal composite that exhibits high bonding strength, heat cycle resistance, durability, and reliability even if the ceramic-metal composite is used in a power module and a semiconductor device including the ceramic-metal composite.Type: GrantFiled: July 3, 2007Date of Patent: August 27, 2013Assignees: Kabushiki Kaisha Toshiba, Toshiba Materials Co., Ltd.Inventors: Takayuki Naba, Michiyasu Komatsu, Noritaka Nakayama, Hiromasa Kato
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Publication number: 20130168692Abstract: There is provided a polycrystalline aluminum nitride substrate that is effective in growing a GaN crystal. The polycrystalline aluminum nitride base material for use as a substrate material for grain growth of GAN-base semiconductors, contains 1 to 10% by weight of a sintering aid component and has a thermal conductivity of not less than 150 W/m·K, the substrate having a surface free from recesses having a maximum diameter of more than 200 ?m.Type: ApplicationFiled: September 26, 2011Publication date: July 4, 2013Applicants: TOSHIBA MATERIALS CO., LTD., KABUSHIKI KAISHA TOSHIBAInventors: Hiroshi Komorita, Noritaka Nakayama, Kentaro Takanami
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Publication number: 20120305304Abstract: An electronic component module 1 has a circuit board 2 in which metal plates 5 and 7 are bonded to both surfaces of a ceramic substrate 3, and an electronic component 9 that is bonded to at least one surface of the metal plate 5 and is operable at least 125° C. The electronic component 9 is bonded to the metal plate 5 via a brazing material layer 8 having a higher melting point than a operating temperature of the electronic component 9.Type: ApplicationFiled: August 20, 2012Publication date: December 6, 2012Inventors: Hiromasa KATO, Takayuki NABA, Noritaka NAKAYAMA
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Patent number: 8273993Abstract: An electronic component module 1 has a circuit board 2 in which metal plates 5 and 7 are bonded to both surfaces of a ceramic substrate 3, and an electronic component 9 that is bonded to at least one surface of the metal plate 5 and is operable at least 125° C. The electronic component 9 is bonded to the metal plate 5 via a brazing material layer 8 having a higher melting point than a operating temperature of the electronic component 9.Type: GrantFiled: March 5, 2007Date of Patent: September 25, 2012Assignees: Kabushiki Kaisha Toshiba, Toshiba Materials Co., Ltd.Inventors: Hiromasa Kato, Takayuki Naba, Noritaka Nakayama
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Publication number: 20090283309Abstract: Problem is to provide a ceramic-metal composite and a semiconductor device that exhibits high bonding strength, heat cycle resistance, durability, and reliability even if the ceramic-metal composite is used in a power module. A ceramic-metal composite includes a ceramic substrate, an active metal brazing alloy layer, and a metal plate bonded to the ceramic substrate through the active metal brazing alloy layer disposed therebetween. The active metal brazing alloy layer contains a transition metal.Type: ApplicationFiled: July 3, 2007Publication date: November 19, 2009Applicants: Kabushiki Kaisha Toshiba, Toshiba Materials Co., LTDInventors: Takayuki Naba, Michiyasu Komatsu, Noritaka Nakayama, Hiromasa Kato
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Publication number: 20090090452Abstract: In the production of a ceramic substrate (1) with a level difference (3), a surface of a fired substrate obtained by firing of a ceramic green sheet is honed to form the level difference (3). Alternatively, a level difference is first formed through processing of a ceramic green sheet, laminating of a ceramic green sheet, or the like, and thereafter the ceramic green sheet is fired to obtain a fired substrate (ceramic substrate) (1) with a level difference (3).Type: ApplicationFiled: June 26, 2006Publication date: April 9, 2009Inventors: Takayuki Naba, Michiyasu Komatsu, Takao Shirai, Noritaka Nakayama, Mitsuhiro Okamoto
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Publication number: 20090056996Abstract: An electronic component module 1 has a circuit board 2 in which metal plates 5 and 7 are bonded to both surfaces of a ceramic substrate 3, and an electronic component 9 that is bonded to at least one surface of the metal plate 5 and is operable at least 125° C. The electronic component 9 is bonded to the metal plate 5 via a brazing material layer 8 having a higher melting point than a operating temperature of the electronic component 9.Type: ApplicationFiled: March 5, 2007Publication date: March 5, 2009Inventors: Hiromasa Kato, Takayuki Naba, Noritaka Nakayama
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Patent number: 6689498Abstract: An aluminum nitride substrate includes an aluminum nitride sintered body containing a rare earth oxide as a sintering additive component. In the aluminum nitride substrate, a surface thereof is machined so that arithmetic average roughness Ra is 0.5 &mgr;m or less; an aggregate size of the sintering additive component present on the machined surface is 20 &mgr;m or less; and a total aggregate area in a unit area of the machined surface is 5% or less. A metal thin film is deposited on such machined surface with good intimate contact properties, and furthermore deposition accuracy or the like is improved.Type: GrantFiled: December 4, 2001Date of Patent: February 10, 2004Assignee: Kabushiki Kaisha ToshibaInventors: Katsuhiro Shinosawa, Takao Shirai, Noritaka Nakayama
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Publication number: 20020102441Abstract: An aluminum nitride substrate includes an aluminum nitride sintered body containing a rare earth oxide as a sintering additive component. In the aluminum nitride substrate, a surface thereof is machined so that arithmetic average roughness Ra is 0.5 &mgr;m or less; an aggregate size of the sintering additive component present on the machined surface is 20 &mgr;m or less; and a total aggregate area in a unit area of the machined surface is 5% or less. A metal thin film is deposited on such machined surface with good intimate contact properties, and furthermore deposition accuracy or the like is improved.Type: ApplicationFiled: December 4, 2001Publication date: August 1, 2002Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Katsuhiro Shinosawa, Takao Shirai, Noritaka Nakayama
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Patent number: 6426154Abstract: The present invention provides a ceramic circuit board comprising: a ceramic substrate and a metal circuit plate bonded to the ceramic substrate through a brazing material layer; wherein the brazing material layer is composed of Al—Si group brazing material and an amount of Si contained in the brazing material is 7 wt % or less. In addition, it is preferable to form a thinned portion, holes, or grooves to outer peripheral portion of the metal circuit plate. According to the above structure of the present invention, there can be provided a ceramic circuit board having both high bonding strength and high heat-cycle resistance, and capable of increasing an operating reliability as electronic device.Type: GrantFiled: September 25, 2000Date of Patent: July 30, 2002Assignee: Kabushiki Kaisha ToshibaInventors: Takayuki Naba, Hiroshi Komorita, Noritaka Nakayama, Kiyoshi Iyogi
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Patent number: 6124078Abstract: A photo-decoloring dye represented by the following Formula (1), ##STR1## wherein Z.sub.1, Z.sub.2 and Z.sub.3 each represents a carbon atom or a nitrogen atom, R.sub.1, R.sub.2 and R.sub.3 each represents a hydrogen atom and substituents, Z.sub.2 and Z.sub.3 may form a condensed ring, Z represents N or CH, X+ represents an organic cation, m represents an integer of 0 to 4, n represents an integer of 0 to 3.Type: GrantFiled: March 11, 1999Date of Patent: September 26, 2000Assignee: Konica CorporationInventors: Noritaka Nakayama, Satomi Kawasaki
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Patent number: 5985528Abstract: A method to recover the resources incorporated in a photographic material is disclosed. An exposed silver salt light-sensitive photographic material is subjected to color development processing; the obtained image information is optically read; digital image information is obtained by converting the read information to electrical signals, and the resulting image information is recorded on a recording medium, and resources incorporated in a photographic material is recovered from the processed photographic material.Type: GrantFiled: July 2, 1998Date of Patent: November 16, 1999Assignee: Konica CorporationInventors: Tawara Komamura, Shinri Tanaka, Michiko Nagato, Hiroyuki Iizuka, Noritaka Nakayama, Naoshi Kunieda, Hideaki Haraga