Patents by Inventor Noriyoshi Shimizu

Noriyoshi Shimizu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10326304
    Abstract: An operation state determination system includes a receiver, a first memory and a determiner. The determiner is configured to compare, at a prescribed determination time point, a power value stored in the first memory with a reference value to determine whether or not an electric load connected to a branch circuit is in operation, and output a signal in accordance with a determination result. The determiner is further configured to determine that the electric load is in operation at the prescribed determination time point, when a time period during which the power value is equal to or more than the reference value occurs within a comparison time in past before the prescribed determination time point.
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: June 18, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Noriyoshi Shimizu, Takashi Nishiyama
  • Patent number: 10262932
    Abstract: A wiring board includes: a first wiring structure including: a first insulating layer; a first wiring layer; and a via wiring; a protective insulating layer formed on the lower surface of the first insulating layer to cover a side surface of a lower portion of the first wiring layer; and a second wiring structure having an insulating layer and a wiring layer and formed on the upper surface of the first insulating layer. The upper surface of the first insulating layer and the upper end surface of the via wiring are substantially flush with each other. A wiring density of the second wiring structure is higher than a wiring density of the first wiring structure. The reinforcing material is positioned on a side of the second wiring structure with respect to a center of the first insulating layer in the thickness direction of the first insulating layer.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: April 16, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Jun Furuichi, Noriyoshi Shimizu
  • Patent number: 10262946
    Abstract: A wiring substrate includes a first wiring structure and a second wiring structure having a higher wiring density. The second wiring structure includes a wiring layer formed on a first insulation layer of the first wiring structure. The wiring layer includes a first wiring pattern, the upper surface of which includes smooth and rough surfaces. A protective film, formed from a conductive material having a higher migration resistance than the wiring layer, covers only the smooth surface and includes a smooth upper surface. A second insulation layer stacked on the first insulation layer covers the wiring layer and the protective film. The smooth surface is continuous with and downwardly recessed from the smooth surface to expose a peripheral portion of the protective film. The second insulation layer covers upper, lower, and side surfaces of the peripheral portion.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: April 16, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Yusuke Gozu, Yuta Sakaguchi, Norikazu Nakamura, Noriyoshi Shimizu
  • Patent number: 10192815
    Abstract: A wiring board includes: a first insulating layer; a first wiring layer formed on a lower surface of the first insulating layer; a first through hole which penetrates the first insulating layer; a first via wiring including: a filling portion formed to fill the first through hole; and a protruding portion protruding upward from an upper surface of the first insulating layer; a second wiring layer including a land, wherein the land includes an outer circumferential portion and a central portion, a second insulating layer formed on the upper surface of the first insulating layer; a second through hole which penetrates the second insulating layer in the thickness direction; a second via wiring formed to fill the second through hole; and a third wiring layer formed on an upper surface of the second insulating layer.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: January 29, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kosuke Tsukamoto, Noriyoshi Shimizu
  • Patent number: 10074601
    Abstract: A wiring substrate includes a first wiring layer, an insulative resin first insulation layer covering the first wiring layer, and a second wiring layer located on an upper surface of the first insulation layer. A via wiring layer, which extends through the first insulation layer to connect the first and second wiring layers, includes an upper end surface connected to the second wiring layer and flush with the upper surface of the first insulation layer. The second wiring layer has a higher wiring density than the first wiring layer. The first insulation layer includes a first resin layer and a second resin layer located on an upper surface of the first resin layer and having a lower filler content rate than the first resin layer. The upper surface of the first resin layer is a curved surface upwardly curved toward the upper end surface of the via wiring layer.
    Type: Grant
    Filed: June 15, 2017
    Date of Patent: September 11, 2018
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kosuke Tsukamoto, Noriyoshi Shimizu
  • Publication number: 20180223431
    Abstract: Source gases are instantaneously heated, at least two kinds of generated gas molecular species generated by instantaneously heating the source gases are independently introduced and brought into contact with a substrate having a temperature lower than heating temperature of the instantaneously-heating mechanism for source gas to form a first compound film and to form a second compound film containing at least one element of elements contained in the first compound film, and a multilayer film composed of at least the first compound film and the second compound film is produced.
    Type: Application
    Filed: April 10, 2018
    Publication date: August 9, 2018
    Inventors: Yuji FURUMURA, Noriyoshi SHIMIZU, Shinji NISHIHARA, Eri HAIKATA
  • Patent number: 10028393
    Abstract: A wiring substrate includes a core layer, a first wiring layer, a first insulating layer, a first via wiring, a second wiring layer, a second insulating layer, a second via wiring, a third wiring layer, a third insulating layer, a third via wiring, and a through-wiring. The through-wiring includes upper and lower end surfaces. The upper end surface has an area that is smaller than an area of the lower end surface. The upper surface of the first insulating layer is more flat than the lower surface of the third insulating layer. The second wiring layer has a wiring density that is higher than a wiring density of the first wiring layer.
    Type: Grant
    Filed: July 2, 2015
    Date of Patent: July 17, 2018
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Noriyoshi Shimizu, Yusuke Gozu, Akio Rokugawa
  • Publication number: 20180166372
    Abstract: A wiring substrate includes a first wiring structure and a second wiring structure. The first wiring structure includes a first insulating layer, which covers a first wiring layer, and a via wiring. A first through hole of the first insulating layer is filled with the via wiring. The second wiring structure includes a second wiring layer and a second insulating layer. The second wiring layer is formed on an upper surface of the first insulating layer and an upper end surface of the via wiring. The second wiring layer partially includes a roughened surface. The second insulating layer is stacked on the upper surface of the first insulating layer and covers the second wiring layer. The second wiring structure has a higher wiring density than the first wiring structure. The roughened surface of the second wiring layer has a smaller surface roughness than the first wiring layer.
    Type: Application
    Filed: January 10, 2018
    Publication date: June 14, 2018
    Inventors: Noriyoshi SHIMIZU, Yusuke GOZU, Jun FURUICHI, Akio ROKUGAWA, Takashi Ito
  • Patent number: 9997474
    Abstract: A wiring board includes a first insulating layer made of a single layer of non-photosensitive resin including a reinforcing member, a center position of the reinforcing member being positioned on a side toward a first surface with respect to a center of the first insulating layer in a thickness direction; a layered structure of a wiring layer and an insulating layer, stacked on the first surface of the first insulating layer; a through wiring provided to penetrate the first insulating layer, the through wiring and the first insulating layer forming a first concave portion at a second surface of the first insulating layer, in which the second end surface of the through wiring is exposed; and a pad for external connection formed at the second surface of the first insulating layer at a position corresponding to the through wiring and having a second concave portion.
    Type: Grant
    Filed: April 3, 2017
    Date of Patent: June 12, 2018
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Jun Furuichi, Noriyoshi Shimizu
  • Patent number: 9961760
    Abstract: A wiring substrate includes an insulating layer including a projection and a wiring layer on the projection. The wiring layer includes a first metal layer on an end face of the projection and a second metal layer on the first metal layer. The width of the end face of the projection is different from at least one of the width of the first metal layer and the width of the second metal layer. An inner wall surface and a bottom surface of a depression around the projection are roughened surfaces.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: May 1, 2018
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Yusuke Gozu, Yuta Sakaguchi, Noriyoshi Shimizu
  • Patent number: 9915483
    Abstract: A small-sized fluid heating/cooling apparatus for heating or cooling a large amount of gas or liquid at a low cost. Structures where a flow passage for a fluid is formed in a heated or cooled base formed in a plate shape or a column shape, and a fluid which has passed through the narrowed flow passage impinges on a wall of a side face of the base vertically to perform heat exchange are connected in series. Heat exchange is instantaneously performed in a small space and manufacture of a mechanism performing such an operation is easy. A material constituting the flow passage may be a metal or ceramics, and a small-sized fluid heat exchanging apparatus can be manufactured at a low cost.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: March 13, 2018
    Assignee: PHILTECH, INC.
    Inventors: Yuji Furumura, Naomi Mura, Shinji Nishihara, Noriyoshi Shimizu
  • Publication number: 20180061765
    Abstract: A wiring substrate includes a first wiring structure and a second wiring structure having a higher wiring density. The second wiring structure includes a wiring layer formed on a first insulation layer of the first wiring structure. The wiring layer includes a first wiring pattern, the upper surface of which includes smooth and rough surfaces. A protective film, formed from a conductive material having a higher migration resistance than the wiring layer, covers only the smooth surface and includes a smooth upper surface. A second insulation layer stacked on the first insulation layer covers the wiring layer and the protective film. The smooth surface is continuous with and downwardly recessed from the smooth surface to expose a peripheral portion of the protective film. The second insulation layer covers upper, lower, and side surfaces of the peripheral portion.
    Type: Application
    Filed: August 24, 2017
    Publication date: March 1, 2018
    Inventors: YUSUKE GOZU, YUTA SAKAGUCHI, NORIKAZU NAKAMURA, NORIYOSHI SHIMIZU
  • Patent number: 9880600
    Abstract: An estimating apparatus includes an acquiring unit, a history recording unit, and a determining unit. The acquiring unit acquires power amounts for respective measurement times from a measuring apparatus that measures power for each branch line, as a plurality of used power amounts. The history recording unit records the plurality of used power amounts in association with dates and times. The determining unit variably sets a comparison value for comparing magnitudes of the plurality of used power amounts recorded in the history recording unit, obtains a minimum value of the comparison value in a range satisfying a condition that an amount of time for which at least some of the plurality of used power amounts are continuously equal to or below the comparison value exceeds a prescribed sustained time, and estimates the minimum value to be a peak value of stand-by power of the branch line.
    Type: Grant
    Filed: August 29, 2013
    Date of Patent: January 30, 2018
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Noriyoshi Shimizu, Takashi Nishiyama
  • Patent number: 9875957
    Abstract: A wiring substrate includes a first wiring structure and a second wiring structure. The first wiring structure includes a first insulating layer, which covers a first wiring layer, and a via wiring. A first through hole of the first insulating layer is filled with the via wiring. The second wiring structure includes a second wiring layer and a second insulating layer. The second wiring layer is formed on an upper surface of the first insulating layer and an upper end surface of the via wiring. The second wiring layer partially includes a roughened surface. The second insulating layer is stacked on the upper surface of the first insulating layer and covers the second wiring layer. The second wiring structure has a higher wiring density than the first wiring structure. The roughened surface of the second wiring layer has a smaller surface roughness than the first wiring layer.
    Type: Grant
    Filed: July 6, 2015
    Date of Patent: January 23, 2018
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Noriyoshi Shimizu, Yusuke Gozu, Jun Furuichi, Akio Rokugawa, Takashi Ito
  • Patent number: 9859201
    Abstract: A wiring substrate includes a first wiring structure and a second wiring structure stacked thereon. The first wiring structure includes a first insulation layer and a via wiring extending through the first insulation layer. The second wiring structure includes a first wiring layer formed on the first insulation layer and the via wiring, and a first plane layer stacked on the first insulation layer and at least partially grid-shaped in a plan view to define second through holes. A second insulation layer is stacked on the first insulation layer to fill the second through holes and cover the first plane layer and the first wiring layer. The second wiring structure has a higher wiring density than the first wiring structure. The second through holes each include a lower open end and an upper open end having a smaller open width than the lower open end.
    Type: Grant
    Filed: June 4, 2015
    Date of Patent: January 2, 2018
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Noriyoshi Shimizu, Kiyoshi Oi, Yuichiro Shimizu
  • Publication number: 20170372991
    Abstract: A wiring substrate includes a first wiring layer, an insulative resin first insulation layer covering the first wiring layer, and a second wiring layer located on an upper surface of the first insulation layer. A via wiring layer, which extends through the first insulation layer to connect the first and second wiring layers, includes an upper end surface connected to the second wiring layer and flush with the upper surface of the first insulation layer. The second wiring layer has a higher wiring density than the first wiring layer. The first insulation layer includes a first resin layer and a second resin layer located on an upper surface of the first resin layer and having a lower filler content rate than the first resin layer. The upper surface of the first resin layer is a curved surface upwardly curved toward the upper end surface of the via wiring layer.
    Type: Application
    Filed: June 15, 2017
    Publication date: December 28, 2017
    Inventors: KOSUKE TSUKAMOTO, NORIYOSHI SHIMIZU
  • Publication number: 20170359891
    Abstract: A wiring substrate includes an insulating layer including a projection and a wiring layer on the projection. The wiring layer includes a first metal layer on an end face of the projection and a second metal layer on the first metal layer. The width of the end face of the projection is different from at least one of the width of the first metal layer and the width of the second metal layer. An inner wall surface and a bottom surface of a depression around the projection are roughened surfaces.
    Type: Application
    Filed: April 18, 2017
    Publication date: December 14, 2017
    Inventors: Yusuke GOZU, Yuta SAKAGUCHI, Noriyoshi SHIMIZU
  • Publication number: 20170352628
    Abstract: A wiring board includes a first insulating layer made of a single layer of non-photosensitive resin including a reinforcing member, a center position of the reinforcing member being positioned on a side toward a first surface with respect to a center of the first insulating layer in a thickness direction; a layered structure of a wiring layer and an insulating layer, stacked on the first surface of the first insulating layer; a through wiring provided to penetrate the first insulating layer, the through wiring and the first insulating layer forming a first concave portion at a second surface of the first insulating layer, in which the second end surface of the through wiring is exposed; and a pad for external connection formed at the second surface of the first insulating layer at a position corresponding to the through wiring and having a second concave portion.
    Type: Application
    Filed: April 3, 2017
    Publication date: December 7, 2017
    Inventors: Jun FURUICHI, Noriyoshi SHIMIZU
  • Publication number: 20170335454
    Abstract: A film-forming method for forming a film in a film-forming apparatus includes generating first gas molecular species and second gas molecular species by causing the first source gas and the second source gas accumulated in the accumulation mechanisms to pass through respective instantaneously-heating units, sharply raising partial pressure of the first gas molecular species and partial pressure of the second gas molecular species by projectingly supplying the first gas molecular species and the second gas molecular species to the reaction chamber in which the substrate has been placed, which has been depressurized, and which has a constant capacity; bringing the first gas molecular species or the second gas molecular species into reaction by alternately repeatedly guiding the first gas molecular species or the second gas molecular species to a surface of the substrate, and forming a compound film on the surface of the substrate.
    Type: Application
    Filed: May 4, 2017
    Publication date: November 23, 2017
    Inventors: Yuji FURUMURA, Noriyoshi SHIMIZU, Shinji NISHIHARA, Eri HAIKATA, Masato ISHIKAWA
  • Patent number: 9820391
    Abstract: A wiring board includes first insulating layers; first wiring layers; first via wirings; second insulating layers; second wiring layers; second via wirings; and a solder resist layer, wherein the first insulating layers are composed of non-photosensitive resin, wherein the second insulating layers, and the solder resist layer are composed of photosensitive resin, respectively, wherein the first surface of the uppermost first insulating layer and the first end surface of the first via wiring embedded in the uppermost first insulating layer are polished surfaces, wherein the first end surface of the first via wiring embedded in the uppermost first insulating layer is flush with the first surface of the uppermost first insulating layer, and wherein the wiring density of the second wiring layers is higher than the wiring density of the first wiring layers.
    Type: Grant
    Filed: February 4, 2015
    Date of Patent: November 14, 2017
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Noriyoshi Shimizu, Shoji Watanabe, Toshinori Koyama, Akio Rokugawa