Abstract: In the case of erasing a display on an active matrix type liquid crystal display which has a source bus drive circuit (16) and a gate bus drive circuit (17), pixel signals for turning OFF pixels of one row are applied to the source bus drive circuit, and at the same time, a clear signal (CL) is provided to the gate bus drive circuit (17), from which a voltage for turning ON transistors (13) provided in association with the respective pixels is applied to gate buses (15.sub.l through 15.sub.m) all at once. A power holding circuit (22) is provided for holding power of an operating power supply (V.sub.1) for a predetermined period of time after the power supply of the display is turned OFF, and a voltage drop detector (24) is provided for detecting the turning OFF of said power supply, and its detection signal is used to produce the clear signal (CL), which is provided to the gate bus drive circuit (17).