Patents by Inventor Noriyuki Sato

Noriyuki Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10664729
    Abstract: A consumables management system includes: a service providing device side communication unit that performs communication relevant to consumption information of a consumable item with a mobile device present within a communication area set in advance corresponding to a service providing device; a mobile device side communication unit that is mounted in the mobile device and performs communication relevant to the consumption information with the service providing device side communication unit in a case where the mobile device is present within the communication area; and a notification unit that notifies an administrator possessing the mobile device that a remaining amount of the consumable item mounted in the service providing device has been reduced to a predetermined threshold remaining amount or less in a case where it is determined that the remaining amount of the consumable item has been reduced to the threshold remaining amount or less.
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: May 26, 2020
    Assignee: FUJI XEROX CO., LTD.
    Inventors: Mitsuru Sato, Noriyuki Suzumura, Kosuke Kubota, Hosana Kimura
  • Publication number: 20200159347
    Abstract: Provided is a flexible decorative laminate sheet that can be formed into a 3-dimensional formed body at one time, be smaller in weight owing to reduction in the number of members to be used, and be capable of simplifying a manufacturing process, a module for a touch panel, and a touch panel. The flexible decorative laminate sheet includes: a hard coat layer; a decorative layer having visible light transmissivity and electric charge transmissivity; and a conductive layer forming a touch sensor, wherein the hard coat layer, the decorative layer, and the conductive layer are arranged in the stated order, wherein an information display portion configured to display information when the touch sensor is activated is provided, and wherein the flexible decorative laminate sheet is formed into a 3-dimensional formed body through forming.
    Type: Application
    Filed: October 18, 2019
    Publication date: May 21, 2020
    Applicant: Oike & Co., Ltd.
    Inventor: Noriyuki Sato
  • Patent number: 10653730
    Abstract: A method for prophylaxis or treatment of a disease includes administering an an effective amount of an agent that contains cells of Lactobacillus paracasei MCC1849 (NITE BP-01633) to a subject in need of such prophylaxis or treatment. The disease can be one or more of an inflammatory disease, ulcer, food allergies, bronchial asthma, urticaria, pollinosis, anaphylactic shock or an opportunistic infection.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: May 19, 2020
    Assignee: MORINAGA MILK INDUSTRY CO., LTD.
    Inventors: Tomohiro Tanaka, Noriyuki Iwabuchi, Yohei Sato, Kanetada Shimizu, Toshitaka Odamaki
  • Publication number: 20200145763
    Abstract: A base member with wiring and a microphone are provided. In the base member with wiring, an insulation adhesive layer, which is elastically deformable, is provided on one surface of a film, which has flexibility, and a conductor pattern is formed on the insulation adhesive layer. The microphone is mounted on the base member with wiring. A terminal of the microphone is in touch with the conductor pattern in face-to-face manner, and a part, on which the terminal is not formed, of a surface of the microphone and a part, on which the conductor pattern is not formed, of a surface of the insulation adhesive layer are bonded and mechanically coupled with each other.
    Type: Application
    Filed: November 10, 2017
    Publication date: May 7, 2020
    Applicant: JAPAN AVIATION ELECTRONICS INDUSTRY, LIMITED
    Inventors: Shinichiro NAKAJIMA, Ryosuke MITSUI, Junya SATO, Atsushi TANAKA, Noriyuki MISHINA
  • Publication number: 20200111645
    Abstract: A plasma processing method includes executing an etching process that includes supplying an etching gas into a process container in which a target substrate is supported on a second electrode serving as a lower electrode, and applying an RF power for plasma generation and an RF power for ion attraction to turn the etching gas into plasma and to subject the target substrate to etching. The etching process includes applying a negative DC voltage to a first electrode serving as an upper electrode during the etching to increase an absolute value of self-bias on the first electrode. The etching process includes releasing DC electron current generated by the negative DC voltage to ground through plasma and a conductive member disposed as a ring around the first electrode, by using a first state where the conductive member is connected to a ground potential portion.
    Type: Application
    Filed: December 10, 2019
    Publication date: April 9, 2020
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Akira KOSHIISHI, Masaru SUGIMOTO, Kunihiko HINATA, Noriyuki KOBAYASHI, Chishio KOSHIMIZU, Ryuji OHTANI, Kazuo KIBI, Masashi SAITO, Naoki MATSUMOTO, Yoshinobu OHYA, Manabu IWATA, Daisuke YANO, Yohei YAMAZAWA, Hidetoshi HANAOKA, Toshihiro HAYAMI, Hiroki YAMAZAKI, Manabu SATO
  • Publication number: 20200105324
    Abstract: A magnetic tunnel junction (MTJ) for use in a magnetic spin orbit torque random access memory device (SOT MRAM) is described. Magnetic tunnel junctions described herein include a multi-magnet free layer over a spin orbit torque electrode. The multi-magnet free layer includes at least three sub-layers: a first magnetic sub-layer in direct contact with the SOT electrode having a first magnetic stability, a second magnetic sub-layer having a second magnetic stability greater than the first magnetic stability, and a magnetic coupling layer between the first and second sub-layers.
    Type: Application
    Filed: September 27, 2018
    Publication date: April 2, 2020
    Applicant: INTEL CORPORATION
    Inventors: Angeline Smith, Sasikanth Manipatruni, MD Tofizur Rahman, Noriyuki Sato, Tanay Gasovi, Christopher Wiegand, Ian Young
  • Publication number: 20200105998
    Abstract: A perpendicular spin orbit torque (SOT) memory device includes an electrode having a spin orbit coupling material and a perpendicular magnetic tunnel junction (pMTJ) device on a portion of the electrode. The pMTJ device includes a free magnet, a fixed magnet and a tunnel barrier layer in between, where at least one of the fixed magnet or the free magnet includes two magnetic layers and a spacer layer comprising tungsten in between.
    Type: Application
    Filed: September 27, 2018
    Publication date: April 2, 2020
    Applicant: Intel Corporation
    Inventors: Angeline SMITH, Sasikanth MANIPATRUNI, Christopher WIEGAND, Tofizur RAHMAN, Noriyuki SATO, Benjamin BUFORD
  • Publication number: 20200098824
    Abstract: Embodiments herein describe techniques for a semiconductor device including a RRAM memory cell. The RRAM memory cell includes a substrate, a RRAM storage cell above the substrate, and a diode adjacent to the RRAM storage cell. The RRAM storage cell includes a first electrode located in a first metal layer above the substrate, a resistive switching material layer adjacent to the first electrode, and a second electrode adjacent to the resistive switching material layer. The second electrode is shared between the RRAM storage cell and the diode. The diode includes the second electrode shared with the RRAM storage cell, a semiconductor layer adjacent to the second electrode, and a third electrode located in a second metal layer above the substrate. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: September 26, 2018
    Publication date: March 26, 2020
    Inventors: Abhishek SHARMA, Gregory K. CHEN, Ram KRISHNAMURTHY, Ravi PILLARISETTY, Sasikanth MANIPATRUNI, Amrita MATHURIYA, Raghavan KUMAR, Phil KNAG, Huseyin SUMBUL, Urusa ALAAN, Noriyuki SATO
  • Publication number: 20200072299
    Abstract: A hydraulic circuit includes a first shift valve and a second shift valve that are provided in series between a source oil path through which oil whose pressure has been regulated flows and a first clutch oil path and a second clutch oil path. The first shift valve is selectively switchable between a first switching state where a first communicating oil path and the first clutch oil path are communicated and a second switching state where a second communicating oil path and the second clutch oil path are communicated, and the second shift valve is selectively switchable between a third switching state where the source oil path and the first communicating oil path are communicated and a fourth switching state where the source oil path and the second communicating oil path are communicated.
    Type: Application
    Filed: August 29, 2019
    Publication date: March 5, 2020
    Applicant: HONDA MOTOR CO., LTD.
    Inventors: Hisashi Ishikawa, Yuji Okazaki, Shigeji Nakano, Hideaki Iwashita, Yuya Shimota, Noriyuki Yagi, Yoshihiro Sato
  • Patent number: 10578989
    Abstract: An electrostatic charge image developer includes: a toner that includes toner particles which contain a polyester resin and a styrene (meth)acrylic resin and form a sea-island structure which includes a sea portion containing the polyester resin and an island portion containing the styrene (meth)acrylic resin on a surface of the toner particle, and has an exposure rate of the styrene (meth)acrylic resin in a range of from about 5 atom % to about 20 atom %; and an external additive, and a carrier whose fluidity and bulk density under environment of a temperature of 25° C. and a humidity of 50% satisfy Expression: 65.0?fluidity×bulk density?72.5.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: March 3, 2020
    Assignee: FUJI XEROX CO., LTD.
    Inventors: Kotaro Yoshihara, Daisuke Ishizuka, Narumasa Sato, Yuka Kawamoto, Erina Saito, Takahisa Tatekawa, Noriyuki Mizutani
  • Patent number: 10546727
    Abstract: A plasma etching apparatus includes an upper electrode and a lower electrode, between which plasma of a process gas is generated to perform plasma etching on a wafer W. The apparatus further comprises a cooling ring disposed around the wafer, a correction ring disposed around the cooling ring, and a variable DC power supply directly connected to the correction ring, the DC voltage being preset to provide the correction ring with a negative bias, relative to ground potential, for attracting ions in the plasma and to increase temperature of the correction ring to compensate for a decrease in temperature of a space near the edge of the target substrate due to the cooling ring.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: January 28, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Akira Koshiishi, Masaru Sugimoto, Kunihiko Hinata, Noriyuki Kobayashi, Chishio Koshimizu, Ryuji Ohtani, Kazuo Kibi, Masashi Saito, Naoki Matsumoto, Yoshinobu Ohya, Manabu Iwata, Daisuke Yano, Yohei Yamazawa, Hidetoshi Hanaoka, Toshihiro Hayami, Hiroki Yamazaki, Manabu Sato
  • Patent number: 10540412
    Abstract: In an information processing system in which a plurality of terminals can communicate data through a server, a first terminal includes a question event processing portion which executes a question event to have a character displayed to a user who operates the first terminal and to output question information in association with the character, an answer acceptance portion which accepts input of answer information to the question information, and an answer transmission portion which transmits the answer information accepted by the answer acceptance portion to the server. A second terminal includes an answer reception portion which receives the answer information from the server and an answer event processing portion which executes an answer event to have a character displayed to a user who operates the second terminal based on the answer information received by the answer reception portion and to output the answer information in association with the character.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: January 21, 2020
    Assignee: Nintendo Co., Ltd.
    Inventors: Ryutaro Takahashi, Yoshio Sakamoto, Noriyuki Sato, Hayuru Soma, Ginga Kamei, Ryoma Aoki, Masayuki Okada
  • Patent number: 10529539
    Abstract: An apparatus includes an upper electrode and a lower electrode for supporting a wafer disposed opposite each other within a process chamber. A first RF power supply configured to apply a first RF power having a relatively higher frequency, and a second RF power supply configured to apply a second RF power having a relatively lower frequency is connected to the lower electrode. A variable DC power supply is connected to the upper electrode. A process gas is supplied into the process chamber to generate plasma of the process gas so as to perform plasma etching.
    Type: Grant
    Filed: October 11, 2016
    Date of Patent: January 7, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Akira Koshiishi, Masaru Sugimoto, Kunihiko Hinata, Noriyuki Kobayashi, Chishio Koshimizu, Ryuji Ohtani, Kazuo Kibi, Masashi Saito, Naoki Matsumoto, Manabu Iwata, Daisuke Yano, Yohei Yamazawa, Hidetoshi Hanaoka, Toshihiro Hayami, Hiroki Yamazaki, Manabu Sato
  • Publication number: 20200006626
    Abstract: An insertion layer for perpendicular spin orbit torque (SOT) memory devices between the SOT electrode and the free magnetic layer, memory devices and computing platforms employing such insertion layers, and methods for forming them are discussed. The insertion layer is predominantly tungsten and improves thermal stability and perpendicular magnetic anisotropy in the free magnetic layer.
    Type: Application
    Filed: June 28, 2018
    Publication date: January 2, 2020
    Applicant: Intel Corporation
    Inventors: Angeline Smith, Ian Young, Kaan Oguz, Sasikanth Manipatruni, Christopher Wiegand, Kevin O'Brien, Tofizur Rahman, Noriyuki Sato, Benjamin Buford, Tanay Gosavi
  • Publication number: 20200006630
    Abstract: A spin orbit torque (SOT) memory device includes a SOT electrode having a spin orbit coupling material. The SOT electrode has a first sidewall and a second sidewall opposite to the first sidewall. The SOT memory device further includes a magnetic tunnel junction device on a portion of the SOT electrode. A first MTJ sidewall intersects the first SOT sidewall and a portion of the first MTJ sidewall and the SOT sidewall has a continuous first slope. The MTJ device has a second sidewall that does not extend beyond the second SOT sidewall and at least a portion of the second MTJ sidewall has a second slope.
    Type: Application
    Filed: June 29, 2018
    Publication date: January 2, 2020
    Applicant: Intel Corporation
    Inventors: Noriyuki Sato, Tanay Gosavi, Gary Allen, Sasikanth Manipatruni, Kaan Oguz, Kevin O'Brien, Christopher Wiegand, Angeline Smith, Tofizur Rahman, Ian Young, Ben Buford
  • Publication number: 20200006636
    Abstract: Embodiments herein relate to magnetically doping a spin orbit torque electrode (SOT) in a magnetic random access memory apparatus. In particular, the apparatus may include a free layer of a magnetic tunnel junction (MTJ) coupled to a SOT electrode that is magnetically doped to apply an effective magnetic field on the free layer, where the free layer has a magnetic polarization in a first direction and where current flowing through the magnetically doped SOT electrode is to cause the magnetic polarization of the free layer to change to a second direction that is substantially opposite to the first direction.
    Type: Application
    Filed: June 29, 2018
    Publication date: January 2, 2020
    Inventors: Tanay GOSAVI, Sasikanth MANIPATRUNI, Chia-Ching LIN, Gary ALLEN, Kaan OGUZ, Kevin O?BRIEN, Noriyuki SATO, Ian YOUNG, Dmitri NIKONOV
  • Publication number: 20200006427
    Abstract: An integrated circuit structure includes a first material block comprising a first block insulator layer and a first multilayer stack on the first block insulator layer, the first multilayer stack comprising interleaved pillar electrodes and insulator layers. A second material block is stacked on the first material block and comprises a second block insulator layer, and a second multilayer stack on the second block insulator layer, the second multilayer stack comprising interleaved pillar electrodes and insulator layers. At least one pillar extends through the first material block and the second material block, wherein the at least one pillar has a top width at a top of the first and second material blocks that is greater than a bottom width at a bottom of the first and second material blocks.
    Type: Application
    Filed: June 29, 2018
    Publication date: January 2, 2020
    Inventors: Noriyuki SATO, Kevin O'BRIEN, Eungnak HAN, Manish CHANDHOK, Gurpreet SINGH, Nafees KABIR, Kevin LIN, Rami HOURANI, Abhishek SHARMA, Hui Jae YOO
  • Publication number: 20200006631
    Abstract: A perpendicular spin orbit torque (SOT) memory device includes an electrode having a spin orbit coupling material and a magnetic tunnel junction (MTJ) device on a portion of the electrode. The electrode has a first SOC layer and a second SOC layer on a portion of the first SOC layer, where at least a portion of the first SOC layer at an interface with the second SOC layer includes oxygen.
    Type: Application
    Filed: June 29, 2018
    Publication date: January 2, 2020
    Applicant: Intel Corporation
    Inventors: Noriyuki Sato, Tanay Gosavi, Justin Brockman, Sasikanth Manipatruni, Kaan Oguz, Kevin O'Brien, Christopher Wiegand, Angeline Smith, Tofizur Rahman, Ian Young
  • Publication number: 20200006637
    Abstract: Embodiments herein relate to a system, apparatus, and/or process for producing a spin orbit torque (SOT) electrode that includes a first layer with a first side to couple with a free layer of a magnetic tunnel junction (MTJ) and a second layer coupled with a second side of the first layer opposite the first side, where a value of an electrical resistance in the first SOT layer is lower than a value of an electrical resistance in the second SOT layer and where a current applied to the SOT electrode is to cause current to preferentially flow in the first SOT layer to cause a magnetic polarization of the free layer to change directions. During production of the SOT electrode, the second layer may act as an etch stop.
    Type: Application
    Filed: June 29, 2018
    Publication date: January 2, 2020
    Inventors: Tanay GOSAVI, Sasikanth MANIPATRUNI, Chia-Ching LIN, Kaan OGUZ, Christopher WIEGAND, Angeline SMITH, Noriyuki SATO, Kevin O'BRIEN, Benjamin BUFORD, Ian YOUNG, MD Tofizur RAHMAN
  • Publication number: 20200005861
    Abstract: A MTJ device includes a free (storage) magnet and fixed (reference) magnet between first and second electrodes, and a programmable booster between the free magnet and one of the electrodes. The booster comprises a magnetic material layer. The booster may further comprise an interface layer that supports the formation of a skyrmion spin texture, or a stable ferromagnetic domain, within the magnetic material layer. A programming current between two circuit nodes may be employed to set a position of the skyrmion or magnetic domain within the magnetic material layer to be more proximal to, or more distal from, the free magnet. The position of the skyrmion or magnetic domain to the MTJ may modulate TMR ratio of the MTJ device. The TMR ratio modulation may be employed to discern more than two states of the MTJ device. Such a multi-level device may, for example, be employed to store 2 bits/cell.
    Type: Application
    Filed: June 28, 2018
    Publication date: January 2, 2020
    Inventors: Kevin O'Brien, Brian Doyle, Kaan Oguz, Noriyuki Sato, Charles Kuo, Mark Doczy