Patents by Inventor OhHan Kim
OhHan Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11932933Abstract: A semiconductor manufacturing device has a cooling pad with a plurality of movable pins. The cooling pad includes a fluid pathway and a plurality of springs disposed in the fluid pathway. Each of the plurality of springs is disposed under a respective movable pin. A substrate includes an electrical component disposed over a surface of the substrate. The substrate is disposed over the cooling pad with the electrical component oriented toward the cooling pad. A force is applied to the substrate to compress the springs. At least one of the movable pins contacts the substrate. A cooling fluid is disposed through the fluid pathway.Type: GrantFiled: July 25, 2022Date of Patent: March 19, 2024Assignee: STATS ChipPAC Pte. Ltd.Inventors: OhHan Kim, HunTeak Lee, Sell Jung, HeeSoo Lee
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Patent number: 11842991Abstract: A semiconductor device has a first substrate and a second substrate. An opening is formed through the second substrate. A first semiconductor component and second semiconductor component are disposed between the first substrate and second substrate. The second substrate is electrically coupled to the first substrate through the first semiconductor component. A first terminal of the first semiconductor component is electrically coupled to the first substrate. A second terminal of the first semiconductor component is electrically coupled to the second substrate. The second semiconductor component extends into the opening. An encapsulant is deposited over the first substrate and second substrate.Type: GrantFiled: August 11, 2020Date of Patent: December 12, 2023Assignee: STATS ChipPAC Pte. Ltd.Inventors: DeokKyung Yang, OhHan Kim, HeeSoo Lee, HunTeak Lee, InSang Yoon, Il Kwon Shim
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Publication number: 20220364222Abstract: A semiconductor manufacturing device has a cooling pad with a plurality of movable pins. The cooling pad includes a fluid pathway and a plurality of springs disposed in the fluid pathway. Each of the plurality of springs is disposed under a respective movable pin. A substrate includes an electrical component disposed over a surface of the substrate. The substrate is disposed over the cooling pad with the electrical component oriented toward the cooling pad. A force is applied to the substrate to compress the springs. At least one of the movable pins contacts the substrate. A cooling fluid is disposed through the fluid pathway.Type: ApplicationFiled: July 25, 2022Publication date: November 17, 2022Applicant: STATS ChipPAC Pte. Ltd.Inventors: OhHan Kim, HunTeak Lee, SeIl Jung, HeeSoo Lee
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Patent number: 11434561Abstract: A semiconductor manufacturing device has a cooling pad with a plurality of movable pins. The cooling pad includes a fluid pathway and a plurality of springs disposed in the fluid pathway. Each of the plurality of springs is disposed under a respective movable pin. A substrate includes an electrical component disposed over a surface of the substrate. The substrate is disposed over the cooling pad with the electrical component oriented toward the cooling pad. A force is applied to the substrate to compress the springs. At least one of the movable pins contacts the substrate. A cooling fluid is disposed through the fluid pathway.Type: GrantFiled: September 25, 2020Date of Patent: September 6, 2022Assignee: STATS ChipPAC Pte. Ltd.Inventors: OhHan Kim, HunTeak Lee, Sell Jung, HeeSoo Lee
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Patent number: 11367690Abstract: A semiconductor device has a substrate with a first opening and second opening formed in the substrate. A first semiconductor component is disposed on the substrate. The substrate is disposed on a carrier. A second semiconductor component is disposed on the carrier in the first opening of the substrate. A third semiconductor component is disposed in the second opening. The third semiconductor component is a semiconductor package in some embodiments. A first shielding layer may be formed over the semiconductor package. An encapsulant is deposited over the substrate, first semiconductor component, and second semiconductor component. A shielding layer may be formed over the encapsulant.Type: GrantFiled: May 21, 2020Date of Patent: June 21, 2022Assignee: STATS ChipPAC Pte. Ltd.Inventors: DeokKyung Yang, Woonjae Beak, YiSu Park, OhHan Kim, HunTeak Lee, HeeSoo Lee
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Patent number: 11342294Abstract: A semiconductor device has a first substrate and a semiconductor die disposed over the first substrate. A second substrate has a multi-layered conductive post. The conductive post has a first conductive layer and a second conductive layer formed over the first conductive layer. The first conductive layer is wider than the second conductive layer. A portion of the conductive post can be embedded within the second substrate. The second substrate is disposed over the first substrate adjacent to the semiconductor die. An encapsulant is deposited around the second substrate and semiconductor die. An opening is formed in the second substrate aligned with the conductive post. An interconnect structure is formed in the opening to contact the conductive post. A discrete electrical component is disposed over a surface of the first substrate opposite the semiconductor die. A shielding layer is formed over the discrete electrical component.Type: GrantFiled: March 17, 2020Date of Patent: May 24, 2022Assignee: STATS ChipPAC Pte. Ltd.Inventors: DeokKyung Yang, HunTeak Lee, OhHan Kim, HeeSoo Lee, DaeHyeok Ha, Wanil Lee
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Patent number: 11309193Abstract: A semiconductor device has a semiconductor die or component, including an IPD, disposed over an attach area of a penetrable film layer with a portion of the semiconductor die or component embedded in the penetrable film layer. A conductive layer is formed over a portion of the film layer within the attach area and over a portion of the film layer outside the attach area. An encapsulant is deposited over the film layer, conductive layer, and semiconductor die or component. The conductive layer extends outside the encapsulant. An insulating material can be disposed under the semiconductor die or component. A shielding layer is formed over the encapsulant. The shielding layer is electrically connected to the conductive layer. The penetrable film layer is removed. The semiconductor die or component disposed over the film layer and covered by the encapsulant and shielding layer form an SIP module without a substrate.Type: GrantFiled: September 2, 2020Date of Patent: April 19, 2022Assignee: STATS ChipPAC Pte. Ltd.Inventors: OhHan Kim, KyungHwan Kim, WoonJae Beak, HunTeak Lee, InSang Yoon
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Publication number: 20210301390Abstract: A semiconductor manufacturing device has a cooling pad with a plurality of movable pins. The cooling pad includes a fluid pathway and a plurality of springs disposed in the fluid pathway. Each of the plurality of springs is disposed under a respective movable pin. A substrate includes an electrical component disposed over a surface of the substrate. The substrate is disposed over the cooling pad with the electrical component oriented toward the cooling pad. A force is applied to the substrate to compress the springs. At least one of the movable pins contacts the substrate. A cooling fluid is disposed through the fluid pathway.Type: ApplicationFiled: September 25, 2020Publication date: September 30, 2021Applicant: STATS ChipPAC Pte. Ltd.Inventors: OhHan Kim, HunTeak Lee, SeIl Jung, HeeSoo Lee
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Publication number: 20200402817Abstract: A semiconductor device has a semiconductor die or component, including an IPD, disposed over an attach area of a penetrable film layer with a portion of the semiconductor die or component embedded in the penetrable film layer. A conductive layer is formed over a portion of the film layer within the attach area and over a portion of the film layer outside the attach area. An encapsulant is deposited over the film layer, conductive layer, and semiconductor die or component. The conductive layer extends outside the encapsulant. An insulating material can be disposed under the semiconductor die or component. A shielding layer is formed over the encapsulant. The shielding layer is electrically connected to the conductive layer. The penetrable film layer is removed. The semiconductor die or component disposed over the film layer and covered by the encapsulant and shielding layer form an SIP module without a substrate.Type: ApplicationFiled: September 2, 2020Publication date: December 24, 2020Applicant: STATS ChipPAC Pte. Ltd.Inventors: OhHan Kim, KyungHwan Kim, WoonJae Beak, HunTeak Lee, InSang Yoon
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Publication number: 20200373289Abstract: A semiconductor device has a first substrate and a second substrate. An opening is formed through the second substrate. A first semiconductor component and second semiconductor component are disposed between the first substrate and second substrate. The second substrate is electrically coupled to the first substrate through the first semiconductor component. A first terminal of the first semiconductor component is electrically coupled to the first substrate. A second terminal of the first semiconductor component is electrically coupled to the second substrate. The second semiconductor component extends into the opening. An encapsulant is deposited over the first substrate and second substrate.Type: ApplicationFiled: August 11, 2020Publication date: November 26, 2020Applicant: STATS ChipPAC Pte. Ltd.Inventors: DeokKyung Yang, OhHan Kim, HeeSoo Lee, HunTeak Lee, InSang Yoon, Il Kwon Shim
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Patent number: 10804119Abstract: A semiconductor device has a semiconductor die or component, including an IPD, disposed over an attach area of a penetrable film layer with a portion of the semiconductor die or component embedded in the penetrable film layer. A conductive layer is formed over a portion of the film layer within the attach area and over a portion of the film layer outside the attach area. An encapsulant is deposited over the film layer, conductive layer, and semiconductor die or component. The conductive layer extends outside the encapsulant. An insulating material can be disposed under the semiconductor die or component. A shielding layer is formed over the encapsulant. The shielding layer is electrically connected to the conductive layer. The penetrable film layer is removed. The semiconductor die or component disposed over the film layer and covered by the encapsulant and shielding layer form an SIP module without a substrate.Type: GrantFiled: March 15, 2017Date of Patent: October 13, 2020Assignee: STATS ChipPAC Pte. Ltd.Inventors: OhHan Kim, KyungHwan Kim, WoonJae Beak, HunTeak Lee, InSang Yoon
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Patent number: 10797039Abstract: A semiconductor device has a first substrate and a second substrate. An opening is formed through the second substrate. A first semiconductor component and second semiconductor component are disposed between the first substrate and second substrate. The second substrate is electrically coupled to the first substrate through the first semiconductor component. A first terminal of the first semiconductor component is electrically coupled to the first substrate. A second terminal of the first semiconductor component is electrically coupled to the second substrate. The second semiconductor component extends into the opening. An encapsulant is deposited over the first substrate and second substrate.Type: GrantFiled: May 10, 2018Date of Patent: October 6, 2020Assignee: STATS ChipPAC Pte. Ltd.Inventors: DeokKyung Yang, OhHan Kim, HeeSoo Lee, HunTeak Lee, InSang Yoon, Il Kwon Shim
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Publication number: 20200286835Abstract: A semiconductor device has a substrate with a first opening and second opening formed in the substrate. A first semiconductor component is disposed on the substrate. The substrate is disposed on a carrier. A second semiconductor component is disposed on the carrier in the first opening of the substrate. A third semiconductor component is disposed in the second opening. The third semiconductor component is a semiconductor package in some embodiments. A first shielding layer may be formed over the semiconductor package. An encapsulant is deposited over the substrate, first semiconductor component, and second semiconductor component. A shielding layer may be formed over the encapsulant.Type: ApplicationFiled: May 21, 2020Publication date: September 10, 2020Applicant: STATS ChipPAC Pte. Ltd.Inventors: DeokKyung Yang, Woonjae Beak, YiSu Park, OhHan Kim, HunTeak Lee, HeeSoo Lee
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Publication number: 20200219835Abstract: A semiconductor device has a first substrate and a semiconductor die disposed over the first substrate. A second substrate has a multi-layered conductive post. The conductive post has a first conductive layer and a second conductive layer formed over the first conductive layer. The first conductive layer is wider than the second conductive layer. A portion of the conductive post can be embedded within the second substrate. The second substrate is disposed over the first substrate adjacent to the semiconductor die. An encapsulant is deposited around the second substrate and semiconductor die. An opening is formed in the second substrate aligned with the conductive post. An interconnect structure is formed in the opening to contact the conductive post. A discrete electrical component is disposed over a surface of the first substrate opposite the semiconductor die. A shielding layer is formed over the discrete electrical component.Type: ApplicationFiled: March 17, 2020Publication date: July 9, 2020Applicant: STATS ChipPAC Pte. Ltd.Inventors: DeokKyung Yang, HunTeak Lee, OhHan Kim, HeeSoo Lee, DaeHyeok Ha, Wanil Lee
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Patent number: 10700011Abstract: A semiconductor device has a substrate with a first opening and second opening formed in the substrate. A first semiconductor component is disposed on the substrate. The substrate is disposed on a carrier. A second semiconductor component is disposed on the carrier in the first opening of the substrate. A third semiconductor component is disposed in the second opening. The third semiconductor component is a semiconductor package in some embodiments. A first shielding layer may be formed over the semiconductor package. An encapsulant is deposited over the substrate, first semiconductor component, and second semiconductor component. A shielding layer may be formed over the encapsulant.Type: GrantFiled: November 9, 2017Date of Patent: June 30, 2020Assignee: STATS ChipPAC Pte. Ltd.Inventors: DeokKyung Yang, Woonjae Beak, YiSu Park, OhHan Kim, HunTeak Lee, HeeSoo Lee
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Patent number: 10636756Abstract: A semiconductor device has a first substrate and a semiconductor die disposed over the first substrate. A second substrate has a multi-layered conductive post. The conductive post has a first conductive layer and a second conductive layer formed over the first conductive layer. The first conductive layer is wider than the second conductive layer. A portion of the conductive post can be embedded within the second substrate. The second substrate is disposed over the first substrate adjacent to the semiconductor die. An encapsulant is deposited around the second substrate and semiconductor die. An opening is formed in the second substrate aligned with the conductive post. An interconnect structure is formed in the opening to contact the conductive post. A discrete electrical component is disposed over a surface of the first substrate opposite the semiconductor die. A shielding layer is formed over the discrete electrical component.Type: GrantFiled: July 5, 2018Date of Patent: April 28, 2020Assignee: STATS ChipPAC Pte. Ltd.Inventors: DeokKyung Yang, HunTeak Lee, OhHan Kim, HeeSoo Lee, DaeHyeok Ha, Wanil Lee
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Patent number: 10629565Abstract: A semiconductor device has a carrier with an adhesive layer formed over the carrier. Alignment marks are provided for picking and placing the electrical component on the carrier or adhesive layer. An electrical component is disposed on the adhesive layer by pressing terminals of the electrical component into the adhesive layer. The electrical component can be a semiconductor die, discrete component, electronic module, and semiconductor package. A leadframe is disposed over the adhesive layer. A shielding layer is formed over the electrical component. An encapsulant is deposited over the electrical component. The carrier and adhesive layer are removed so that the terminals of the electrical component extend out from the encapsulant for electrical interconnect. A substrate includes a plurality of conductive traces. The semiconductor device is disposed on the substrate with the terminals of the electrical component in contact with the conductive traces.Type: GrantFiled: August 5, 2019Date of Patent: April 21, 2020Assignee: STATS ChipPAC Pte. Ltd.Inventors: JinHee Jung, OhHan Kim, InSang Yoon
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Publication number: 20200013738Abstract: A semiconductor device has a first substrate and a semiconductor die disposed over the first substrate. A second substrate has a multi-layered conductive post. The conductive post has a first conductive layer and a second conductive layer formed over the first conductive layer. The first conductive layer is wider than the second conductive layer. A portion of the conductive post can be embedded within the second substrate. The second substrate is disposed over the first substrate adjacent to the semiconductor die. An encapsulant is deposited around the second substrate and semiconductor die. An opening is formed in the second substrate aligned with the conductive post. An interconnect structure is formed in the opening to contact the conductive post. A discrete electrical component is disposed over a surface of the first substrate opposite the semiconductor die. A shielding layer is formed over the discrete electrical component.Type: ApplicationFiled: July 5, 2018Publication date: January 9, 2020Applicant: STATS ChipPAC Pte. Ltd.Inventors: DeokKyung Yang, HunTeak Lee, OhHan Kim, HeeSoo Lee, DaeHyeok Ha, Wanil Lee
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Publication number: 20190355695Abstract: A semiconductor device has a carrier with an adhesive layer formed over the carrier. Alignment marks are provided for picking and placing the electrical component on the carrier or adhesive layer. An electrical component is disposed on the adhesive layer by pressing terminals of the electrical component into the adhesive layer. The electrical component can be a semiconductor die, discrete component, electronic module, and semiconductor package. A leadframe is disposed over the adhesive layer. A shielding layer is formed over the electrical component. An encapsulant is deposited over the electrical component. The carrier and adhesive layer are removed so that the terminals of the electrical component extend out from the encapsulant for electrical interconnect. A substrate includes a plurality of conductive traces. The semiconductor device is disposed on the substrate with the terminals of the electrical component in contact with the conductive traces.Type: ApplicationFiled: August 5, 2019Publication date: November 21, 2019Applicant: STATS ChipPAC Pte. Ltd.Inventors: JinHee Jung, OhHan Kim, InSang Yoon
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Patent number: 10418341Abstract: A semiconductor device has a carrier with an adhesive layer formed over the carrier. Alignment marks are provided for picking and placing the electrical component on the carrier or adhesive layer. An electrical component is disposed on the adhesive layer by pressing terminals of the electrical component into the adhesive layer. The electrical component can be a semiconductor die, discrete component, electronic module, and semiconductor package. A leadframe is disposed over the adhesive layer. A shielding layer is formed over the electrical component. An encapsulant is deposited over the electrical component. The carrier and adhesive layer are removed so that the terminals of the electrical component extend out from the encapsulant for electrical interconnect. A substrate includes a plurality of conductive traces. The semiconductor device is disposed on the substrate with the terminals of the electrical component in contact with the conductive traces.Type: GrantFiled: August 25, 2017Date of Patent: September 17, 2019Assignee: STATS ChipPAC Pte. Ltd.Inventors: JinHee Jung, OhHan Kim, InSang Yoon