Patents by Inventor Or Weis

Or Weis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240178170
    Abstract: Conductive buffer layers for semiconductor die assemblies, and associated systems and methods are disclosed. In an embodiment, a semiconductor die assembly includes first and second semiconductor dies directly bonded to each other. The first semiconductor die includes a first copper pad and the second semiconductor die includes a second copper pad. The first and second copper pads form an interconnect between the first and second semiconductor dies, and the interconnect includes a conductive buffer material between the first and second copper pads, where the conductive buffer material includes aggregates of conductive particles. In some embodiments, the first and second copper pads are not conjoined but electrically connected to each other through the conductive buffer material. In some embodiments, the conductive buffer material is porous such that the aggregates of conductive particles can be compressed together in response to the pressure applied to the conductive buffer layer.
    Type: Application
    Filed: December 29, 2023
    Publication date: May 30, 2024
    Inventor: Wei Zhou
  • Publication number: 20240178768
    Abstract: A control method for a semi-centralized open winding multi-motor drive system includes: first, measuring current, voltage and position signal, computing system thrust by a velocity loop; then, distributing the thrust to each motor, converting the thrust into q axis current, computing dq axis voltages required for each motor by a current loop, and transforming the voltage demand to abc coordinate system through coordinate transformation; subsequently, modulating the voltage of each motor into a duty ratio instruction to judge whether the motor is in an over-modulated operating area, and performing over-modulation processing on the voltage in the over-modulated area; and finally, distributing the duty ratio instructions to independent and shared inverters. The control method of the present disclosure can reduce the hardware cost and improve the safety and reliability of the system.
    Type: Application
    Filed: April 12, 2023
    Publication date: May 30, 2024
    Inventors: Wei WANG, Weijie TIAN, Ming CHENG
  • Publication number: 20240173814
    Abstract: The present invention discloses a base for placing grinders that comprises an upper shell and a lower shell, wherein the upper and lower shells are detachably connected, one or more recesses are provided on one side of the upper shell to place the shell of the grinder, and one or more accommodating compartments are provided on the lower shell to place the bottom of the grinder. A detachable connection between the upper and lower shells enables the lower shell to be dismantled for cleaning after the grinder has been used for a long time.
    Type: Application
    Filed: July 20, 2023
    Publication date: May 30, 2024
    Inventors: Xiaoxian Song, Wei Zhu, Haifeng Luo
  • Publication number: 20240175146
    Abstract: An electrolysis system is provided in some embodiments of the present disclosure, including an anode reaction chamber, a cathode reaction chamber and a spacer. The anode reaction chamber includes an anode reaction solution and an anode immersed in the anode reaction solution, in which the anode reaction solution includes an iodide ion, and a material of the anode includes a carbon material. The cathode reaction chamber includes a cathode reaction solution and a cathode immersed in the cathode reaction solution, in which the cathode reaction solution includes a hydrogen ion. The spacer separates the anode reaction chamber and the cathode reaction chamber, in which the spacer allows a cation or an anion to pass through, so that the anode reaction chamber and the cathode reaction chamber are electrically connected to each other.
    Type: Application
    Filed: November 23, 2023
    Publication date: May 30, 2024
    Inventors: Bing-Joe HWANG, Di-Yan WANG, Wei-Nien SU, Meng-Che TSAI, Shih-Mao PENG, Sheng-Chiang YANG
  • Publication number: 20240178139
    Abstract: Apparatus and methods for generating a physical layout for a high density routing circuit are disclosed. An exemplary semiconductor structure includes: a gate structure; a plurality of first metal lines formed in a first dielectric layer below the gate structure; at least one first via formed in a second dielectric layer between the gate structure and the first dielectric layer; a plurality of second metal lines formed in a third dielectric layer over the gate structure; and at least one second via formed in a fourth dielectric layer between the gate structure and the third dielectric layer. Each of the at least one first via is electrically connected to the gate structure and a corresponding one of the plurality of first metal lines. Each of the at least one second via is electrically connected to the gate structure and a corresponding one of the plurality of second metal lines.
    Type: Application
    Filed: February 8, 2024
    Publication date: May 30, 2024
    Inventors: Wei-An LAI, Shih-Wei PENG, Wei-Cheng LIN, Jiann-Tyng TZENG
  • Publication number: 20240173924
    Abstract: Systems and methods for error reduction in three-dimensional (3D) printing are provided and can include automatically adjusting printing parameters (for example, printing speed, acceleration, extrusion rate, and/or any other parameters) in the “G-codes” for a 3D printer (for example, fused deposition modeling) to compensate for printing errors that may occur when printing is performed at a high speed. An algorithm can be used to increase printing speed while mitigating reductions in printing quality.
    Type: Application
    Filed: November 20, 2023
    Publication date: May 30, 2024
    Inventors: Hui Wang, An-Tsun Wei
  • Publication number: 20240178224
    Abstract: A method for forming a FinFET device structure is provided. The FinFET device structure includes a first fin structure extending above a substrate, and a first liner layer formed on a first sidewall surface of the first fin structure. The FinFET device structure includes a gate dielectric layer formed over the first fin structure and the first liner layer, wherein a sidewall surface of the gate dielectric layer is aligned with a sidewall surface of the first liner layer.
    Type: Application
    Filed: January 31, 2024
    Publication date: May 30, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Shu WU, Shu-Uei JANG, Wei-Yeh TANG, Ryan Chia-Jen CHEN, An-Chyi WEI
  • Publication number: 20240178216
    Abstract: A semiconductor device is provided, including a first doped region of a first conductivity type configured as a first terminal of a first diode, a second doped region of a second conductivity type configured as a second terminal of the first diode, wherein the first and second doped regions are coupled to a first voltage terminal; a first well of the first conductivity type surrounding the first and second doped regions in a layout view; a third doped region of the first conductivity type configured as a first terminal, coupled to an input/output pad, of a second diode; and a second well of the second conductivity type surrounding the third doped region in the layout view. The second and third doped regions, the first well, and the second well are configured as a first electrostatic discharge path between the I/O pad and the first voltage terminal.
    Type: Application
    Filed: February 7, 2024
    Publication date: May 30, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Po-Lin PENG, Li-Wei CHU, Ming-Fu TSAI, Jam-Wem LEE, Yu-Ti SU
  • Publication number: 20240179009
    Abstract: An apparatus and a method for performing an authenticated encryption with associated data (AEAD) operation of an encrypted instruction and a golden tag stored in a memory device in an event of a cache miss are provided. The apparatus includes a bus control circuit, a block buffer, a tag buffer and an AEAD circuit. The bus control circuit receives a read address from a cache for reading the encrypted instruction and the golden tag from the memory device. The block buffer receives and stores the encrypted instruction from the bus control circuit, wherein a size of the block buffer is preset to be N times a size of one cache line. The tag buffer receives and stores the golden tag from the bus control circuit. The AEAD circuit performs the AEAD operation upon the encrypted instruction and the golden tag to check whether the encrypted instruction is tampered or not.
    Type: Application
    Filed: September 25, 2023
    Publication date: May 30, 2024
    Applicant: PUFsecurity Corporation
    Inventors: Tsung-Wei Hung, Chia-Cho Wu, Wen-Ching Lin
  • Publication number: 20240176004
    Abstract: An electronic device comprises: a radio frequency (RF) front end circuit for generating wireless signals; an antenna array for transmitting the wireless signals generated by the RF front end circuit and receiving the wireless signals transmitted by the antenna array; and a control unit coupled to the RF front end circuit. In the embodiments, a receiving power or a receiving power difference is estimated based on the wireless signals received by the RF front end circuit; and a distance information between an external object and the electronic device is determined based on the receiving power difference, or whether the external object is within a detection area of the electronic device is determined based on the receiving power.
    Type: Application
    Filed: November 30, 2022
    Publication date: May 30, 2024
    Inventors: Wei-Hsuan CHANG, Cheng-Han LEE, Chih-Wei LEE
  • Publication number: 20240175464
    Abstract: A hinge is connectable with two housing shells for permitting relative opening and closing of the housing shells, and includes a fixed seat, at least two rotating units, two lateral support plates and a center support plate. The rotating units are disposed at two sides of a centerline of the fixed seat and are connectable with the housing shells. The rotating units are shiftable between an open state and a closed state. Each rotating unit includes a linking member arcuately slidable on the fixed seat. The lateral support plates are mounted on the linking members, and have central notches. The center support plate is movably disposed on the fixed seat and is moved with the rotating units. In the open state, the center support plate is disposed in the central notches. In the closed state, the center support plate abuts against the fixed seat.
    Type: Application
    Filed: January 10, 2023
    Publication date: May 30, 2024
    Applicant: FOSITEK CORPORATION
    Inventors: An-Szu HSU, An-Wei CHUNG
  • Publication number: 20240173711
    Abstract: A system for contacting a reactant stream with a catalyst that includes a reactor containing a quantity of catalyst and an inlet and a product outlet configured for discharging product and a catalyst regenerator unit having an inlet configured for receiving a spent catalyst stream from the reactor and an outlet configured for passage of a regenerated catalyst to the reactor where a water level in the reactor is about 10 vppm to about 3 mole percent.
    Type: Application
    Filed: October 10, 2023
    Publication date: May 30, 2024
    Inventors: John Q. Chen, Wei Pan, Stephen C. Houdek
  • Publication number: 20240177216
    Abstract: Implementations of the present specification provide a digital avatar recommendation method and recommendation system. The digital avatar recommendation system includes a computer-simulated digital avatar, and the corresponding recommendation method includes: obtaining current state data, where the state data includes user information of a target user, scenario information of a current scenario, and history information of an interaction between the target user and the digital avatar; mapping, by an agent in the digital avatar, the state data to a target action in a candidate action set based on a current policy obtained through reinforcement learning, where a candidate action in the candidate action set corresponds to a to-be-recommended content category, and the target action corresponds to a target content category; and performing, by the digital avatar, target interaction with the target user, where the target interaction is used to recommend the target content category.
    Type: Application
    Filed: November 21, 2023
    Publication date: May 30, 2024
    Inventors: Junwu XIONG, Xiaoyu TAN, Hairui XU, James ZHANG, Wei CHU, Yunzhou SHI, Zhongzhou ZHAO, Wei ZHOU, Xiaolong LI
  • Publication number: 20240176669
    Abstract: This specification discloses resource scheduling methods and apparatuses, electronic devices. The resource scheduling method includes following: estimated resource consumption data of a target container group in a plurality of time periods is determined in response to a resource application request of the target container group, resource amount data of each of a plurality of cluster nodes in the plurality of time periods is obtained, and the target container group is scheduled to at least one of the plurality of cluster nodes based on the estimated resource consumption data and the resource amount data. It can be seen that in this specification, different resource amounts can be allocated to the target container group in different time periods, and the target container group can fully use resources allocated to the target container group in each time period during running, thereby reducing the waste of cluster resources.
    Type: Application
    Filed: November 22, 2023
    Publication date: May 30, 2024
    Inventors: Wei WU, Denghui LI, Tongkai YANG
  • Publication number: 20240179949
    Abstract: A display substrate includes: a base substrate; a plurality of pixel circuits on the base substrate; and a plurality of pixels; the pixel includes a first sub-pixel, a second sub-pixel and a third sub-pixel; orthographic projections of the first sub-pixel, the second sub-pixel and the third sub-pixel on the base substrate do not overlap with each other; the first sub-pixel, the second sub-pixel and the third sub-pixel are electrically connected to the pixel circuits in a one-to-one correspondence manner; a first distance in a first direction exists between the first sub-pixel and the second sub-pixel, and a first via is arranged in the first distance; a second distance in the first direction exists between the first sub-pixel and the third sub-pixel, and a first via is arranged in the second distance; a third distance in the first direction exists between the second sub-pixel and the third sub-pixel.
    Type: Application
    Filed: June 25, 2021
    Publication date: May 30, 2024
    Inventors: Ying HAN, Pan XU, Wei LI, Yichi ZHANG, Ying ZHOU
  • Publication number: 20240176093
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Application
    Filed: February 5, 2024
    Publication date: May 30, 2024
    Inventors: Chao-Chang HU, Chih-Wei WENG, Chia-Che WU, Chien-Yu KAO, Hsiao-Hsin HU, He-Ling CHANG, Chao-Hsi WANG, Chen-Hsien FAN, Che-Wei CHANG, Mao-Gen JIAN, Sung-Mao TSAI, Wei-Jhe SHEN, Yung-Ping YANG, Sin-Hong LIN, Tzu-Yu CHANG, Sin-Jhong SONG, Shang-Yu HSU, Meng-Ting LIN, Shih-Wei HUNG, Yu-Huai LIAO, Mao-Kuo HSU, Hsueh-Ju LU, Ching-Chieh HUANG, Chih-Wen CHIANG, Yu-Chiao LO, Ying-Jen WANG, Shu-Shan CHEN, Che-Hsiang CHIU
  • Publication number: 20240177756
    Abstract: A magnetic random access memory (MRAM) structure is provided. The MRAM structure includes a first write electrode, a first magnetic tunnel junction (MTJ) stack, a voltage control electrode, a second MTJ stack, and a second write electrode. The first MTJ stack includes a first free layer disposed on the first write electrode, a first tunnel barrier layer disposed on the first free layer, and a first fixed layer disposed on the first tunnel barrier layer. The voltage control electrode is disposed on the first MTJ stack. The second MTJ stack includes a second fixed layer disposed on the voltage control electrode, a second tunnel barrier layer disposed on the second fixed layer, and a second free layer disposed on the second tunnel barrier layer. The second write electrode is disposed on the second MTJ stack.
    Type: Application
    Filed: December 23, 2022
    Publication date: May 30, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Hsin-Han LEE, Jeng-Hua WEI, Shan-Yi YANG, Yu-Chen HSIN
  • Publication number: 20240179341
    Abstract: An encoder which includes circuitry and memory. Using the memory, the circuitry generates a list which includes candidates for a first motion vector for a first partition. The list has a maximum list size and an order of the candidates, and at least one of the maximum list size or the order of the candidates is dependent on at least one of a partition size or a partition shape of the first partition. The circuitry selects the first motion vector from the candidates included in the list; encodes an index indicating the first motion vector among the candidates in the list into the bitstream based on the maximum list size; and generates the predicted image for the first partition using the first motion vector.
    Type: Application
    Filed: February 6, 2024
    Publication date: May 30, 2024
    Inventors: Chong Soon LIM, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Ru Ling Liao, Jing Ya Li, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Ryuichi Kanoh
  • Publication number: 20240175635
    Abstract: This disclosure is directed to a liquid cooling device having at least two collecting tanks and at least one pair of heat-exchange plates. The tanks are separated from each other. Each of the collecting tanks has a joint tube. Each of the heat-exchange plates is in elongated shape and the collecting tanks are connected serially by the heat-exchange plates. The two collecting tanks are connected by the pair of heat-exchange plates. Each of the heat-exchange plates has a channel extended along the longitudinal direction thereof. The channels in the heat-exchange plates are connected to the collecting tanks at two ends of the heat-exchange plates, respectively. The longitudinal directions of the channels of the heat-exchange plates between the collecting tanks are parallel to each other.
    Type: Application
    Filed: November 27, 2023
    Publication date: May 30, 2024
    Inventors: Kuan-Cheng LU, Chih-Hao HSIA, Wei-Fang WU, Meng-Yu CHEN
  • Publication number: 20240179678
    Abstract: Provided in the present disclosure are a paging processing method, a communication device and a storage medium. The paging processing method executed by a core network device may include sending a paging message that includes a paging cause.
    Type: Application
    Filed: April 1, 2021
    Publication date: May 30, 2024
    Applicant: Beijing Xiaomi Mobile Software Co., Ltd.
    Inventor: Wei HONG