Abstract: A data reproduction device for equalizing a reproduced digital signal. A signal reproduced using a reproduction head is sequentially processed by an analogue filter, an A/D, and an interpolator before being supplied to a digital equalizer. The digital equalizer digitally equalizes an input digital signal to output to a subsequent Viterbi decoder, or the like. The digital equalizer comprises a variable BPF, and a variable FIR filter, and the filtering characteristic is variably adjusted.

Abstract: An adaptive equalizer comprising a variable filter which equalizes a digital input signal which is input in a time sequential order, an adaptive controller unit which updates a filter coefficient of the variable filter based on an output signal of the variable filter and the input signal and according to an equalization algorithm, and a coefficient resetting unit which resets a filter coefficient of the variable filter at a predetermined timing.

Abstract: The invention provides a picture signal processor comprising: a sampling circuit that receives picture signals of a plurality of standard colors separated from a video signal and samples the picture signals of the plurality of standard colors in turn repeatedly; and an interpolation filter that receives the sampling values sampled from the plurality of standard colors in the sampling circuit and finds interpolated values at a common reference interpolation time for all the standard colors by subjecting the sampling values to interpolation calculation for each standard color. The use of the interpolated values at the reference interpolation time can reduce the color blur of the color video signal.

Abstract: A variable-gain integrator includes a variable-gain multiplier for multiplying digital input data that are input in time sequence by variable gain, an adder for adding output data from the variable multiplier to previous integration data, a clip circuit for limiting output data from the adder to a predetermined range to obtain integration data, an integration value storage device for storing the integration data obtained from the clip circuit and supplying the integration data that are stored to the adder as the previous integration data, and a fixed multiplier for multiplying the integration data obtained by the clip circuit by fixed gain.

Abstract: The invention provides a picture signal processor comprising: a sampling circuit that receives picture signals of a plurality of standard colors separated from a video signal and samples the picture signals of the plurality of standard colors in turn repeatedly; and an interpolation filter that receives the sampling values sampled from the plurality of standard colors in the sampling circuit and finds interpolated values at a common reference interpolation time for all the standard colors by subjecting the sampling values to interpolation calculation for each standard color. The use of the interpolated values at the reference interpolation time can reduce the color blur of the color video signal.

Abstract: An interpolator interpolates a digital signal obtained by digitally sampling an analog signal. The interpolator comprises a register which receives the digital signal at a plurality of taps and generates tap outputs from a plurality of the taps, a multiplier which multiplies each of the tap outputs by a coefficient defined to impart a capability of a bandpass filter which passes a signal in a predetermined frequency range to the tap outputs, and an adder which sums outputs from the multiplier.

Abstract: A data reproduction device for equalizing a reproduced digital signal. A signal reproduced using a reproduction head is sequentially processed by an analogue filter, an A/D, and an interpolator before being supplied to a digital equalizer. The digital equalizer digitally equalizes an input digital signal to output to a subsequent Viterbi decoder, or the like. The digital equalizer comprises a variable BPF, and a variable FIR filter, and the filtering characteristic is variably adjusted.

Abstract: An adaptive equalizer comprising a variable filter which equalizes a digital input signal which is input in a time sequential order, an adaptive controller unit which updates a filter coefficient of the variable filter based on an output signal of the variable filter and the input signal and according to an equalization algorithm, and a coefficient resetting unit which resets a filter coefficient of the variable filter at a predetermined timing.

Abstract: A variable-gain integrator comprises a variable-gain multiplier for multiplying digital input data which are input in time sequence by variable gain, an adder for adding output data from the variable multiplier to previous integration data, a clip circuit for limiting output data from the adder to a predetermined range to obtain integration data, an integration value storage device for storing the integration data obtained from the clip circuit and supplying the integration data which are stored to the adder as the previous integration data, and a fixed multiplier for multiplying the integration data obtained by the clip circuit by fixed gain.

Abstract: An apparatus for generating digital data. A signal regenerated by a playback head is sequentially processed by an analog filter, A/D, and an interpolator, and is provided to a digital equalizer. The digital equalizer has a plurality of variable filters connected in parallel. While the characteristic of the first variable filter is adjusted, the interpolator performs timing control using the output of the second variable filter. After the adjustment is completed, the switch SW is switched to perform timing control of the interpolator using the output of the first variable filter.