Patents by Inventor Osamu Ozawa
Osamu Ozawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9300248Abstract: A wiring pattern for oscillation input signal and a wiring pattern for oscillation output signal are provided on a printed circuit board, and a wiring pattern for ground power source voltage is arranged in a region therebetween. A quartz crystal unit is connected between the wiring pattern for oscillation input signal and the wiring pattern for oscillation output signal and one ends of capacitors serving as load capacitors thereof are connected to the wiring pattern for ground power source voltage. Further, a wiring pattern for VSS is arranged so as to enclose these wiring patterns, and a wiring pattern for VSS is arranged also in a lower layer in addition thereto. By this means, reduction of a parasitic capacitance between an XIN node and an XOUT node, improvement in noise tolerance of these nodes and others can be achieved.Type: GrantFiled: April 28, 2014Date of Patent: March 29, 2016Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Osamu Ozawa, Masashi Horiguchi, Yuichi Okuda, Akihito Anzai
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Publication number: 20160076955Abstract: A device for measuring the state of contact of a measuring roller of a conveyor belt includes a pressure sensor provided on a rotating surface of the measuring roller, which rotates in contact with an inner peripheral surface of a conveyor belt stretched between pulleys. The pressure sensor detects resistance force acting when the conveyor belt rides over the measuring roller. A rotational position sensor detects the circumferential position, on the rotating surface, of the pressure sensor. The data detected are sequentially wirelessly transmitted to the outside of the measuring roller by a transmission unit installed on the measuring roller, and the transmitted detection data are received by a receiver.Type: ApplicationFiled: May 7, 2014Publication date: March 17, 2016Inventors: Atsushi Miyajima, Osamu Ozawa
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Patent number: 9281781Abstract: A semiconductor apparatus includes: first and second external terminals that are connected to respective both ends of an piezoelectric vibrator, in which the piezoelectric vibrator is externally disposed; an inverting amplifier that is disposed between the first and second external terminals; a feedback resistance that feeds back an output of the inverting amplifier to an input of the inverting amplifier; a first capacitative element that is disposed between the first external terminal and a reference voltage terminal; a first resistive element that is disposed in series with the first capacitative element; a second capacitative element that is disposed between the second external terminal and the reference voltage terminal; and a second resistive element that is disposed in series with the second capacitative element.Type: GrantFiled: April 9, 2014Date of Patent: March 8, 2016Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Osamu Ozawa, Soshiro Nishioka
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SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURING METHOD OF ELECTRONIC DEVICE USING THE SAME
Publication number: 20150365049Abstract: A semiconductor integrated circuit device having a function to perform oscillation in combination with a crystal oscillator, includes: a first impedance element including a first external terminal coupled to one terminal of the crystal oscillator, a second external terminal coupled to the other terminal of the crystal oscillator, and first and second terminals coupled to the first and second external terminals when the oscillation is performed; a first variable capacitance circuit coupled to the first terminal of the feedback impedance element, and a configuration circuit for setting a capacitance value of the first variable capacitance circuit. A measurement signal is supplied to the second terminal of the feedback impedance element, and in response to this, the capacitance value of the first variable capacitance circuit is set by the configuration circuit based on the delay time of an observation signal generated at the first terminal with respect to the measurement signal.Type: ApplicationFiled: June 12, 2015Publication date: December 17, 2015Inventors: Osamu OZAWA, Soshiro NISHIOKA, Takashi NAKAMURA, Susumu ABE, Kazuya TANIGUCHI, Masaaki TANIMURA -
Publication number: 20150326209Abstract: The present invention provides a semiconductor device including a first terminal and a second terminal respectively coupled to both ends of a crystal resonator, an inverter circuit having an input coupled to the first terminal and an output coupled to the second terminal, a feedback resistor which couples between the first terminal and the second terminal, a variable capacitor coupled to at least one of the first and second terminals, and a control circuit. The control circuit performs control to increase both of the drive capability of the inverter circuit and the capacitance value of the variable capacitor in a second mode rather than a first mode.Type: ApplicationFiled: July 18, 2015Publication date: November 12, 2015Inventors: Osamu Ozawa, Masashi Horiguchi, Takayasu Ito
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Patent number: 9162196Abstract: When kneading kneading materials that include raw rubber and carbon black in a closed-type rubber kneader, the extent of the kneading efficiency of the closed-type rubber kneader is evaluated in accordance with the magnitude of the evaluation index calculated from unit work/total amount of shear by calculating an evaluation index calculated by a calculation device based on a total amount of shear obtained by integrating the shear velocity applied to the kneading materials by a rotor that is being driven to rotate by the rotor drive unit of the kneader over the kneading time, and a unit work obtained by dividing the integrated power obtained by integrating the instantaneous power of the rotor drive unit over the kneading time by the mass of the kneading materials.Type: GrantFiled: January 30, 2013Date of Patent: October 20, 2015Assignee: The Yokohama Rubber Co., LTD.Inventors: Osamu Ozawa, Yasuaki Shinoda
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Patent number: 9093952Abstract: The present invention provides a semiconductor device including a first terminal and a second terminal respectively coupled to both ends of a crystal resonator, an inverter circuit having an input coupled to the first terminal and an output coupled to the second terminal, a feedback resistor which couples between the first terminal and the second terminal, a variable capacitor coupled to at least one of the first and second terminals, and a control circuit. The control circuit performs control to increase both of the drive capability of the inverter circuit and the capacitance value of the variable capacitor in a second mode rather than a first mode.Type: GrantFiled: July 26, 2013Date of Patent: July 28, 2015Assignee: Renesas Electronics CorporationInventors: Osamu Ozawa, Masashi Horiguchi, Takayasu Ito
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Patent number: 9056290Abstract: The system includes: a closed-type rubber kneader that kneads kneading materials that include raw rubber and carbon black; a rotation meter of a rotor; a power meter that measures the instantaneous power required to drive the rotation of the rotor; and a calculation device to which the measurement data is input. The calculation device calculates an evaluation index that evaluates the kneading efficiency of the kneader based on the total amount of shear calculated by integrating the shear velocity applied to the kneading materials by the rotor over the kneading time, and a unit work calculated by dividing the integrated power obtained by integrating the instantaneous power over the kneading time by the mass of the kneading materials.Type: GrantFiled: January 30, 2013Date of Patent: June 16, 2015Assignee: The Yokohama Rubber Co., LTD.Inventors: Osamu Ozawa, Yasuaki Shinoda
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Publication number: 20150117134Abstract: The system includes: a closed-type rubber kneader that kneads kneading materials that include raw rubber and carbon black; a rotation meter of a rotor; a power meter that measures the instantaneous power required to drive the rotation of the rotor; and a calculation device to which the measurement data is input. The calculation device calculates an evaluation index that evaluates the kneading efficiency of the kneader based on the total amount of shear calculated by integrating the shear velocity applied to the kneading materials by the rotor over the kneading time, and a unit work calculated by dividing the integrated power obtained by integrating the instantaneous power over the kneading time by the mass of the kneading materials.Type: ApplicationFiled: January 30, 2013Publication date: April 30, 2015Inventors: Osamu Ozawa, Yasuaki Shinoda
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Patent number: 8985974Abstract: Disclosed is a vane compressor in which cylinders concentrically formed at the side of a rotor are eccentrically inserted in ring-shaped spaces between cylindrical parts concentrically formed at the side of a stator. A pair of radially extending vane attachment grooves is formed in the rotor, and vanes are slidably attached in the vane attachment grooves. Compression chambers the volumes of which repeatedly increase and decrease with each rotation of the rotor are concentrically formed in multiple stages by the cylindrical parts of the stator, the cylinders of the rotor, and comb-tooth parts of the vanes. It is possible to realize a vane compressor in which compression chambers can be concentrically arranged in multiple stages in a simple structure by suppressing increase in the number of components to the minimum level.Type: GrantFiled: January 28, 2011Date of Patent: March 24, 2015Assignee: Kashiyama Industries, Ltd.Inventors: Osamu Ozawa, Shuzo Tsutsumi
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Publication number: 20150036449Abstract: When kneading kneading materials that include raw rubber and carbon black in a closed-type rubber kneader, the extent of the kneading efficiency of the closed-type rubber kneader is evaluated in accordance with the magnitude of the evaluation index calculated from unit work/total amount of shear by calculating an evaluation index calculated by a calculation device based on a total amount of shear obtained by integrating the shear velocity applied to the kneading materials by a rotor that is being driven to rotate by the rotor drive unit of the kneader over the kneading time, and a unit work obtained by dividing the integrated power obtained by integrating the instantaneous power of the rotor drive unit over the kneading time by the mass of the kneading materials.Type: ApplicationFiled: January 30, 2013Publication date: February 5, 2015Applicant: The Yokohama Rubber Co., Ltd.Inventors: Osamu Ozawa, Yasuaki Shinoda
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Publication number: 20140320223Abstract: A semiconductor apparatus includes: first and second external terminals that are connected to respective both ends of an piezoelectric vibrator, in which the piezoelectric vibrator is externally disposed; an inverting amplifier that is disposed between the first and second external terminals; a feedback resistance that feeds back an output of the inverting amplifier to an input of the inverting amplifier; a first capacitative element that is disposed between the first external terminal and a reference voltage terminal; a first resistive element that is disposed in series with the first capacitative element; a second capacitative element that is disposed between the second external terminal and the reference voltage terminal; and a second resistive element that is disposed in series with the second capacitative element.Type: ApplicationFiled: April 9, 2014Publication date: October 30, 2014Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Osamu OZAWA, Soshiro NISHIOKA
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Publication number: 20140232476Abstract: A wiring pattern for oscillation input signal and a wiring pattern for oscillation output signal are provided on a printed circuit board, and a wiring pattern for ground power source voltage is arranged in a region therebetween. A quartz crystal unit is connected between the wiring pattern for oscillation input signal and the wiring pattern for oscillation output signal and one ends of capacitors serving as load capacitors thereof are connected to the wiring pattern for ground power source voltage. Further, a wiring pattern for VSS is arranged so as to enclose these wiring patterns, and a wiring pattern for VSS is arranged also in a lower layer in addition thereto. By this means, reduction of a parasitic capacitance between an XIN node and an XOUT node, improvement in noise tolerance of these nodes and others can be achieved.Type: ApplicationFiled: April 28, 2014Publication date: August 21, 2014Applicant: Renesas Electronics CorporationInventors: Osamu Ozawa, Masashi Horiguchi, Yuichi Okuda, Akihito Anzai
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Patent number: 8736390Abstract: A wiring pattern for oscillation input signal and a wiring pattern for oscillation output signal are provided on a printed circuit board, and a wiring pattern for ground power source voltage is arranged in a region therebetween. A quartz crystal unit is connected between the wiring pattern for oscillation input signal and the wiring pattern for oscillation output signal and one ends of capacitors serving as load capacitors thereof are connected to the wiring pattern for ground power source voltage. Further, a wiring pattern for VSS is arranged so as to enclose these wiring patterns, and a wiring pattern for VSS is arranged also in a lower layer in addition thereto. By this means, reduction of a parasitic capacitance between an XIN node and an XOUT node, improvement in noise tolerance of these nodes and others can be achieved.Type: GrantFiled: December 10, 2011Date of Patent: May 27, 2014Assignee: Rensas Electronics CorporationInventors: Osamu Ozawa, Masashi Horiguchi, Yuichi Okuda, Akihito Anzai
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Publication number: 20140035689Abstract: The present invention provides a semiconductor device including a first terminal and a second terminal respectively coupled to both ends of a crystal resonator, an inverter circuit having an input coupled to the first terminal and an output coupled to the second terminal, a feedback resistor which couples between the first terminal and the second terminal, a variable capacitor coupled to at least one of the first and second terminals, and a control circuit. The control circuit performs control to increase both of the drive capability of the inverter circuit and the capacitance value of the variable capacitor in a second mode rather than a first mode.Type: ApplicationFiled: July 26, 2013Publication date: February 6, 2014Applicant: Renesas Electronics CorporationInventors: Osamu Ozawa, Masashi Horiguchi, Takayasu Ito
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Publication number: 20130115121Abstract: Disclosed is a vane compressor in which cylinders concentrically formed at the side of a rotor are eccentrically inserted in ring-shaped spaces between cylindrical parts concentrically formed at the side of a stator. A pair of radially extending vane attachment grooves is formed in the rotor, and vanes are slidably attached in the vane attachment grooves. Compression chambers the volumes of which repeatedly increase and decrease with each rotation of the rotor are concentrically formed in multiple stages by the cylindrical parts of the stator, the cylinders of the rotor, and comb-tooth parts of the vanes. It is possible to realize a vane compressor in which compression chambers can be concentrically arranged in multiple stages in a simple structure by suppressing increase in the number of components to the minimum level.Type: ApplicationFiled: January 28, 2011Publication date: May 9, 2013Applicant: KASHIYAMA INDUSTRIES, LTDInventors: Osamu Ozawa, Shuzo Tsutsumi
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Publication number: 20120161889Abstract: A wiring pattern for oscillation input signal and a wiring pattern for oscillation output signal are provided on a printed circuit board, and a wiring pattern for ground power source voltage is arranged in a region therebetween. A quartz crystal unit is connected between the wiring pattern for oscillation input signal and the wiring pattern for oscillation output signal and one ends of capacitors serving as load capacitors thereof are connected to the wiring pattern for ground power source voltage. Further, a wiring pattern for VSS is arranged so as to enclose these wiring patterns, and a wiring pattern for VSS is arranged also in a lower layer in addition thereto. By this means, reduction of a parasitic capacitance between an XIN node and an XOUT node, improvement in noise tolerance of these nodes and others can be achieved.Type: ApplicationFiled: December 10, 2011Publication date: June 28, 2012Inventors: Osamu OZAWA, Masashi Horiguchi, Yuichi Okuda, Akihito Anzai
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Patent number: 7714606Abstract: A plurality of MOS transistors each having an SOI structure includes, in mixed form, those brought into body floating and whose body voltages are fixed and variably set. When a high-speed operation is expected in a logic circuit in which operating power is relatively a low voltage and a switching operation is principally performed, body floating may be adopted. Body voltage fixing may be adopted in an analog system circuit that essentially dislikes a kink phenomenon of a current-voltage characteristic. Body bias variable control may be adopted in a logic circuit that requires the speedup of operation in an active state and needs low power consumption in a standby state. Providing in mixed form the transistors which are subjected to the body floating and the body voltage fixing and which are variably controlled in body voltage, makes it easier to adopt an accurate body bias according to a circuit function and a circuit configuration in terms of the speedup of operation and the low power consumption.Type: GrantFiled: December 15, 2006Date of Patent: May 11, 2010Assignee: Renesas Technology Corp.Inventors: Osamu Ozawa, Toshio Sasaki, Ryo Mori, Takashi Kuraishi, Yoshihiko Yasu
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Publication number: 20100090282Abstract: The semiconductor integrated circuit has so-called SOI type first MOS transistors (MNtk, MPtk) and second MOS transistors (MNtn, MPtn). The first MOS transistors have a gate isolation film thicker than that the second MOS transistors have. The first and second MOS transistors constitute a power-supply-interruptible circuit (6) and a power-supply-uninterrupted circuit (7). The power-supply-interruptible circuit has the first MOS transistors each constituting a power switch (10) between a source line (VDD) and a ground line (VSS), and the second MOS transistors connected in series with the power switch. A gate control signal for the first MOS transistors each constituting a power switch is made larger in amplitude than that for the second MOS transistors. This enables power-source cutoff control with a high degree of flexibility commensurate with the device isolation structure, which an SOI type semiconductor integrated circuit has originally.Type: ApplicationFiled: December 17, 2009Publication date: April 15, 2010Inventors: OSAMU OZAWA, Toshio Sasaki, Ryo Mori, Takashi Kuraishi, Yoshihiko Yasu, Koichiro Ishibashi
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Patent number: 7652333Abstract: The semiconductor integrated circuit has so-called SOI type first MOS transistors (MNtk, MPtk) and second MOS transistors (MNtn, MPtn). The first MOS transistors have a gate isolation film thicker than that the second MOS transistors have. The first and second MOS transistors constitute a power-supply-interruptible circuit (6) and a power-supply-uninterrupted circuit (7). The power-supply-interruptible circuit has the first MOS transistors each constituting a power switch (10) between a source line (VDD) and a ground line (VSS), and the second MOS transistors connected in series with the power switch. A gate control signal for the first MOS transistors each constituting a power switch is made larger in amplitude than that for the second MOS transistors. This enables power-source cutoff control with a high degree of flexibility commensurate with the device isolation structure, which an SOI type semiconductor integrated circuit has originally.Type: GrantFiled: December 21, 2006Date of Patent: January 26, 2010Assignee: Renesas Technology Corp.Inventors: Osamu Ozawa, Toshio Sasaki, Ryo Mori, Takashi Kuraishi, Yoshihiko Yasu, Koichiro Ishibashi