Patents by Inventor Osamu Taniguchi

Osamu Taniguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170371273
    Abstract: A molding device for molding a magnet roll with a profiled cross-section comprises a heating and kneading unit that supplies, to a cylindrical metal mold, a kneaded material obtained by heating and kneading a raw mixture including ferromagnetic particles and thermoplastic resin, an extrusion molding unit that molds the supplied kneaded material by the metal mold, and a magnetic field generating unit disposed at an end portion of the metal mold in a lengthwise direction that generates a magnetic field inside the metal mold, and the metal mold has a profiled C-shaped cross-section at an inlet for the kneaded material and a profiled cross-section at an outlet for the kneaded material more complex than the inlet.
    Type: Application
    Filed: January 19, 2016
    Publication date: December 28, 2017
    Inventors: Osamu Taniguchi, Masahiko Orimo
  • Patent number: 9761406
    Abstract: A radiation tube includes an enclosure having an opening portion, an electron source disposed inside the enclosure, a target unit configured to generate radiation by being bombarded with electrons emitted from the electron source, and a front shield disposed on the opening portion and joined to the target unit. The front shield has a slit-shaped opening that shields some of the radiation radiated from the target unit. The radiation is radiated through the opening in the shape of a fan beam.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: September 12, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Koichi Takasaki, Noritaka Ukiyo, Osamu Taniguchi, Takao Ogura
  • Publication number: 20150162162
    Abstract: A radiation tube includes an enclosure having an opening portion, an electron source disposed inside the enclosure, a target unit configured to generate radiation by being bombarded with electrons emitted from the electron source, and a front shield disposed on the opening portion and joined to the target unit. The front shield has a slit-shaped opening that shields some of the radiation radiated from the target unit. The radiation is radiated through the opening in the shape of a fan beam.
    Type: Application
    Filed: December 4, 2014
    Publication date: June 11, 2015
    Inventors: Koichi Takasaki, Noritaka Ukiyo, Osamu Taniguchi, Takao Ogura
  • Publication number: 20130266119
    Abstract: A transmission type micro-focus X-ray generation apparatus includes an electron reflector, an electron passage surrounded by the electron reflector, an electron source, and a target. X-rays are generated by irradiating the target with electrons that have been emitted from the electron source and that have passed through the electron passage. The electron passage has a conical shape having a cross-sectional area that increases from an outlet on the target side toward an inlet on the electron source side. A material of the target is molybdenum, tantalum, or tungsten. The atomic number of a material of the electron reflector is greater than or equal to the atomic number of the material of the target.
    Type: Application
    Filed: April 5, 2013
    Publication date: October 10, 2013
    Inventors: Osamu Taniguchi, Takao Ogura
  • Publication number: 20110249103
    Abstract: In a field sequential 3D image viewing system, 3D glasses are provided for use with a plurality of types of image control apparatuses. A storage unit stores opening control data associated with timing of opening right and left shutters of the 3D glasses in relation to each type of the image control apparatus. A signal processing unit generates an opening signal for driving the shutters based on the switching signal associated with the right and left shutters and based the opening control data read from the storage unit. The right and left shutters are driven according to the opening signal. The start time and open duration of the opening signal may be set based on the type of image control apparatus.
    Type: Application
    Filed: March 7, 2011
    Publication date: October 13, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Osamu Taniguchi
  • Publication number: 20110205346
    Abstract: In a 3D image viewing system of field sequential type using a liquid crystal apparatus, an apparatus generates a black field that is a period for displaying a black image, which is located between a right field that is a right eye image display period and a left field that is a right eye image display period. Right and left shutters of shutter glasses start to open in synchronization with start of the right and left fields and start to close in synchronization with end of the adjacent black field.
    Type: Application
    Filed: February 23, 2011
    Publication date: August 25, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Osamu Taniguchi
  • Patent number: 7678695
    Abstract: A circuit substrate comprises a glass substrate 16, through-holes 18 formed through the glass substrate 16 and via electrodes 20 buried in the through-holes 18. An opening width of the through-holes 18 is minimum inside the glass substrate and is increased toward both surfaces of the glass substrate 16. Accordingly, the detachment of the via electrodes 20 can be prevented without increasing the surface roughness of the inside walls of the through holes, and stresses generated in the core substrate can be mitigated.
    Type: Grant
    Filed: March 7, 2007
    Date of Patent: March 16, 2010
    Assignee: Fujitsu Limited
    Inventors: Osamu Taniguchi, Yasuo Yamagishi, Koji Omote
  • Patent number: 7557014
    Abstract: A semiconductor apparatus comprises a support substrate having through holes filles with conductor adapted to a first pitch; a capacitor formed on or above said support substrate; a wiring layer formed on or above said support substrate, leading some of said through holes filles with conductor upwards through said capacitor, having branches, and having wires of a second pitch different from said first pitch; and plural semiconductor elements disposed on or above said wiring layer, having terminals adapted to the second pitch, and connected with said wiring layer via said terminals. A semiconductor apparatus, in which semiconductor elements having a narrow terminal pitch, a support having through wires at a wider pitch, and a capacitor are suitably electrically connected to realize the decoupling function with reduced inductance and large capacitance.
    Type: Grant
    Filed: November 16, 2006
    Date of Patent: July 7, 2009
    Assignee: Fujitsu Limited
    Inventors: Keishiro Okamoto, Takeshi Shioga, Osamu Taniguchi, Koji Omote, Yoshihiko Imanaka, Yasuo Yamagishi
  • Patent number: 7531115
    Abstract: The conductive material comprises a first metal material having a melting point of not more than 250° C. and a second metal material having a melting point of not less than 500° C., and is paste at a temperature not more than 250° C. Whereby the conductive material can have much higher conductivity than the resin paste. The conductive material can be used in paste, whereby the conductive material can be buried in the via-hole in the same way as the resin paste.
    Type: Grant
    Filed: March 9, 2005
    Date of Patent: May 12, 2009
    Assignee: Fujitsu Limited
    Inventors: Isao Watanabe, Kaoru Hashimoto, Osamu Taniguchi
  • Publication number: 20070155174
    Abstract: A circuit substrate comprises a glass substrate 16, through-holes 18 formed through the glass substrate 16 and via electrodes 20 buried in the through-holes 18. An opening width of the through-holes 18 is minimum inside the glass substrate and is increased toward both surfaces of the glass substrate 16. Accordingly, the detachment of the via electrodes 20 can be prevented without increasing the surface roughness of the inside walls of the through holes, and stresses generated in the core substrate can be mitigated.
    Type: Application
    Filed: March 7, 2007
    Publication date: July 5, 2007
    Applicant: FIJITSU LIMITED
    Inventors: Osamu Taniguchi, Yasuo Yamagishi, Koji Omote
  • Patent number: 7211899
    Abstract: A circuit substrate comprises a glass substrate 16, through-holes 18 formed through the glass substrate 16 and via electrodes 20 buried in the through-holes 18. An opening width of the through-holes 18 is minimum inside the glass substrate and is increased toward both surfaces of the glass substrate 16. Accordingly, the detachment of the via electrodes 20 can be prevented without increasing the surface roughness of the inside walls of the through holes, and stresses generated in the core substrate can be mitigated.
    Type: Grant
    Filed: January 6, 2003
    Date of Patent: May 1, 2007
    Assignee: Fujitsu Limited
    Inventors: Osamu Taniguchi, Yasuo Yamagishi, Koji Omote
  • Publication number: 20070065981
    Abstract: A semiconductor apparatus comprises a support substrate having through holes filles with conductor adapted to a first pitch; a capacitor formed on or above said support substrate; a wiring layer formed on or above said support substrate, leading some of said through holes filles with conductor upwards through said capacitor, having branches, and having wires of a second pitch different from said first pitch; and plural semiconductor elements disposed on or above said wiring layer, having terminals adapted to the second pitch, and connected with said wiring layer via said terminals. A semiconductor apparatus, in which semiconductor elements having a narrow terminal pitch, a support having through wires at a wider pitch, and a capacitor are suitably electrically connected to realize the decoupling function with reduced inductance and large capacitance.
    Type: Application
    Filed: November 16, 2006
    Publication date: March 22, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Keishiro Okamoto, Takeshi Shioga, Osamu Taniguchi, Koji Omote, Yoshihiko Imanaka, Yasuo Yamagishi
  • Patent number: 7176556
    Abstract: A semiconductor apparatus comprises a support substrate having through holes filles with conductor adapted to a first pitch; a capacitor formed on or above said support substrate; a wiring layer formed on or above said support substrate, leading some of said through holes filles with conductor upwards through said capacitor, having branches, and having wires of a second pitch different from said first pitch; and plural semiconductor elements disposed on or above said wiring layer, having terminals adapted to the second pitch, and connected with said wiring layer via said terminals. A semiconductor apparatus, in which semiconductor elements having a narrow terminal pitch, a support having through wires at a wider pitch, and a capacitor are suitably electrically connected to realize the decoupling function with reduced inductance and large capacitance.
    Type: Grant
    Filed: March 8, 2002
    Date of Patent: February 13, 2007
    Assignee: Fujitsu Limited
    Inventors: Keishiro Okamoto, Takeshi Shioga, Osamu Taniguchi, Koji Omote, Yoshihiko Imanaka, Yasuo Yamagishi
  • Patent number: 7139176
    Abstract: A circuit substrate including a silicon substrate with through-holes formed therein, conducting films formed on the inside walls of the through-holes, and an organic resin film formed on the surface of at least one side of the silicon substrate and covering at least parts of the through-holes. Accordingly, even in a case where the through-holes formed, micronized at a small pitch, the substrate does not lower the mechanical strength. Thus, a circuit substrate which is applicable to high-density packaging can be provided.
    Type: Grant
    Filed: November 21, 2002
    Date of Patent: November 21, 2006
    Assignee: Fujitsu Limited
    Inventors: Osamu Taniguchi, Yasuo Yamagishi, Koji Omote
  • Patent number: 6979644
    Abstract: A method of manufacturing an electronic circuit component, including the steps of: (a) forming a first thin film circuit element on a surface of a circuit board made of an Si substrate; (b) forming a hole or trench from the surface of the circuit board through at least a portion of a thickness of the Si substrate by etching; (c) forming an insulating film covering a surface of the formed hole or trench; (d) adhering a dry film of photoresist to the surface of the circuit board, the dry film capping an opening of the hole or trench; (e) patterning the dry film; and (f) by using the patterned dry film as a mask, etching the insulating film. An electronic circuit component having through conductors and being less influenced by high temperature annealing can be manufactured.
    Type: Grant
    Filed: April 23, 2003
    Date of Patent: December 27, 2005
    Assignee: Fujitsu Limited
    Inventors: Koji Omote, Masataka Mizukoshi, Osamu Taniguchi
  • Publication number: 20050147522
    Abstract: The conductive material comprises a first metal material having a melting point of not more than 250° C. and a second metal material having a melting point of not less than 500° C., and is paste at a temperature not more than 250° C. Whereby the conductive material can have much higher conductivity than the resin paste. The conductive material can be used in paste, whereby the conductive material can be buried in the via-hole in the same way as the resin paste.
    Type: Application
    Filed: March 9, 2005
    Publication date: July 7, 2005
    Applicant: FUJITSU LIMITED
    Inventors: Isao Watanabe, Kaoru Hashimoto, Osamu Taniguchi
  • Patent number: 6886248
    Abstract: The conductive material comprises a first metal material having a melting point of not more than 250° C. and a second metal material having a melting point of not less than 500° C., and is paste at a temperature not more than 250° C. Whereby the conductive material can have much higher conductivity than the resin paste. The conductive material can be used in paste, whereby the conductive material can be buried in the via-hole in the same way as the resin paste.
    Type: Grant
    Filed: January 23, 2003
    Date of Patent: May 3, 2005
    Assignee: Fujitsu Limited
    Inventors: Isao Watanabe, Kaoru Hashimoto, Osamu Taniguchi
  • Patent number: 6768205
    Abstract: The objective of the present invention is to provide a reliable thin-film circuit substrate or via formed substrate that is provided with minute via plugs at a fine pitch. The objective is served by forming an insulation layer that functions as an etching stopper on a Si substrate, and then via holes are formed in the Si substrate, using a semiconductor process, until the etching stopper layer is exposed. Further, a thin-film circuit is formed on the insulation layer, and the insulation layer is removed at the via holes such that the thin-film circuit is exposed. As necessary, the thin film circuit is heat-treated, and then the via holes are filled with an electrically conductive material and vamp electrodes are formed.
    Type: Grant
    Filed: March 1, 2002
    Date of Patent: July 27, 2004
    Assignee: Fujitsu Limited
    Inventors: Osamu Taniguchi, Tomoko Miyashita, Yasuo Yamagishi, Koji Omote, Yoshihiko Imanaka
  • Publication number: 20030200654
    Abstract: A method of manufacturing an electronic circuit component, comprises the steps of: (a) forming a first thin film circuit element on a surface of a circuit board made of an Si substrate; (b) forming a hole or trench from the surface of the circuit board through at least a portion of a thickness of the Si substrate by etching; (c) forming an insulating film covering a surface of the formed hole or trench; (d) adhering a dry film of photoresist to the surface of the circuit board, the dry film capping an opening of the hole or trench; (e) patterning the dry film; and (f) by using the patterned dry film as a mask, etching the insulating film. An electronic circuit component having through conductors and being less influenced by high temperature annealing can be manufactured.
    Type: Application
    Filed: April 23, 2003
    Publication date: October 30, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Koji Omote, Masataka Mizukoshi, Osamu Taniguchi
  • Publication number: 20030135997
    Abstract: The conductive material comprises a first metal material having a melting point of not more than 250° C. and a second metal material having a melting point of not less than 500° C., and is paste at a temperature not more than 250° C. Whereby the conductive material can have much higher conductivity than the resin paste. The conductive material can be used in paste, whereby the conductive material can be buried in the via-hole in the same way as the resin paste.
    Type: Application
    Filed: January 23, 2003
    Publication date: July 24, 2003
    Applicant: Fujitsu Limited
    Inventors: Isao Watanabe, Kaoru Hashimoto, Osamu Taniguchi