Patents by Inventor Pai-Yuan Li

Pai-Yuan Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11916023
    Abstract: A package includes a package component, a device die over and bonded to the package component, a metal cap having a top portion over the device die, and a thermal interface material between and contacting the device die and the metal cap. The thermal interface material includes a first portion directly over an inner portion of the device die, and a second portion extending directly over a corner region of the device die. The first portion has a first thickness. The second portion has a second thickness greater than the first thickness.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sung-Hui Huang, Da-Cyuan Yu, Kuan-Yu Huang, Pai Yuan Li, Hsiang-Fan Lee
  • Publication number: 20230178498
    Abstract: A semiconductor device includes a substrate, an electronic component, a stiffener ring and an adhesive ring. The substrate has a first surface and a second surface opposite to the first surface. The electronic component is over the first surface of the substrate. The stiffener ring is over the first surface of the substrate. The stiffener ring includes a plurality of side parts and a plurality of corner parts coupled to the side parts. Heights of the corner parts are less than heights of the side parts. The adhesive ring is interposed between the first surface of the substrate and the stiffener ring. The adhesive ring includes a plurality of side portions and a plurality of corner portions coupled to the side portions. Thicknesses of the side portions are less than thicknesses of the corner portions.
    Type: Application
    Filed: February 1, 2023
    Publication date: June 8, 2023
    Inventors: KUAN-YU HUANG, SUNG-HUI HUANG, PAI-YUAN LI, SHU-CHIA HSU, HSIANG-FAN LEE, SZU-PO HUANG
  • Patent number: 11587886
    Abstract: A semiconductor device includes a substrate, an electronic component, a ring structure and an adhesive layer. The substrate has a first surface. The electronic component is over the first surface of the substrate. The ring structure is over the first surface of the substrate, wherein the ring structure includes a first part having a first height, and a second part recessed from the bottom surface and having a second height lower than the first height. The adhesive layer is interposed between the first part of the ring structure and the substrate, and between the second part of the ring structure and the substrate.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: February 21, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Kuan-Yu Huang, Sung-Hui Huang, Pai-Yuan Li, Shu-Chia Hsu, Hsiang-Fan Lee, Szu-Po Huang
  • Patent number: 11201097
    Abstract: In order to prevent cracks from occurring at the corners of semiconductor dies after the semiconductor dies have been bonded to other substrates, an opening is formed adjacent to the corners of the semiconductor dies, and the openings are filled and overfilled with a buffer material that has physical properties that are between the physical properties of the semiconductor die and an underfill material that is placed adjacent to the buffer material.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: December 14, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Yu Huang, Chih-Wei Wu, Li-Chung Kuo, Long Hua Lee, Sung-Hui Huang, Ying-Ching Shih, Pai Yuan Li
  • Patent number: 11121050
    Abstract: In order to prevent cracks from occurring at the corners of semiconductor dies after the semiconductor dies have been bonded to other substrates, an opening is formed adjacent to the corners of the semiconductor dies, and the openings are filled and overfilled with a buffer material that has physical properties that are between the physical properties of the semiconductor die and an underfill material that is placed adjacent to the buffer material.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: September 14, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Yu Huang, Chih-Wei Wu, Li-Chung Kuo, Long Hua Lee, Sung-Hui Huang, Ying-Ching Shih, Pai Yuan Li
  • Publication number: 20200402926
    Abstract: A package includes a package component, a device die over and bonded to the package component, a metal cap having a top portion over the device die, and a thermal interface material between and contacting the device die and the metal cap. The thermal interface material includes a first portion directly over an inner portion of the device die, and a second portion extending directly over a corner region of the device die. The first portion has a first thickness. The second portion has a second thickness greater than the first thickness.
    Type: Application
    Filed: September 4, 2020
    Publication date: December 24, 2020
    Inventors: Sung-Hui Huang, Da-Cyuan Yu, Kuan-Yu Huang, Pai Yuan Li, Hsiang-Fan Lee
  • Patent number: 10872871
    Abstract: A method for forming a chip package structure is provided. The method includes bonding a chip to a first surface of a first substrate. The method includes forming a dummy bump over a second surface of the first substrate. The first surface is opposite the second surface, and the dummy bump is electrically insulated from the chip. The method includes cutting through the first substrate and the dummy bump to form a cut substrate and a cut dummy bump. The cut dummy bump is over a corner portion of the cut substrate, a first sidewall of the cut dummy bump is substantially coplanar with a second sidewall of the cut substrate, and a third sidewall of the cut dummy bump is substantially coplanar with a fourth sidewall of the cut substrate.
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: December 22, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Sung-Hui Huang, Kuan-Yu Huang, Shang-Yun Hou, Yushun Lin, Heh-Chang Huang, Shu-Chia Hsu, Pai-Yuan Li, Kung-Chen Yeh
  • Patent number: 10867951
    Abstract: A semiconductor device includes an electronic component, a package, a substrate and a plurality of first conductors and second conductors. The package is over the electronic component. T substrate is between the electronic component and the package. The substrate includes a first portion covered by the package, and a second portion protruding out of an edge of the package and uncovered by the package. The first conductors and second conductors are between and electrically connected to the electronic component and the substrate. A width of a second conductor of the plurality of second conductors is larger than a width of a first conductor of the plurality of first conductors, the first conductors are disposed between the second portion of the substrate and the electronic component, and the second conductors are disposed between the first portion of the substrate and the electronic component.
    Type: Grant
    Filed: April 16, 2019
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Kuan-Yu Huang, Tzu-Kai Lan, Shou-Chih Yin, Shu-Chia Hsu, Pai-Yuan Li, Sung-Hui Huang, Hsiang-Fan Lee, Ying-Shin Han
  • Patent number: 10770405
    Abstract: A package includes a package component, a device die over and bonded to the package component, a metal cap having a top portion over the device die, and a thermal interface material between and contacting the device die and the metal cap. The thermal interface material includes a first portion directly over an inner portion of the device die, and a second portion extending directly over a corner region of the device die. The first portion has a first thickness. The second portion has a second thickness greater than the first thickness.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: September 8, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sung-Hui Huang, Da-Cyuan Yu, Kuan-Yu Huang, Pai Yuan Li, Hsiang-Fan Lee
  • Publication number: 20200251427
    Abstract: A semiconductor device includes a substrate, an electronic component, a ring structure and an adhesive layer. The substrate has a first surface. The electronic component is over the first surface of the substrate. The ring structure is over the first surface of the substrate, wherein the ring structure includes a first part having a first height, and a second part recessed from the bottom surface and having a second height lower than the first height. The adhesive layer is interposed between the first part of the ring structure and the substrate, and between the second part of the ring structure and the substrate.
    Type: Application
    Filed: April 21, 2020
    Publication date: August 6, 2020
    Inventors: KUAN-YU HUANG, SUNG-HUI HUANG, PAI-YUAN LI, SHU-CHIA HSU, HSIANG-FAN LEE, SZU-PO HUANG
  • Patent number: 10707177
    Abstract: A package includes a package component, a device die over and bonded to the package component, a metal cap having a top portion over the device die, and a thermal interface material between and contacting the device die and the metal cap. The thermal interface material includes a first portion directly over an inner portion of the device die, and a second portion extending directly over a corner region of the device die. The first portion has a first thickness. The second portion has a second thickness greater than the first thickness.
    Type: Grant
    Filed: July 30, 2018
    Date of Patent: July 7, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sung-Hui Huang, Da-Cyuan Yu, Kuan-Yu Huang, Pai Yuan Li, Hsiang-Fan Lee
  • Publication number: 20200203299
    Abstract: A method for forming a chip package structure is provided. The method includes bonding a chip to a first surface of a first substrate. The method includes forming a dummy bump over a second surface of the first substrate. The first surface is opposite the second surface, and the dummy bump is electrically insulated from the chip. The method includes cutting through the first substrate and the dummy bump to form a cut substrate and a cut dummy bump. The cut dummy bump is over a corner portion of the cut substrate, a first sidewall of the cut dummy bump is substantially coplanar with a second sidewall of the cut substrate, and a third sidewall of the cut dummy bump is substantially coplanar with a fourth sidewall of the cut substrate.
    Type: Application
    Filed: May 7, 2019
    Publication date: June 25, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Sung-Hui HUANG, Kuan-Yu HUANG, Shang-Yun HOU, Yushun LIN, Heh-Chang HUANG, Shu-Chia HSU, Pai-Yuan LI, Kung-Chen YEH
  • Patent number: 10629545
    Abstract: A semiconductor device includes a substrate, an electronic component, a ring structure and an adhesive layer. The substrate has a first surface. The electronic component is over the first surface of the substrate. The ring structure is over the first surface of the substrate, wherein the ring structure includes a first part having a first height, and a second part recessed from the bottom surface and having a second height lower than the first height. The adhesive layer is interposed between the first part of the ring structure and the substrate, and between the second part of the ring structure and the substrate.
    Type: Grant
    Filed: September 22, 2017
    Date of Patent: April 21, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Kuan-Yu Huang, Sung-Hui Huang, Pai-Yuan Li, Shu-Chia Hsu, Hsiang-Fan Lee, Szu-Po Huang
  • Publication number: 20200006178
    Abstract: In order to prevent cracks from occurring at the corners of semiconductor dies after the semiconductor dies have been bonded to other substrates, an opening is formed adjacent to the corners of the semiconductor dies, and the openings are filled and overfilled with a buffer material that has physical properties that are between the physical properties of the semiconductor die and an underfill material that is placed adjacent to the buffer material.
    Type: Application
    Filed: September 13, 2019
    Publication date: January 2, 2020
    Inventors: Kuan-Yu Huang, Chih-Wei Wu, Li-Chung Kuo, Long Hua Lee, Sung-Hui Huang, Ying-Ching Shih, Pai Yuan Li
  • Publication number: 20190244925
    Abstract: A semiconductor device includes an electronic component, a package, a substrate and a plurality of first conductors and second conductors. The package is over the electronic component. T substrate is between the electronic component and the package. The substrate includes a first portion covered by the package, and a second portion protruding out of an edge of the package and uncovered by the package. The first conductors and second conductors are between and electrically connected to the electronic component and the substrate. A width of a second conductor of the plurality of second conductors is larger than a width of a first conductor of the plurality of first conductors, the first conductors are disposed between the second portion of the substrate and the electronic component, and the second conductors are disposed between the first portion of the substrate and the electronic component.
    Type: Application
    Filed: April 16, 2019
    Publication date: August 8, 2019
    Inventors: KUAN-YU HUANG, TZU-KAI LAN, SHOU-CHIH YIN, SHU-CHIA HSU, PAI-YUAN LI, SUNG-HUI HUANG, HSIANG-FAN LEE, YING-SHIN HAN
  • Patent number: 10340242
    Abstract: A semiconductor device includes a substrate, a package, first conductors and second conductors. The substrate includes a first surface and a second surface opposite to the first surface. The package is disposed over the substrate. The first conductors are disposed over the substrate. The second conductors are disposed over the substrate, wherein the first conductors and the second conductors are substantially at a same tier, and a width of the second conductor is larger than a width of the first conductor.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: July 2, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Kuan-Yu Huang, Tzu-Kai Lan, Shou-Chih Yin, Shu-Chia Hsu, Pai-Yuan Li, Sung-Hui Huang, Hsiang-Fan Lee, Ying-Shin Han
  • Publication number: 20190067231
    Abstract: A semiconductor device includes a substrate, a package, first conductors and second conductors. The substrate includes a first surface and a second surface opposite to the first surface. The package is disposed over the substrate. The first conductors are disposed over the substrate. The second conductors are disposed over the substrate, wherein the first conductors and the second conductors are substantially at a same tier, and a width of the second conductor is larger than a width of the first conductor.
    Type: Application
    Filed: August 28, 2017
    Publication date: February 28, 2019
    Inventors: KUAN-YU HUANG, TZU-KAI LAN, SHOU-CHIH YIN, SHU-CHIA HSU, PAI-YUAN LI, SUNG-HUI HUANG, HSIANG-FAN LEE, YING-SHIN HAN
  • Publication number: 20190006256
    Abstract: In order to prevent cracks from occurring at the corners of semiconductor dies after the semiconductor dies have been bonded to other substrates, an opening is formed adjacent to the corners of the semiconductor dies, and the openings are filled and overfilled with a buffer material that has physical properties that are between the physical properties of the semiconductor die and an underfill material that is placed adjacent to the buffer material.
    Type: Application
    Filed: January 12, 2018
    Publication date: January 3, 2019
    Inventors: Kuan-Yu Huang, Chih-Wei Wu, Li-Chung Kuo, Long Hua Lee, Sung-Hui Huang, Ying-Ching Shih, Pai Yuan Li
  • Publication number: 20180350754
    Abstract: A package includes a package component, a device die over and bonded to the package component, a metal cap having a top portion over the device die, and a thermal interface material between and contacting the device die and the metal cap. The thermal interface material includes a first portion directly over an inner portion of the device die, and a second portion extending directly over a corner region of the device die. The first portion has a first thickness. The second portion has a second thickness greater than the first thickness.
    Type: Application
    Filed: May 31, 2017
    Publication date: December 6, 2018
    Inventors: Sung-Hui Huang, Da-Cyuan Yu, Kuan-Yu Huang, Pai Yuan Li, Hsiang-Fan Lee
  • Publication number: 20180350755
    Abstract: A package includes a package component, a device die over and bonded to the package component, a metal cap having a top portion over the device die, and a thermal interface material between and contacting the device die and the metal cap. The thermal interface material includes a first portion directly over an inner portion of the device die, and a second portion extending directly over a corner region of the device die. The first portion has a first thickness. The second portion has a second thickness greater than the first thickness.
    Type: Application
    Filed: July 30, 2018
    Publication date: December 6, 2018
    Inventors: Sung-Hui Huang, Da-Cyuan Yu, Kuan-Yu Huang, Pai Yuan Li, Hsiang-Fan Lee