Abstract: A method is provided for enabling a function on an electronic device (110, 210, 410) comprising a touch input device (112, 116, 212, 218, 312, 424, 432) including a plurality of pixels having a surface (316) for providing radiated energy having one or more spectral bands, and a plurality of photosensors (340), at least one each of the photosensors (340) being incorporated within each of the pixels. The method comprises, during functional (normal) use of the electronic device by a user, sensing (512) a portion of a touch input device (112, 116, 212, 218, 312, 424, 432) touched by the user's skin, applying (514) radiant energy to the skin from only that portion of the touch input device (112, 116, 212, 218, 312, 424, 432) touched, and collecting (516), by the plurality of photosensors (340), radiant energy reflected from the skin.

Abstract: A method is provided for forming a monolithically integrated optical filter, for example, a Fabry-Perot filter, over a substrate (10). The method comprises forming a first mirror (16) over the substrate (10). A plurality of etalon material layers (32, 34, 36, 38) are formed over the mirror (16), and a plurality of etch stop layers (42, 44, 46) are formed, one each between adjacent etalon material layers (32, 34, 36, 38). A photoresist is patterned to create an opening (54) over the top etalon material layer (38) and an etch (56) is performed down to the top etch stop layer (46). An oxygen plasma (58) may be applied to convert the etch stop layer (46) within the opening (54) to silicon dioxide (57). The photoresist patterning, etching, and applying of an oxygen plasma may be repeated as desired to obtain the desired number of levels (82, 84, 86, 88). A second mirror (72) is then formed on each of the levels (82, 84, 86, 88).

Abstract: An exemplary system and method for providing an integrated photosensing element suitably adapted for use in CMOS imaging applications is disclosed as comprising inter alia: a processed CMOS host wafer (460) bonded with a monocrystalline, optically active donor wafer (300); a photosensing element (390) integrated in said optically active donor wafer (300) having an interconnect via (505, 495, 485) substantially decoupled from the photosensing element (390), wherein the host (460) and donor (300) wafers are bonded through the optically active material in a region disposed near a metalization surface (450, 455, 445) of the CMOS layer (460) in order to allow fabrication of the interconnect (505, 495, 485). Disclosed features and specifications may be variously controlled, configured, adapted or otherwise optionally modified to further improve or otherwise optimize photosensing performance or other material characteristics.

Abstract: A system and method of monitoring plant conditions is disclosed where an optical element is enabled to collect incident light reflected from a plant, an optical bandpass filter is enabled to eliminate wavelengths of the incident light outside a plurality of desired spectral bands, and a spectrum capture element is enabled to capture the plurality of desired spectral bands, wherein the optical element, the optical bandpass filter, and the spectrum capture element operate to monitor plant conditions.

Abstract: An exemplary system and method for providing an integrated photosensing element suitably adapted for use in CMOS imaging applications is disclosed as comprising inter alia: a processed CMOS host wafer (460) bonded with a monocrystalline, optically active donor wafer (300); a photosensing element (390) integrated in said optically active donor wafer (300) having an interconnect via (505, 495, 485) substantially decoupled from the photosensing element (390), wherein the host (460) and donor (300) wafers are bonded through the optically active material in a region disposed near a metalization surface (450, 455, 445) of the CMOS layer (460) in order to allow fabrication of the interconnect (505, 495, 485). Disclosed features and specifications may be variously controlled, configured, adapted or otherwise optionally modified to further improve or otherwise optimize photosensing performance or other material characteristics.

Abstract: The transceivers of the present invention use orthogonal coupling, i.e., perpendicular to the substrate, for a single fiber implementation of a transceiver incorporating both a VCSEL and a detector. The methods of the present invention include aligning and bonding a substrate wafer to a coupling wafer, prior to dicing the resultant compound wafer.

Abstract: An exemplary system and method for providing a vertically integrated photosensing element suitably adapted for use in CMOS imaging applications is disclosed as comprising inter alia: a processed CMOS layer (420); and a photosensing element (380) fabricated in a vertically integrated optically active layer (320, 350), where the optically active layer (320, 350) is bonded to the CMOS layer (420) and the optically active layer (320, 350) is positioned near a metalization surface (405) of the CMOS layer (420). Disclosed features and specifications may be variously controlled, configured, adapted or otherwise optionally modified to further improve or otherwise optimize photosensing performance or other material characteristics.

Abstract: An exemplary system and method for providing a vertically integrated photosensing element suitably adapted for use in CMOS imaging applications is disclosed as comprising inter alia: a processed CMOS layer (420); and a photosensing element (380) fabricated in a vertically integrated optically active layer (320, 350), where the optically active layer (320, 350) is bonded to the CMOS layer (420) and the optically active layer (320, 350) is positioned near a metalization surface (405) of the CMOS layer (420). Disclosed features and specifications may be variously controlled, configured, adapted or otherwise optionally modified to further improve or otherwise optimize photosensing performance or other material characteristics.

Abstract: The transceivers of the present invention use orthogonal coupling, i.e., perpendicular to the substrate, for a single fiber implementation of a transceiver incorporating both a VCSEL and a detector. The methods of the present invention include aligning and bonding a substrate wafer to a coupling wafer, prior to dicing the resultant compound wafer.

Abstract: A method of fabricating an LED array including epitaxially and sequentially growing a conductive layer on a substrate, a first carrier confinement layer, an active layer, a second carrier confinement layer and a conductive cap. Selectively etching the cap to provide exposed surface areas defining row and column areas with a matrix of diodes positioned in rows and columns therebetween. Implanting a first impurity in the row areas to form vertical conductors extending through the second confinement, active and first confinement layers to provide surface contacts to each diode. Implanting a second impurity in the row and column areas through the second confinement and active layers to form an isolating resistive volume around each diode. Implanting a third impurity in the row areas through the second confinement, active, and first confinement layers and into the substrate to form an isolating resistive volume between each row of diodes.

Abstract: A high density LED array with semiconductor interconnects includes a plurality of layers of material stacked on a substrate including a conductive layer, a first carrier confinement layer, an active layer, and a second carrier confinement layer. The layers are separated into isolated LEDs in a matrix of rows and columns with the conductive layer connecting a first electrode of each LED in a column to a first electrode of each other LED in the column. Row conductors connect a second electrode of each LED in a row to a second electrode of each other LED in the row and column conductors are connected to the conductive layer of each column.

Abstract: A method of fabricating an LED array including epitaxially and sequentially growing a conductive layer on a substrate, a first carrier confinement layer, an active layer, a second carrier confinement layer and a conductive cap. Selectively etching the cap to provide exposed surface areas defining row and column areas with a matrix of diodes positioned in rows and columns therebetween. Implanting a first impurity in the row areas to form vertical conductors extending through the second confinement, active and first confinement layers to provide surface contacts to each diode. Implanting a second impurity in the row and column areas through the second confinement and active layers to form an isolating resistive volume around each diode. Implanting a third impurity in the row areas through the second confinement, active, and first confinement layers and into the substrate to form an isolating resistive volume between each row of diodes.

Abstract: A high density LED array with semiconductor interconnects includes a plurality of layers of material stacked on a substrate including a conductive layer, a first carrier confinement layer, an active layer, and a second carrier confinement layer. The layers are separated into isolated LEDs in a matrix of rows and columns with the conductive layer connecting a first electrode of each LED in a column to a first electrode of each other LED in the column. Row conductors connect a second electrode of each LED in a row to a second electrode of each other LED in the row and column conductors are connected to the conductive layer of each column.

Abstract: A modulation doped field effect transistor (10) is formed to have a drain (28, 12, 11) that is vertically displaced from the source (16, 17) and channel (20, 21) regions. The transistor (10) has the source (16, 17), channel (20, 21) and a portion of the drain (28) arranged laterally so that current (27) flows from the source (16, 17) laterally to the drain (28, 12, 11). A heterojunction layer (18) on the channel region (20, 21) facilitates forming a two dimensional electron gas in the channel (20, 21) region which provides the transistor (10) with a high transconductance.