Patents by Inventor Pan Li

Pan Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11335714
    Abstract: The present disclosure provides a display substrate and a display device. A display substrate provided by an embodiment of the present disclosure includes: a display region and a peripheral region surrounding the display region; the display region includes: a plurality of gate lines, a plurality of data lines, and a plurality of pixel units, and each of the plurality of pixel units includes a driving transistor and a pixel electrode that are connected to each other; the peripheral region includes: signal lines and at least one electrostatic discharge structure for performing electrostatic discharge on the signal lines.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: May 17, 2022
    Assignees: Beijing BOE Technology Development Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Pan Li, Xinyin Wu, Yong Qiao
  • Patent number: 11327378
    Abstract: An array substrate includes a base substrate, a plurality of gate lines extending in a row direction on the base substrate, a plurality of data lines extending in a column direction intersecting the row direction on the base substrate, and a plurality of pixel groups in rows and columns, each including two sub-pixels side by side in the row direction. Each of the rows of pixel groups is connected to two respective ones of the gate lines, and the two sub-pixels of each pixel group in the row of pixel groups are respectively connected to different ones of the two respective gate lines. The data lines and the columns of pixel groups are alternately arranged in the row direction, and the two sub-pixels of each of the plurality of pixel groups are connected to a corresponding one of the plurality of data lines directly adjacent to the pixel group.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: May 10, 2022
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Hongfei Cheng, Pan Li
  • Publication number: 20220123028
    Abstract: The present disclosure provides an array substrate, a manufacturing method thereof, and a display device. The array substrate includes a base substrate, and a first functional layer and a second functional layer laminated one on another on the base substrate. The first functional layer forms a level-different region on the base substrate, and the second functional layer covers the level-different region. A portion of the first functional layer at the level-different region is provided with a target gradient angle, the target gradient angle is a maximum gradient angle when the second functional layer has a predetermined thickness, and the predetermined thickness is a thickness when a functional requirement of the second functional layer has been met and the second functional layer is not broken at the level-different region.
    Type: Application
    Filed: July 21, 2020
    Publication date: April 21, 2022
    Applicants: BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Pan LI, Jianbo XIAN, Chunping LONG
  • Patent number: 11276714
    Abstract: The present disclosure relates to an array substrate that includes a first metal layer, an insulating layer, and a second metal layer. The first metal layer includes at least one first wire. The first wire has an overlapping section and a connecting section connected to both ends of the overlapping section, and an extending direction of the overlapping section is different from an extending direction of the connecting section. The insulating layer covers the first metal layer, and the region of the insulating layer corresponding to the first wire is a convex ridge protruding in a direction away from the first metal layer. The second metal layer is provided on a side of the insulating layer facing away from the first metal layer and includes at least one second wire that intersects the convex ridge in the area of the convex ridge corresponding to the overlapping section.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: March 15, 2022
    Assignees: Beijing BOE Technology Development Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Pan Li, Xinyin Wu
  • Patent number: 11276713
    Abstract: Arrangements disclosed in the present disclosure provide an array substrate, a manufacturing, a display panel and a display device. The array substrate comprises: a first signal line comprising a first extension portion along a first direction and a first connection portion along a second direction, which is provided with via holes; a second signal line comprising a second extension portion and a second connection portion along the second direction, which is provided with via holes; and a conductive connection layer, configured to connect the first signal line and the second signal line through the via holes of the first connection portion and second connection portion. The first connection portion and the second connection portion are lined up in a direction perpendicular to the second direction.
    Type: Grant
    Filed: April 4, 2019
    Date of Patent: March 15, 2022
    Assignees: Beijing BOE Technology Development Co., Ltd., BOE Technology Group Co, , Ltd.
    Inventors: Pan Li, Yong Qiao
  • Publication number: 20220052138
    Abstract: An array substrate is provided. The array substrate includes a plurality of pixel drive circuits. The plurality of pixel drive circuits include a first pixel drive circuit and a second pixel drive circuit that are adjacent to each other. The first electrode plate of the first pixel drive circuit and the pixel electrode of the second pixel drive circuit are laminated in an overlapping region and isolated by the insulating layer.
    Type: Application
    Filed: July 30, 2020
    Publication date: February 17, 2022
    Inventors: Pan Li, Xueguang Hao, Yongda Ma
  • Patent number: 11249351
    Abstract: Embodiments of the present disclosure provide an array substrate and a display device. The array substrate includes a plurality of gate lines and a plurality of data lines, the plurality of gate lines and the plurality of data lines crossing one another to bound pixel units and the pixel unites each including a pixel electrode and a thin film transistor, which includes a drain electrode, the array substrate further includes a common electrode line, the drain electrode includes an extension portion and the common electrode line and the extension portion form a light blocking structure together such that an orthographic projection of the light blocking structure on a plane where the pixel electrode is located is located near an edge of the pixel electrode. The array substrate provided by the present disclosure is applied to a display device.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: February 15, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jianbo Xian, Pan Li, Yong Qiao, Xinyin Wu, Jian Xu
  • Publication number: 20220036822
    Abstract: A pixel driving circuit, an array substrate and a display device are provided. The pixel driving circuit includes a first interlayer dielectric layer and a second interlayer dielectric layer. The first interlayer dielectric layer is arranged on the side of a gate layer lead away from a base substrate and is formed with a first via hole exposing the gate layer lead. The second interlayer dielectric layer is arranged on the side of the first interlayer dielectric layer away from the base substrate and is formed with a second via hole exposing the first via hole. A source drain layer lead is arranged on the side of the second interlayer dielectric layer away from the base substrate and is electrically connected to the gate layer lead through the first via hole and the second via hole.
    Type: Application
    Filed: July 30, 2020
    Publication date: February 3, 2022
    Inventors: Pan Li, Xueguang Hao, Chen Xu
  • Patent number: 11233320
    Abstract: An antenna structure and a communication device are provided. The antenna structure includes a first base substrate, a second base substrate, a dielectric layer disposed between the first base substrate and the second base substrate, and a plurality of first electrodes disposed on a side of the first base substrate close to the dielectric layer and being spaced apart from another. The antenna structure further includes at least one first buffer block disposed between the first electrodes and the first base substrate, the first buffer block is at least partially and directly contacted with the first electrodes.
    Type: Grant
    Filed: November 9, 2017
    Date of Patent: January 25, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yongchun Lu, Xinyin Wu, Pan Li, Jian Xu
  • Patent number: 11221524
    Abstract: The present application discloses an array substrate, a display panel and a display device. The array substrate comprises: a plurality of data lines and a plurality of gate lines, a plurality of pixel units defined by the plurality of data lines and the plurality of gate lines, each pixel unit comprising a first pixel electrode, a second pixel electrode, and at least three thin film transistors, the pixel unit further comprising: a charge-discharge element, the charge-discharge element and a third thin film transistor in the at least three thin film transistors charging and discharging the pixel unit such that the pixel unit forms a first voltage region and a second voltage region with different voltages.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: January 11, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Wenbo Li, Xinyin Wu, Pan Li, Hongfei Cheng, Jianbo Xian
  • Patent number: 11219143
    Abstract: The present disclosure provides a control unit of display device and a display device. The control unit of display device includes: a back plate a plurality of circuit structures, the plurality of circuit structures being arranged on the back plate; a plurality of electric field shielding structures, each of the electric field shielding structures being arranged between the circuit structures and configured to shield an electric field between the circuit structures, wherein each of the electric field shielding structures includes a plurality of shielding strips, the plurality of shielding strips are spaced apart from each other and projections of the shielding strips on a corresponding side of the circuit structure are continuous and uninterrupted.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: January 4, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yongda Ma, Pan Li, Yong Qiao
  • Patent number: 11209702
    Abstract: The present application discloses an array substrate, a display panel and a display device. The array substrate comprises: a plurality of data lines and a plurality of gate lines, a plurality of pixel units defined by the plurality of data lines and the plurality of gate lines, each pixel unit comprising a first pixel electrode, a second pixel electrode, and at least three thin film transistors, the pixel unit further comprising: a charge-discharge element, the charge-discharge element and a third thin film transistor in the at least three thin film transistors charging and discharging the pixel unit such that the pixel unit forms a first voltage region and a second voltage region with different voltages.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: December 28, 2021
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Wenbo Li, Xinyin Wu, Pan Li, Hongfei Cheng, Jianbo Xian
  • Publication number: 20210395786
    Abstract: The present application relates to a method of producing drimenol and/or drimenol derivatives by comprising contacting at least one polypeptide with farnesyl diphosphate (FPP). The method may be performed in vitro or in vivo. Also provided are amino acid sequences of polypeptides useful in the methods and nucleic acids encoding the polypeptides described. The method further provides host cells or organisms genetically modified to express the polypeptides and useful to produce drimenol and/or derivatives of drimenol.
    Type: Application
    Filed: August 20, 2021
    Publication date: December 23, 2021
    Inventors: Pan Li, Qi Wang, Xiu-Feng He, Olivier Haefliger
  • Patent number: 11189648
    Abstract: This disclosure relates to an array substrate and a display device. The array substrate includes a display area and a lead area, the display area including a plurality of signal lines, and the lead area including fanout lines connected with the signal lines, wherein the lead area further includes capacitance adjustment sections non-electrically connected with at least one of the fanout lines, the capacitance adjustment sections are at a layer different from a layer where at least one of the fanout lines is.
    Type: Grant
    Filed: September 14, 2018
    Date of Patent: November 30, 2021
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Pan Li, Hongfei Cheng, Xinyin Wu
  • Publication number: 20210366947
    Abstract: Disclosed are an array substrate and a display device. The array substrate includes: a plurality of sub-pixel elements in an array, wherein each row of sub-pixel elements includes a common electrode; the common electrode includes a plurality of sub-common electrodes, each of which corresponds to one of the sub-pixel elements; the sub-common electrode includes a body connection section, a plurality of comb teeth connected with the body connection section, and a shielding section connected with the body connection section, wherein the first comb teeth and the shielding section are on the same side of the body connection section, and the shielding section is on the outermost side of the first comb teeth; and the body connection sections of two adjacent sub-common electrodes in the common electrode are on two opposite sides. The body connection sections of two adjacent sub-common electrodes in each common electrode are arranged on two opposite sides.
    Type: Application
    Filed: August 10, 2018
    Publication date: November 25, 2021
    Inventors: Pan LI, Xinyin WU, Yong QIAO
  • Publication number: 20210358431
    Abstract: An array substrate, and a driving method and driving device thereof, in the field of display technology. A display device includes an array substrate, including a plurality of pixel units. Each pixel unit includes a first sub-pixel and a second sub-pixel of the same color, the first sub-pixel includes a first pixel electrode (061) and a first common electrode (081), and the second sub-pixel includes a second pixel electrode (062) and a second common electrode (082). In a first stage, a voltage between the first pixel electrode (061) and the first common electrode (081) is greater than a voltage between the second pixel electrode (062) and the second common electrode (082), which optimizes and solves the problem of low fineness of the display picture, and improves the fineness of the display picture.
    Type: Application
    Filed: October 23, 2018
    Publication date: November 18, 2021
    Inventors: Pan Li, Yongda Ma
  • Publication number: 20210325713
    Abstract: The present disclosure provides a display panel and a display device. The display panel includes: a first substrate; a second substrate in a superposed arrangement with the first substrate; and an auxiliary retaining wall located between the first and second substrates in an edge area of a facing portion of the first and second substrates. The auxiliary retaining wall includes a first retaining wall having a first sub-portion and a second sub-portion disposed opposite to each other, the second substrate comprises a bonding area outside of and adjoined by the facing portion, and the first and second sub-portions are located in areas corresponding to two opposite edges adjacent to an edge where the bonding area is located, respectively.
    Type: Application
    Filed: September 19, 2018
    Publication date: October 21, 2021
    Inventors: Hui LI, Hongfei CHENG, Pan LI
  • Patent number: 11131599
    Abstract: A sensing mechanism of a two-dimensional airfoil model, which includes pressure sensor groups, multiple first tubes, the second tube, and a cavity. The pressure sensor groups are vertically fixed to mounting holes in the surface of the two-dimensional airfoil model. The pressure measurement surface of each pressure sensor is vertical to the surface of the two-dimensional airfoil model. Multiple mounting holes are opened in and vertical to the surface of the two-dimensional airfoil model. The cavity is fixed to the interior of the two-dimensional airfoil model. The reference pressure end of each pressure sensor is connected to the cavity through the first tube, the multiple pressure sensors of the pressure sensor groups are in one-to-one correspondence with the multiple first tubes. The cavity is connected with the first end of the second tube. The second end of the second tube is located in the air outside the two-dimensional airfoil model.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: September 28, 2021
    Assignee: Nanjing University of Aeronautics and Astronautics
    Inventors: Weihong Kong, Mingzhi Liu, Pan Li, Yongjie Shi, Renliang Chen
  • Patent number: 11124807
    Abstract: Described herein is a method of producing drimenol and/or drimenol derivatives, the method including contacting at least one polypeptide with farnesyl diphosphate (FPP). The method may be performed in vitro or in vivo. Also described herein are amino acid sequences of polypeptides useful in the methods and nucleic acids encoding the polypeptides described. Also described herein are host cells or organisms genetically modified to express the polypeptides and useful to produce drimenol and/or derivatives of drimenol.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: September 21, 2021
    Assignee: Firmenich SA
    Inventors: Pan Li, Qi Wang, Xiu-Feng He, Olivier Haefliger
  • Patent number: 11118988
    Abstract: A method for calculating an earth pressure load on a tunnel includes the following steps: (1) taking interaction between external soil and a tunnel structure in an actual operation condition as an earth pressure load acting on the tunnel structure; (2) establishing a physical model for the tunnel structure; (3) designing, on the basis of the physical model for the tunnel structure, a plurality of structural loads in different operation conditions to obtain a plurality of different structural deformations; and (4) drawing an inference according Betti's theorem, and establishing a physical model for an original structure, such that a load on the original structure, namely an earth pressure load on the tunnel, can be directly calculated according to a load-deformation relationship of the physical model and deformation of the original structure. The above method can determine distribution and size of an actual earth pressure load on a tunnel.
    Type: Grant
    Filed: November 12, 2016
    Date of Patent: September 14, 2021
    Assignee: SOOCHOW UNIVERSITY
    Inventor: Pan Li