Patents by Inventor Patrick Guo Qiang Lo

Patrick Guo Qiang Lo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10133145
    Abstract: According to embodiments of the present invention, an optical device is provided. The optical device includes a waveguide structure including a floating gate, and an optical waveguide arranged spaced apart from the floating gate, wherein the optical waveguide overlaps with the floating gate, a carrier injection portion arranged spaced apart from the floating gate, and an electrode arrangement, wherein, in response to a first voltage difference applied to the electrode arrangement, the optical device is configured to inject charge carriers from the carrier injection portion to the floating gate to cause a change in refractive index of the waveguide structure, and wherein, in response to a second voltage difference applied to the electrode arrangement, the optical device is configured to drive the charge carriers from the floating gate to the optical waveguide to deplete the charge carriers.
    Type: Grant
    Filed: January 11, 2016
    Date of Patent: November 20, 2018
    Assignee: Agency for Science, Technology and Research
    Inventors: Junfeng Song, Xianshu Luo, Patrick Guo-Qiang Lo
  • Patent number: 9915787
    Abstract: According to embodiments of the present invention, an optical coupling device is provided. The optical coupling device includes a substrate, and a grating arrangement including a plurality of grating elements, the plurality of grating elements being defined on one surface of the substrate, wherein the plurality of grating elements are arranged to have a first period along a first direction, and a second period along a second direction orthogonal to the first direction, the first period being different from the second period. According to further embodiments of the present invention, a photonic integrated circuit and a method of forming an optical coupling device are also provided.
    Type: Grant
    Filed: September 17, 2014
    Date of Patent: March 13, 2018
    Assignee: Agency for Science, Technology and Research
    Inventors: Chao Li, Patrick Guo-Qiang Lo
  • Patent number: 9917127
    Abstract: According to embodiments of the present invention, a pixel arrangement is provided. The pixel arrangement includes a plurality of pixels arranged adjacent to each other; and a substrate configured to receive the plurality of pixels, wherein each pixel of the plurality of pixels comprises a plurality of optical cells electrically coupled to each other; and an electrical interconnection electrically isolated from the plurality of optical cells, the electrical interconnection arranged to provide electrical communication between two separate conducting terminals external to the pixel.
    Type: Grant
    Filed: June 9, 2015
    Date of Patent: March 13, 2018
    Assignee: Agency for Science, Technology and Research
    Inventors: Fei Sun, Patrick Guo-Qiang Lo
  • Publication number: 20170371226
    Abstract: According to embodiments of the present invention, an optical device is provided. The optical device includes a waveguide structure including a floating gate, and an optical waveguide arranged spaced apart from the floating gate, wherein the optical waveguide overlaps with the floating gate, a carrier injection portion arranged spaced apart from the floating gate, and an electrode arrangement, wherein, in response to a first voltage difference applied to the electrode arrangement, the optical device is configured to inject charge carriers from the carrier injection portion to the floating gate to cause a change in refractive index of the waveguide structure, and wherein, in response to a second voltage difference applied to the electrode arrangement, the optical device is configured to drive the charge carriers from the floating gate to the optical waveguide to deplete the charge carriers.
    Type: Application
    Filed: January 11, 2016
    Publication date: December 28, 2017
    Inventors: Junfeng Song, Xianshu Luo, Patrick Guo-Qiang Lo
  • Patent number: 9666688
    Abstract: A semiconductor device production method includes a first step of forming a planar silicon layer on a silicon substrate and forming first and second pillar-shaped silicon layers on the planar silicon layer; a second step of forming a gate insulating film around the first and second pillar-shaped silicon layers, forming a metal film and a polysilicon film around the gate insulating film, controlling a thickness of the polysilicon film to be smaller than a half of a distance between the first and second pillar-shaped silicon layers, depositing a resist, exposing the polysilicon film on side walls of upper portions of the first and second pillar-shaped semiconductor layers, etching-away the exposed polysilicon film, stripping the third resist, and etching-away the metal film; and a third step of forming a resist for forming a gate line and performing anisotropic etching to form a gate line and first and second gate electrodes.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: May 30, 2017
    Assignee: UNISANTIS ELECTRONICS SINGAPORE PTE. LTD.
    Inventors: Fujio Masuoka, Nozomu Harada, Hiroki Nakamura, Yisuo Li, Aashit Ramachandra Kamath, Zhixian Chen, Teng Soong Phua, Xinpeng Wang, Patrick Guo-Qiang Lo
  • Publication number: 20170117317
    Abstract: According to embodiments of the present invention, a pixel arrangement is provided. The pixel arrangement includes a plurality of pixels arranged adjacent to each other; and a substrate configured to receive the plurality of pixels, wherein each pixel of the plurality of pixels comprises a plurality of optical cells electrically coupled to each other; and an electrical interconnection electrically isolated from the plurality of optical cells, the electrical interconnection arranged to provide electrical communication between two separate conducting terminals external to the pixel.
    Type: Application
    Filed: June 9, 2015
    Publication date: April 27, 2017
    Inventors: Fei Sun, Patrick Guo-Qiang Lo
  • Publication number: 20170075073
    Abstract: According to embodiments of the present invention, an optical coupling device is provided. The optical coupling device includes a substrate, and a grating arrangement including a plurality of grating elements, the plurality of grating elements being defined on one surface of the substrate, wherein the plurality of grating elements are arranged to have a first period along a first direction, and a second period along a second direction orthogonal to the first direction, the first period being different from the second period. According to further embodiments of the present invention, a photonic integrated circuit and a method of forming an optical coupling device are also provided.
    Type: Application
    Filed: September 17, 2014
    Publication date: March 16, 2017
    Inventors: Chao Li, Patrick Guo-Qiang Lo
  • Publication number: 20160380080
    Abstract: A semiconductor device production method includes a first step of forming a planar silicon layer on a silicon substrate and forming first and second pillar-shaped silicon layers on the planar silicon layer; a second step of forming a gate insulating film around the first and second pillar-shaped silicon layers, forming a metal film and a polysilicon film around the gate insulating film, controlling a thickness of the polysilicon film to be smaller than a half of a distance between the first and second pillar-shaped silicon layers, depositing a resist, exposing the polysilicon film on side walls of upper portions of the first and second pillar-shaped semiconductor layers, etching-away the exposed polysilicon film, stripping the third resist, and etching-away the metal film; and a third step of forming a resist for forming a gate line and performing anisotropic etching to form a gate line and first and second gate electrodes.
    Type: Application
    Filed: September 13, 2016
    Publication date: December 29, 2016
    Inventors: Fujio MASUOKA, Nozomu HARADA, Hiroki NAKAMURA, Yisuo LI, Aashit Ramachandra KAMATH, Zhixian CHEN, Teng Soong PHUA, Xinpeng WANG, Patrick Guo-Qiang LO
  • Patent number: 9490362
    Abstract: A semiconductor device production method includes a first step of forming a planar silicon layer on a silicon substrate and forming first and second pillar-shaped silicon layers on the planar silicon layer; a second step of forming a gate insulating film around the first and second pillar-shaped silicon layers, forming a metal film and a polysilicon film around the gate insulating film, controlling a thickness of the polysilicon film to be smaller than a half of a distance between the first and second pillar-shaped silicon layers, depositing a resist, exposing the polysilicon film on side walls of upper portions of the first and second pillar-shaped semiconductor layers, etching-away the exposed polysilicon film, stripping the third resist, and etching-away the metal film; and a third step of forming a resist for forming a gate line and performing anisotropic etching to form a gate line and first and second gate electrodes.
    Type: Grant
    Filed: June 19, 2015
    Date of Patent: November 8, 2016
    Assignee: UNISANTIS ELECTRONICS SINGAPORE PTE. LTD.
    Inventors: Fujio Masuoka, Nozomu Harada, Hiroki Nakamura, Yisuo Li, Aashit Ramachandra Kamath, Zhixian Chen, Teng Soong Phua, Xinpeng Wang, Patrick Guo-Qiang Lo
  • Patent number: 9425341
    Abstract: According to one aspect of the invention, there is provided a pin photodetector comprising a dopant diffusion barrier layer disposed within an active light absorbing region of the pin photodetector.
    Type: Grant
    Filed: October 8, 2013
    Date of Patent: August 23, 2016
    Assignee: Agency for Science, Technology and Research
    Inventors: Andy Eu-Jin Lim, Tsung-Yang Liow, Patrick Guo-Qiang Lo
  • Publication number: 20160202423
    Abstract: According to embodiments of the present invention, an optical coupling device is provided. The optical coupling device includes a substrate, and a grating arrangement including a plurality of grating elements, the plurality of grating elements being defined on one surface of the substrate, wherein the plurality of grating elements are arranged to have a first period along a first direction, and a second period along a second direction orthogonal to the first direction, the first period being different from the second period. According to further embodiments of the present invention, a photonic integrated circuit and a method of forming an optical coupling device are also provided.
    Type: Application
    Filed: September 17, 2014
    Publication date: July 14, 2016
    Inventors: Chao Li, Patrick Guo-Qiang Lo
  • Patent number: 9329415
    Abstract: According to embodiments of the present invention, a method for forming an optical modulator is provided. The method includes providing a substrate, implanting dopants of a first conductivity type into the substrate to form a first doped region, implanting dopants of a second conductivity type into the substrate to form a second doped region, wherein a portion of the second doped region is formed over and overlaps with a portion of the first doped region to form a junction between the respective portions of the first doped region and the second doped region, and wherein a remaining portion of the second doped region is located outside of the junction, and forming a ridge waveguide, wherein the ridge waveguide overlaps with at least a part of the junction.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: May 3, 2016
    Assignee: Agency for Science, Technology and Research
    Inventors: Jun-Feng Song, Xianshu Luo, Xiaoguang Tu, Patrick Guo-Qiang Lo, Mingbin Yu
  • Publication number: 20150287822
    Abstract: A semiconductor device production method includes a first step of forming a planar silicon layer on a silicon substrate and forming first and second pillar-shaped silicon layers on the planar silicon layer; a second step of forming a gate insulating film around the first and second pillar-shaped silicon layers, forming a metal film and a polysilicon film around the gate insulating film, controlling a thickness of the polysilicon film to be smaller than a half of a distance between the first and second pillar-shaped silicon layers, depositing a resist, exposing the polysilicon film on side walls of upper portions of the first and second pillar-shaped semiconductor layers, etching-away the exposed polysilicon film, stripping the third resist, and etching-away the metal film; and a third step of forming a resist for forming a gate line and performing anisotropic etching to form a gate line and first and second gate electrodes.
    Type: Application
    Filed: June 19, 2015
    Publication date: October 8, 2015
    Inventors: Fujio MASUOKA, Nozomu HARADA, Hiroki NAKAMURA, Yisuo LI, Aashit Ramachandra KAMATH, Zhixian CHEN, Teng Soong PHUA, Xinpeng WANG, Patrick Guo-Qiang LO
  • Patent number: 9136672
    Abstract: An optical light source is provided. The optical light source includes a waveguide including two reflectors arranged spaced apart from each other to define an optical cavity therebetween, an optical gain medium, and a coupling structure arranged to couple light between the optical cavity and the optical gain medium.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: September 15, 2015
    Assignee: Agency for Science, Technology and Research
    Inventors: Xianshu Luo, Junfeng Song, Haifeng Zhou, Tsung-Yang Liow, Mingbin Yu, Patrick Guo-Qiang Lo
  • Publication number: 20150255547
    Abstract: Structures for III-nitride GaN high electron mobility transistors (HEMT), method for fabricating for GaN devices and integrated chip-level power systems using the GaN devices are provided. The GaN HEMT structure includes a substrate, an AlGaN/GaN heterostructure grown on the substrate, and a normally-off GaN device fabricated on the AlGaN/GaN heterostructure. The AlGaN/GaN heterostructure includes a GaN buffer layer and an AlGaN barrier layer. The integrated chip-level power system includes a substrate, an AlGaN/GaN heterostructure layer grown on the substrate and a plurality of GaN devices. The AlGaN/GaN heterostructure layer includes a GaN buffer layer and an AlGaN barrier layer and is formed into mesa areas and valley areas. Each of the plurality of GaN devices are fabricated on a separate one of the mesa areas.
    Type: Application
    Filed: March 28, 2013
    Publication date: September 10, 2015
    Applicant: Agency for Science, Technology and Research
    Inventors: Li Yuan, Patrick Guo Qiang Lo, Haifeng Sun, Kean Boon Lee, Weizhu Wang, Susai Lawrence Selvaraj
  • Publication number: 20140167200
    Abstract: According to embodiments of the present invention, a photodetector is provided. The photodetector includes a substrate having a first side and a second side opposite to the first side, the substrate being adapted to receive light incident on the photodetector on the first side of the substrate, a plurality of cells formed in the substrate, and at least one trench defined by a first sidewall and a second sidewall, wherein a spacing between the first sidewall and the second sidewall increases in a direction from the first side of the substrate towards the second side, wherein a respective trench of the at least one trench is arranged in between adjacent cells of the plurality of cells. According to further embodiments of the present invention, a method for forming a photodetector is also provided.
    Type: Application
    Filed: December 19, 2013
    Publication date: June 19, 2014
    Applicant: Agency for Science, Technology and Research
    Inventors: Fei Sun, Ning Duan, Patrick Guo-Qiang Lo
  • Publication number: 20140159180
    Abstract: According to embodiments of the present invention, a semiconductor resistor structure is provided. The semiconductor resistor structure includes a substrate, a first region of a first conductivity type in the substrate, a second region of the first conductivity type in the substrate, the first region and the second region arranged one over the other, and an intermediate region of a second conductivity type in between the first region and the second region, wherein at least one gap is defined through the intermediate region and overlapping with the first region and the second region. According to further embodiments of the present invention, a semiconductor photomultiplier device is also provided.
    Type: Application
    Filed: December 6, 2013
    Publication date: June 12, 2014
    Inventors: Fei Sun, Ning Duan, Patrick Guo-Qiang Lo
  • Publication number: 20140153600
    Abstract: An optical light source is provided. The optical light source includes a waveguide including two reflectors arranged spaced apart from each other to define an optical cavity therebetween, an optical gain medium, and a coupling structure arranged to couple light between the optical cavity and the optical gain medium.
    Type: Application
    Filed: November 26, 2013
    Publication date: June 5, 2014
    Applicant: Agency for Science, Technology and Research
    Inventors: Xianshu LUO, Junfeng SONG, Haifeng ZHOU, Tsung-Yang LIOW, Mingbin YU, Patrick Guo-Qiang LO
  • Publication number: 20140138789
    Abstract: According to one aspect of the invention, there is provided a pin photodetector comprising a dopant diffusion barrier layer disposed within an active light absorbing region of the pin photodetector.
    Type: Application
    Filed: October 8, 2013
    Publication date: May 22, 2014
    Applicant: Agency for Science, Technology and Research
    Inventors: Andy Eu-Jin Lim, Tsung-Yang Liow, Patrick Guo-Qiang Lo
  • Publication number: 20140127842
    Abstract: According to embodiments of the present invention, a method for forming an optical modulator is provided. The method includes providing a substrate, implanting dopants of a first conductivity type into the substrate to form a first doped region, implanting dopants of a second conductivity type into the substrate to form a second doped region, wherein a portion of the second doped region is formed over and overlaps with a portion of the first doped region to form a junction between the respective portions of the first doped region and the second doped region, and wherein a remaining portion of the second doped region is located outside of the junction, and forming a ridge waveguide, wherein the ridge waveguide overlaps with at least a part of the junction.
    Type: Application
    Filed: November 5, 2013
    Publication date: May 8, 2014
    Applicant: Agency for Science, Technology and Research
    Inventors: Jun-Feng Song, Xianshu Luo, Xiaoguang Tu, Patrick Guo-Qiang Lo, Mingbin Yu