Abstract: According to embodiments of the present invention, a semiconductor resistor structure is provided. The semiconductor resistor structure includes a substrate, a first region of a first conductivity type in the substrate, a second region of the first conductivity type in the substrate, the first region and the second region arranged one over the other, and an intermediate region of a second conductivity type in between the first region and the second region, wherein at least one gap is defined through the intermediate region and overlapping with the first region and the second region. According to further embodiments of the present invention, a semiconductor photomultiplier device is also provided.

Abstract: An optical light source is provided. The optical light source includes a waveguide including two reflectors arranged spaced apart from each other to define an optical cavity therebetween, an optical gain medium, and a coupling structure arranged to couple light between the optical cavity and the optical gain medium.

Abstract: According to one aspect of the invention, there is provided a pin photodetector comprising a dopant diffusion barrier layer disposed within an active light absorbing region of the pin photodetector.

Abstract: According to embodiments of the present invention, a method for forming an optical modulator is provided. The method includes providing a substrate, implanting dopants of a first conductivity type into the substrate to form a first doped region, implanting dopants of a second conductivity type into the substrate to form a second doped region, wherein a portion of the second doped region is formed over and overlaps with a portion of the first doped region to form a junction between the respective portions of the first doped region and the second doped region, and wherein a remaining portion of the second doped region is located outside of the junction, and forming a ridge waveguide, wherein the ridge waveguide overlaps with at least a part of the junction.

Abstract: A method is described to form a MOSFET with a fully silicided gate electrode and fully silicided, raised S/D elements that are nearly coplanar to allow a wider process margin when forming contacts to silicided regions. An insulator block layer is formed over STI regions and a conformal silicidation stop layer such as Ti/TiN is disposed on the insulator block layer and active region. A polysilicon layer is deposited on the silicidation stop layer and is planarized by a CMP process to form raised S/D elements. An oxide hardmask on the gate electrode is removed to produce a slight recess between the spacers. A silicidation process yields a gate electrode and raised S/D elements comprised of NiSi. Optionally, a recess is formed in the substrate between an insulator block mask and spacer and a Schottky barrier is used instead of a silicidation stop layer to form a Schottky Barrier MOSFET.

Abstract: A method is described to form a MOSFET with a fully silicided gate electrode and fully silicided, raised S/D elements that are nearly coplanar to allow a wider process margin when forming contacts to silicided regions. An insulator block layer is formed over STI regions and a conformal silicidation stop layer such as Ti/TiN is disposed on the insulator block layer and active region. A polysilicon layer is deposited on the silicidation stop layer and is planarized by a CMP process to form raised S/D elements. An oxide hardmask on the gate electrode is removed to produce a slight recess between the spacers. A silicidation process yields a gate electrode and raised S/D elements comprised of NiSi. Optionally, a recess is formed in the substrate between an insulator block mask and spacer and a Schottky barrier is used instead of a silicidation stop layer to form a Schottky Barrier MOSFET.