Abstract: A monolithic fuel delivery system for gasoline direct injection to an engine. The system has a common rail tube body from which injector sockets smoothly and seamlessly extend. Uninterrupted junctions are formed between the rail tube body and the injector sockets. The seamless junctions present a sealed relationship between the tube body and the injector sockets.

Abstract: A fuel rail assembly for gasoline direct injection fuel delivery to an engine. The assembly has a common rail tube. In the tube there are threaded orifices extending laterally. Injector sockets are adapted to mate with the threaded orifices. Each injector socket has a proximal nipple end region connected to the tube and a distal end region through which fuel is delivered to the engine. Screw threads are disposed around the proximal nipple end region. The screw threads include a lead thread that is received by the threaded orifices, thereby forming mechanical connections between the injector sockets and the tube that are adapted to withstand maximum pressures of fuel up to 5000 psi.

Abstract: A fuel rail assembly for gasoline direct injection fuel delivery to an engine. The assembly has a common rail tube. In the tube there are threaded orifices extending laterally. Injector sockets are adapted to mate with the threaded orifices. Each injector socket has a proximal nipple end region connected to the tube and a distal end region through which fuel is delivered to the engine. Screw threads are disposed around the proximal nipple end region. The screw threads include a lead thread that is received by the threaded orifices, thereby forming mechanical connections between the injector sockets and the tube that are adapted to withstand maximum pressures of fuel up tp 2900 psi.

Abstract: Fabrication of silicon thin film transistors (TFT) on low-temperature plastic substrates using a reflective coating so that inexpensive plastic substrates may be used in place of standard glass, quartz, and silicon wafer-based substrates. The TFT can be used in large area low cost electronics, such as flat panel displays and portable electronics such as video cameras, personal digital assistants, and cell phones.

Abstract: Fabrication of silicon thin film transistors (TFT) on low-temperature plastic substrates using a reflective coating so that inexpensive plastic substrates may be used in place of standard glass, quartz, and silicon wafer-based substrates. The TFT can be used in large area low cost electronics, such as flat panel displays and portable electronics such as video cameras, personal digital assistants, and cell phones.

Abstract: A process for formation of thin film transistors (TFTs) on plastic substrates replaces standard thin film transistor fabrication techniques, and uses sufficiently lower processing temperatures so that inexpensive plastic substrates may be used in place of standard glass, quartz, and silicon wafer-based substrates. The silicon based thin film transistor produced by the process includes a low temperature substrate incapable of withstanding sustained processing temperatures greater than about 250° C., an insulating layer on the substrate, a layer of silicon on the insulating layer having sections of doped silicon, undoped silicon, and poly-silicon, a gate dielectric layer on the layer of silicon, a layer of gate metal on the dielectric layer, a layer of oxide on sections of the layer of silicon and the layer of gate metal, and metal contacts on sections of the layer of silicon and layer of gate metal defining source, gate, and drain contacts, and interconnects.

Abstract: Fabrication of silicon thin film transistors (TFT) on low-temperature plastic substrates using a reflective coating so that inexpensive plastic substrates may be used in place of standard glass, quartz, and silicon wafer-based substrates. The TFT can be used in large area low cost electronics, such as flat panel displays and portable electronics such as video cameras, personal digital assistants, and cell phones.

Abstract: A modeling method to identify optimum laser parameters for pulsed laser annealing of implanted dopants into patterned semiconductor substrates is provided. The modeling method provides the optimum range of wavelength, pulse length, and pulse shape that fully anneals the implanted regions while preserving the form and function of ancillary structures. Improved material parameters for the modeling are identified. The modeling method is used to determine an experimental verification method that does not require a fully equipped laser processing station. The model and verification are used to specify an optimum laser system that satisfies the requirements of large area processing of silicon integrated circuits. An alexandrite laser operating between 700 nm and 810 nm with a pulse length of 5 ns to 20 nS is identified for implant anneal of shallow dopants in silicon.

Abstract: Electrical interconnects for solar cells or other electronic components using a silver-silicone paste or a lead-tin (Pb—Sn) no-clean fluxless solder cream, whereby the high breakage of thin (<6 mil thick) solar cells using conventional solder interconnect is eliminated. The interconnects of this invention employs copper strips which are secured to the solar cells by a silver-silicone conductive paste which can be used at room temperature, or by a Pb—Sn solder cream which eliminates undesired residue on the active surfaces of the solar cells. Electrical testing using the interconnects of this invention has shown that no degradation of the interconnects developed under high current testing, while providing a very low contact resistance value.

Abstract: A solar cell module lamination process using fluoropolymers to provide protection from adverse environmental conditions and thus enable more extended use of solar cells, particularly in space applications. A laminate of fluoropolymer material provides a hermetically sealed solar cell module structure that is flexible and very durable. The laminate is virtually chemically inert, highly transmissive in the visible spectrum, dimensionally stable at temperatures up to about 200° C. highly abrasion resistant, and exhibits very little ultra-violet degradation.

Abstract: A process for fabricating lightly-doped-drains (LDD) for short-channel metal oxide semiconductor (MOS) transistors. The process utilizes a pulsed laser process to incorporate the dopants, thus eliminating the prior oxide deposition and etching steps. During the process, the silicon in the source/drain region is melted by the laser energy. Impurities from the gas phase diffuse into the molten silicon to appropriately dope the source/drain regions. By controlling the energy of the laser, a lightly-doped-drain can be formed in one processing step. This is accomplished by first using a single high energy laser pulse to melt the silicon to a significant depth and thus the amount of dopants incorporated into the silicon is small. Furthermore, the dopants incorporated during this step diffuse to the edge of the MOS transistor gate structure. Next, many low energy laser pulses are used to heavily dope the source/drain silicon only in a very shallow region.

Abstract: A method which protects the region between a component and the substrate onto which the components is bonded using an electrically insulating fillet of photoresist. The fillet protects the regions from subsequent plating with metal and therefore shorting the plated conductors which run down the sides of the component and onto the substrate.

Abstract: Display pixels driven by silicon thin film transistors are fabricated on plastic substrates for use in active matrix displays, such as flat panel displays. The process for forming the pixels involves a prior method for forming individual silicon thin film transistors on low-temperature plastic substrates. Low-temperature substrates are generally considered as being incapable of withstanding sustained processing temperatures greater than about 200.degree. C. The pixel formation process results in a complete pixel and active matrix pixel array. A pixel (or picture element) in an active matrix display consists of a silicon thin film transistor (TFT) and a large electrode, which may control a liquid crystal light valve, an emissive material (such as a light emitting diode or LED), or some other light emitting or attenuating material. The pixels can be connected in arrays wherein rows of pixels contain common gate electrodes and columns of pixels contain common drain electrodes.

Abstract: A semiconductor doping process which enhances the dopant incorporation achievable using the Gas Immersion Laser Doping (GILD) technique. The enhanced doping is achieved by first depositing a thin layer of dopant atoms on a semiconductor surface followed by exposure to one or more pulses from either a laser or an ion-beam which melt a portion of the semiconductor to a desired depth, thus causing the dopant atoms to be incorporated into the molten region. After the molten region recrystallizes the dopant atoms are electrically active. The dopant atoms are deposited by plasma enhanced chemical vapor deposition (PECVD) or other known deposition techniques.

Abstract: Bright-polarizer-free, active-matrix liquid crystal displays (AMLCDs) are formed on plastic substrates. The primary components of the display are a pixel circuit fabricated on one plastic substrate, an intervening liquid-crystal material, and a counter electrode on a second plastic substrate. The-pixel circuit contains one or more thin-film transistors (TFTs) and either a transparent or reflective pixel electrode manufactured at sufficiently low temperatures to avoid damage to the plastic substrate. Fabrication of the TFTs can be carried out at temperatures less than 100.degree. C. The liquid crystal material is a commercially made nematic curvilinear aligned phase (NCAP) film. The counter electrode is comprised of a plastic substrate coated with a transparent conductor, such as indium-doped tin oxide (ITO). By coupling the active matrix with NCAP, a high-information content can be provided in a bright, fully plastic package.

Abstract: A process for formation of thin film transistors (TFTs) on plastic substrates replaces standard thin film transistor fabrication techniques, and uses sufficiently lower processing temperatures so that inexpensive plastic substrates may be used in place of standard glass, quartz, and silicon wafer-based substrates. The process relies on techniques for depositing semiconductors, dielectrics, and metals at low temperatures; crystallizing and doping semiconductor layers in the TFT with a pulsed energy source; and creating top-gate self-aligned as well as back-gate TFT structures. The process enables the fabrication of amorphous and polycrystalline channel silicon TFTs at temperatures sufficiently low to prevent damage to plastic substrates. The process has use in large area low cost electronics, such as flat panel displays and portable electronics.

Abstract: Electrical interconnects for solar cells or other electronic components using a silver-silicone paste or a lead-tin (Pb-Sn) no-clean fluxless solder cream, whereby the high breakage of thin (<6 mil thick) solar cells using conventional solder interconnect is eliminated. The interconnects of this invention employs copper strips which are secured to the solar cells by a silver-silicone conductive paste which can be used at room temperature, or by a Pb-Sn solder cream which eliminates undesired residue on the active surfaces of the solar cells. Electrical testing using the interconnects of this invention has shown that no degradation of the interconnects developed under high current testing, while providing a very low contact resistance value.

Abstract: A polycrystalline beta-silicon carbide film or coating and method for forming same on components, such as the top of solar cells, to act as an extremely hard protective surface, and as an anti-reflective coating. This is achieved by DC magnetron co-sputtering of amorphous silicon and carbon to form a SiC thin film onto a surface, such as a solar cell. The thin film is then irradiated by a pulsed energy source, such as an excimer laser, to synthesize the poly- or .mu.c-SiC film on the surface and produce .beta.--SiC. While the method of this invention has primary application in solar cell manufacturing, it has application wherever there is a requirement for an extremely hard surface.

Abstract: A semiconductor doping process which enhances the dopant incorporation achievable using the Gas Immersion Laser Doping (GILD) technique. The enhanced doping is achieved by first depositing a thin layer of dopant atoms on a semiconductor surface followed by exposure to one or more pulses from either a laser or an ion-beam which melt a portion of the semiconductor to a desired depth, thus causing the dopant atoms to be incorporated into the molten region. After the molten region recrystallizes the dopant atoms are electrically active. The dopant atoms are deposited by plasma enhanced chemical vapor deposition (PECVD) or other known deposition techniques.