Patents by Inventor Paul Nicholas

Paul Nicholas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220164127
    Abstract: A memory for an artificial neural network (ANN) accelerator is provided. The memory includes a first bank, a second bank and a bank selector. Each bank includes at least two word lines and a plurality of write word selectors. Each word line stores a plurality of words, and each word has a plurality of bytes. Each write word selector has an input port and a plurality of output ports, is coupled to a corresponding word in each word line, and is configured to select a byte of the corresponding word of a selected word line based on a byte select signal. The bank selector is coupled to the write word selectors of the first bank and the second bank, and configured to select a combination of write word selectors from at least one of the first bank and the second bank based on a bank select signal.
    Type: Application
    Filed: November 24, 2020
    Publication date: May 26, 2022
    Applicant: Arm Limited
    Inventors: Mudit Bhargava, Paul Nicholas Whatmough, Supreet Jeloka, Zhi-Gang Liu
  • Publication number: 20220147272
    Abstract: A method, computer program product and computer system are are provided. A processor receives a host input/output write operation, wherein the host input/output write operation includes host metadata regarding data represented by the host input/output write operation. The processor stores the host input/output write operation in one or more physical storage data units. A processor assigns a priority to the one or more physical storage data units. In response to receiving a host volume delete command associated with at least one of the one or more physical storage data units, a processor prioritizes data units of the host volume for deletion based, at least in part, on the assigned priority of the data units of the host volume, wherein data units with a lower priority are permanently deleted before data units with a higher priority.
    Type: Application
    Filed: November 12, 2020
    Publication date: May 12, 2022
    Inventors: Ben Sasson, Paul Nicholas Cashman, Gemma Izen
  • Patent number: 11321007
    Abstract: Storing data volumes in virtual and physical address spaces such that the data units are contiguous in virtual address space but fragmented in physical address space. The mapping between virtual and physical address space is managed by a storage controller that is configured to implement deletes reversibly with a so-called soft delete, the soft delete being reversible up to a later permanent or hard delete. A soft delete triggers a compaction in which the data units of the to-be-deleted volume are gathered together in physical address space. During the time between compaction and hard delete (or restore), the soft deleted volume is thus stored in a space efficient manner. Moreover, the subsequent hard delete can be performed more quickly than if the soft deleted volume were still fragmented across physical address space freeing up space quicker.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: May 3, 2022
    Assignee: International Business Machines Corporation
    Inventors: Paul Nicholas Cashman, Gemma Izen, Ben Sasson
  • Publication number: 20220101085
    Abstract: A non-volatile memory (NVM) crossbar for an artificial neural network (ANN) accelerator is provided. The NVM crossbar includes row signal lines configured to receive input analog voltage signals, multiply-and-accumulate (MAC) column signal lines, a correction column signal line, a MAC cell disposed at each row signal line and MAC column signal line intersection, and a correction cell disposed at each row signal line and correction column signal line intersection. Each MAC cell includes one or more programmable NVM elements programmed to an ANN unipolar weight, and each correction cell includes one or more programmable NVM elements. Each MAC column signal line generates a MAC signal based on the input analog voltage signals and the respective MAC cells, and the correction column signal line generates a correction signal based on the input analog voltage signals and the correction cells. Each MAC signal is corrected based on the correction signal.
    Type: Application
    Filed: September 29, 2020
    Publication date: March 31, 2022
    Applicant: Arm Limited
    Inventors: Fernando Garcia Redondo, Shidhartha Das, Paul Nicholas Whatmough, Glen Arnold Rosendale
  • Patent number: 11277195
    Abstract: An apparatus and method are described for providing enhanced network coverage in a wireless network. The apparatus has a first antenna system for providing a first sector of a network, and a second antenna system for providing a second sector of the network. Further, the apparatus has a third antenna system for communicating with a base station of the network to provide a common wireless backhaul link for the first sector and the second sector. The apparatus also comprises control circuitry to monitor a performance characteristic of the common wireless backhaul link, and in dependence on the performance characteristic, to implement at least one mechanism to influence whether items of user equipment within at least one of the first sector and the second sector connect to the network via the apparatus.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: March 15, 2022
    Assignee: AIRSPAN IP HOLDCO LLC
    Inventors: Paul Nicholas Senior, Masayoshi Son, Eric Donald Stonestrom
  • Publication number: 20220035556
    Abstract: Storing data volumes in virtual and physical address spaces such that the data units are contiguous in virtual address space but fragmented in physical address space. The mapping between virtual and physical address space is managed by a storage controller that is configured to implement deletes reversibly with a so-called soft delete, the soft delete being reversible up to a later permanent or hard delete. A soft delete triggers a compaction in which the data units of the to-be-deleted volume are gathered together in physical address space. During the time between compaction and hard delete (or restore), the soft deleted volume is thus stored in a space efficient manner. Moreover, the subsequent hard delete can be performed more quickly than if the soft deleted volume were still fragmented across physical address space freeing up space quicker.
    Type: Application
    Filed: July 29, 2020
    Publication date: February 3, 2022
    Inventors: Paul Nicholas Cashman, Gemma Izen, Ben Sasson
  • Publication number: 20220035890
    Abstract: A system and method for multiplying matrices are provided. The system includes a processor coupled to a memory and a matrix multiply accelerator (MMA) coupled to the processor. The MMA is configured to multiply, based on a bitmap, a compressed first matrix and a second matrix to generate an output matrix including, for each element i,j of the output matrix, calculate a dot product of an ith row of the compressed first matrix and a jth column of the second matrix based on the bitmap. Or, the MMA is configured to multiply, based on the bitmap, the second matrix and the compressed first matrix and to generate the output matrix including, for each element i,j of the output matrix, calculate a dot product of an ith row of the second matrix and a jth column of the compressed first matrix based on the bitmap.
    Type: Application
    Filed: November 24, 2020
    Publication date: February 3, 2022
    Applicant: Arm Limited
    Inventors: Zhi-Gang Liu, Paul Nicholas Whatmough, Matthew Mattina
  • Publication number: 20210390367
    Abstract: The present disclosure advantageously provides a matrix expansion unit that includes an input data selector, a first register set, a second register set, and an output data selector. The input data selector is configured to receive first matrix data in a columnwise format. The first register set is coupled to the input data selector, and includes a plurality of data selectors and a plurality of registers arranged in a first shift loop. The second register set is coupled to the data selector, and includes a plurality of data selectors and a plurality of registers arranged in a second shift loop. The output data selector is coupled to the first register set and the second register set, and is configured to output second matrix data in a rowwise format.
    Type: Application
    Filed: June 15, 2020
    Publication date: December 16, 2021
    Applicant: Arm Limited
    Inventors: Zhi-Gang Liu, Paul Nicholas Whatmough, Matthew Mattina
  • Publication number: 20210380076
    Abstract: A method of producing vehicles comprises: in a vehicle production process, manufacturing vehicle components of different types, and assembling the vehicle components to form vehicles; creating a set of vehicle records, each being a record of one of the vehicles entering active service; performing vehicle repairs on a subset of the vehicles after they have entered active service; creating a respective record of each of the vehicle repairs, each of which comprises or indicates a vehicle age or usage value, and records a vehicle component fault identified in the vehicle repair; receiving at a data processing stage the vehicle records and vehicle repair records, wherein a predictive algorithm executed at the data processing stage processes the received records so as to, for each type of vehicle component: 1) identify a respective set of the vehicle repair records relating to that type of vehicle component, and 2) use the respective set of vehicle repair records to predict a respective number of or resource value
    Type: Application
    Filed: August 12, 2021
    Publication date: December 9, 2021
    Inventors: James Gareth DAVIES, Anthony Peter GRIFFITHS, Christopher Lee DAVIES, Martyn Neil JONES, Stephen David NORRIS, Christopher George REED, Patrick James TUDOR, Timothy Peter DAVIS, David Hong Sau CHUNG, Michael Paul NICHOLAS, Kelly Marie NOCK, Jonathan Michael PHILLIPS, Ashley Steven Burgess, Nicholas Peter Rees, Steffan Rees
  • Patent number: 11194549
    Abstract: The present disclosure advantageously provides a system, matrix multiply accelerator (MMA) and method for efficiently multiplying matrices. The MMA includes a vector register to store the row vectors of one input matrix, a vector register to store the column vectors of another input matrix, a vector register to store an output matrix, and an array of vector multiply and accumulate (VMAC) units coupled to the vector registers. Each VMAC unit is coupled to at least two row vector signal lines and at least two column vector signal lines, and is configured to calculate the dot product for one element i,j of the output matrix by multiplying each row vector formed from the ith row of the first matrix with a corresponding column vector formed from the jth column of the second matrix to generate intermediate products, and accumulate the intermediate products into a scalar value.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: December 7, 2021
    Assignee: Arm Limited
    Inventors: Zhi-Gang Liu, Paul Nicholas Whatmough
  • Publication number: 20210374508
    Abstract: The present disclosure advantageously provides a pipelined accumulator that includes a data selector configured to receive a sequence of operands to be summed, an input register coupled to the data selector, an output register, coupled to the data selector, configured to store a sequence of partial sums and output a final sum, and a multi-stage add module coupled to the input register and the output register. The multi-stage add module is configured to store a sequence of partial sums and a final sum in a redundant format, and perform back-to-back accumulation into the output register.
    Type: Application
    Filed: May 28, 2020
    Publication date: December 2, 2021
    Applicant: Arm Limited
    Inventors: Paul Nicholas Whatmough, Zhi-Gang Liu, Matthew Mattina
  • Patent number: 11188814
    Abstract: A circuit and method are provided for performing convolutional neural network computations for a neural network. The circuit includes a transposing buffer configured to receive actuation feature vectors along a first dimension and to output feature component vectors along a second dimension, a weight buffer configured to store kernel weight vectors along a first dimension and further configured to output kernel component vectors along a second dimension, and a systolic array configured to receive the kernel weight vectors along a first dimension and to receive the feature component vectors along a second dimension. The systolic array includes an array of multiply and accumulate (MAC) processing cells. Each processing cell is associated with an output value. The actuation feature vectors may be shifted into the transposing buffer along the first dimension and output feature component vectors may shifted out of the transposing buffer along the second dimension, providing efficient dataflow.
    Type: Grant
    Filed: April 5, 2018
    Date of Patent: November 30, 2021
    Assignee: Arm Limited
    Inventors: Paul Nicholas Whatmough, Ian Rudolf Bratt, Matthew Mattina
  • Patent number: 11131402
    Abstract: A locking mechanism for a valve handle has a slider arranged to slide back and forth in a slot in the valve handle, between a lock position, in which the slider engages with a stop on the valve body and an unlock position, in which the slider does not engage with a stop. The slider is formed in two parts, which are inserted from opposite sides of the slot and snap fit together. The slider has indicia to indicate whether the slider is in the lock or unlock position, and the slider is arranged so as to cover the fastener which attaches the valve handle to the valve body.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: September 28, 2021
    Assignee: AALBERTS INTEGRATED PIPING SYSTEMS LIMITED
    Inventors: Paul Nicholas Whiteley, Steve Currid
  • Patent number: 11120101
    Abstract: The present disclosure advantageously provides a system method for efficiently multiplying matrices with elements that have a value of 0. A bitmap is generated for each matrix. Each bitmap includes a bit position for each matrix element. The value of each bit is set to 0 when the value of the corresponding matrix element is 0, and to 1 when the value of the corresponding matrix element is not 0. Each matrix is compressed into a compressed matrix, which will have fewer elements with a value of 0 than the original matrix. Each bitmap is then adjusted based on the corresponding compressed matrix. The compressed matrices are then multiplied to generate an output matrix. For each element i,j in the output matrix, a dot product of the ith row of the first compressed matrix and the jth column of the second compressed matrix is calculated based on the bitmaps.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: September 14, 2021
    Assignee: Arm Limited
    Inventors: Zhi-Gang Liu, Matthew Mattina, Paul Nicholas Whatmough
  • Patent number: 11117555
    Abstract: A method of producing vehicles comprises: in a vehicle production process, manufacturing vehicle components of different types, and assembling the vehicle components to form vehicles; creating a set of vehicle records, each being a record of one of the vehicles entering active service; performing vehicle repairs on a subset of the vehicles after they have entered active service; creating a respective record of each of the vehicle repairs, each of which comprises or indicates a vehicle age or usage value, and records a vehicle component fault identified in the vehicle repair; receiving at a data processing stage the vehicle records and vehicle repair records, wherein a predictive algorithm executed at the data processing stage processes the received records so as to, for each type of vehicle component: 1) identify a respective set of the vehicle repair records relating to that type of vehicle component, and 2) use the respective set of vehicle repair records to predict a respective number of or resource value
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: September 14, 2021
    Assignee: We Predict Limited
    Inventors: James Gareth Davies, Anthony Peter Griffiths, Christopher Lee Davies, Martyn Neil Jones, Stephen David Norris, Christopher George Reed, Patrick James Tudor, Timothy Peter Davis, David Hong Sau Chung, Michael Paul Nicholas, Kelly Marie Nock, Jonathan Michael Phillips, Ashley Steven Burgess, Nicholas Peter Rees, Steffan Rees
  • Publication number: 20210268317
    Abstract: There is disclosed a connection apparatus for connecting breathing gas delivery components of a breathing apparatus, comprising: a male connector configured to be received in a corresponding female port, the male connector comprising a perimeter wall defining an external shape of the male connector and enclosing a gas conduit. The perimeter wall comprises a distal portion defining a first cross-sectional area of the male connector, a proximal portion defining a second cross-sectional area of the male connector larger than the first cross-sectional area, and a tapered portion formed between the proximal portion and the distal portion.
    Type: Application
    Filed: June 24, 2019
    Publication date: September 2, 2021
    Inventors: Timothy MCKAY, Paul Nicholas TOWNSEND, Jason Edward ALLAN, Lee Kevin BRIMER, Evan HANNARD
  • Publication number: 20210268318
    Abstract: Disclosed herein are connection apparatus for connecting breathing gas delivery components of a breathing apparatus. The connection apparatus comprises a male connector configured to be received in a corresponding female port, the male connector comprising a perimeter wall defining an external shape of the male connector. In some examples, the male connector defines an insertion axis along which the male connector is receivable into a corresponding female port, and a distal edge of the perimeter wall defines a distal face of the perimeter wall and at least a portion of the distal face is inclined with respect to the insertion axis of the male connector. In some examples, the perimeter wall comprises first and second wall portions which taper together such that a first edge of the first wall portion and a first edge of the second wall portion are connected at an apex portion.
    Type: Application
    Filed: June 24, 2019
    Publication date: September 2, 2021
    Inventors: Timothy MCKAY, Paul Nicholas TOWNSEND, Jason Edward ALLAN, Evan HANNARD, Lee Kevin BRIMER
  • Publication number: 20210260412
    Abstract: A demand regulator for a breathing apparatus. The demand regulator comprises: a flow regulation mechanism for regulating a flow of breathing gas, the flow regulation mechanism having a closed configuration in which breathing gas flow is substantially prevented; a connection mechanism for releasably connecting the flow regulator to a breathing mask, the connection mechanism comprising a release actuator for releasing the connection mechanism; a latch configured to be activated to thereby releasably retain the flow regulation mechanism in the closed configuration; a first latch activation mechanism configured for manual actuation by a user to thereby activate the latch; and a second latch activation mechanism configured to be actuated by the release actuator of the connection mechanism to thereby activate the latch during release of the connection mechanism.
    Type: Application
    Filed: June 24, 2019
    Publication date: August 26, 2021
    Inventors: Paul Nicholas TOWNSEND, Lee Kevin BRIMER
  • Publication number: 20210192323
    Abstract: The present disclosure advantageously provides a hardware accelerator for an artificial neural network (ANN), including a communication bus interface, a memory, a controller, and at least one processing engine (PE). The communication bus interface is configured to receive a plurality of finetuned weights associated with the ANN, receive input data, and transmit output data. The memory is configured to store the plurality of finetuned weights, the input data and the output data. The PE is configured to receive the input data, execute an ANN model using a plurality of fixed weights associated with the ANN and the plurality of finetuned weights, and generate the output data. Each finetuned weight corresponds to a fixed weight.
    Type: Application
    Filed: December 19, 2019
    Publication date: June 24, 2021
    Applicant: Arm Limited
    Inventors: Paul Nicholas Whatmough, Chuteng Zhou
  • Patent number: 11000714
    Abstract: There is disclosed breathing apparatus equipment which may be in the form of a waist mountable manifold. The breathing apparatus equipment comprises a manifold having a manifold inlet port for a source of breathable gas and at least one manifold outlet port for delivering breathable gas to a user. The equipment further comprises a strap arranged to be worn by the user, and a holder coupled to the strap and having a socket. The socket is configured such that the manifold can be removably located within the socket in multiple orientations.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: May 11, 2021
    Assignee: DRAEGER SAFETY UK LIMITED
    Inventor: Paul Nicholas Townsend