Patents by Inventor Paul S. Diefenbaugh

Paul S. Diefenbaugh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210149441
    Abstract: A lid controller hub (LCH) comprising processing components located in the lid of a mobile computing device, such as a laptop, processes sensor data generated by input sensors (microphones, cameras, touchscreen) and provides for improved and enhanced experiences over existing devices. For example, the LCH provides hardened privacy and the synchronization of touch display activities with the display refresh rate, the latter providing for a smoother and more responsive touch experience over existing designs. The LCH comprises neural network accelerators and digital signal processors that enable waking a device upon detection of an authenticated user's voice or face. The LCH also allows for video- and audio-based contextual awareness and adaptive cooling. By enabling a reduced hinge wire count and a typical day's usage with a single battery charge, an LCH can also provide for an improved industrial design to a simpler hinge and smaller battery.
    Type: Application
    Filed: December 24, 2020
    Publication date: May 20, 2021
    Inventors: Marko Bartscherer, Aleksander Magi, Paul S. Diefenbaugh, Prashant Dewan, Kristoffer Fleming, Kathy Bui, Russell Beauregard, Abin Thomas
  • Publication number: 20210132769
    Abstract: A lid controller hub (LCH) comprising processing components located in the lid of a mobile computing device, such as a laptop, processes sensor data generated by input sensors (microphones, cameras, touchscreen) and provides for improved and enhanced experiences over existing devices. For example, the LCH provides hardened privacy and the synchronization of touch display activities with the display refresh rate, the latter providing for a smoother and more responsive touch experience over existing designs. The LCH enables continuous gestures comprising touch gesture and in-air gesture portions as well as multi-plane gestures in which an initial touch gesture places the device into a mode or context in which it recognizes and acts upon subsequent in-air gestures. Touch operations of a mobile computing device can be based on user presence, user engagement, and a level of user interaction with the device.
    Type: Application
    Filed: December 26, 2020
    Publication date: May 6, 2021
    Inventors: Kunjal S. Parikh, Antonio S. Cheng, Paul S. Diefenbaugh, Jackson Tsai, Edward James Raleigh, Vishal Ravindra Sinha, Chung-yu Liang, Aleksander Magi, Yifan Li
  • Publication number: 20210118357
    Abstract: In one example, a head mounted display system includes at least one memory; and at least one processor to execute instructions to: detect a first position and a first view direction of a head of a user based on sensor data generated by at least one of an accelerometer, at least one camera, or a gyroscope at a first point in time; determine a latency associated with a time to cause an image to be presented on the display; determine a predicted position and a predicted view direction of the head of the user at a second point in time based on the latency; render, prior to the second point in time, the image for presentation on the display based on the predicted position and the predicted view direction of the head of the user; and cause the display to present the rendered image.
    Type: Application
    Filed: December 23, 2020
    Publication date: April 22, 2021
    Inventors: Atsuo Kuwahara, Deepak S. Vembar, Paul S. Diefenbaugh, Vallabhajosyula S. Somayazulu, Kofi C. Whitney
  • Patent number: 10891887
    Abstract: Technology for a display source device is described. The display source device can receive a frame start indication from a display panel at a start of a frame. The display source device can align a timing of the display source device to a timing of the display panel based on the frame start indication received from the display panel to obtain frame-level synchronization between the display source device and the display panel. The display source device can send one or more frame update regions to the display panel in accordance with the timing of the display source device that is aligned to the timing of the display panel.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: January 12, 2021
    Assignee: Intel Corporation
    Inventors: Nausheen Ansari, Seh Kwa, Paul S. Diefenbaugh, Robert Johnston
  • Publication number: 20200374532
    Abstract: Methods, apparatuses and systems may provide for a video transmitter that generates a primary bitstream based on a video signal, wherein the primary bitstream is encoded with subsampled chroma information, and detects a static condition with respect to the video signal. Additionally, a plurality of auxiliary bitstreams may be generated, in response to the static condition, based on the video signal. Each of the plurality of auxiliary bitstreams may be encoded with full resolution chroma information. In one example, a video receiver may detect that the auxiliary bitstreams are associated with the primary bitstream, decode the primary bitstream and the plurality of auxiliary bitstreams to obtain luma information and the full resolution chroma information, and multiplex the luma information with the full resolution chroma information.
    Type: Application
    Filed: July 2, 2020
    Publication date: November 26, 2020
    Applicant: Intel Corporation
    Inventors: Jason Tanner, Paul S. Diefenbaugh, Radhakrishnan Sankar, Sang-Hee Lee
  • Patent number: 10846815
    Abstract: Virtual reality systems and methods are described. For example, one embodiment of an apparatus comprises: a communications interface to provide frame data of a virtual reality scene to a head mounted display (HMD); at least one performance monitor coupled to at least one component of the apparatus the at least one performance monitor to monitor performance of the at least one component and to send an alert based on the performance of the at least one component; a processor to process the frame data; a controller to receive the alert based on the performance of the at least one component and to offload processing of the frame data from the processor to the HMD for processing; and a display to show the rendered view of the scene.
    Type: Grant
    Filed: October 4, 2019
    Date of Patent: November 24, 2020
    Assignee: Intel Corporation
    Inventors: Paul S. Diefenbaugh, Karthik Veeramani, Deepak S. Vembar, Rajneesh Chowdhury, Atsuo Kuwahara
  • Publication number: 20200335062
    Abstract: Particular embodiments described herein provide for an electronic device that includes a display panel. The display panel includes a timing controller (TCON) and a synchronization engine. The TCON can generate a video stream of video frames with a frame rate and the synchronization engine is configured to change the frame rate of the video stream by adding vertical blanking lines to or removing vertical blanking lines from video frames in the video stream.
    Type: Application
    Filed: June 27, 2020
    Publication date: October 22, 2020
    Inventors: Douglas Robert Huard, Paul S. Diefenbaugh, Vishal R. Sinha
  • Publication number: 20200327862
    Abstract: Particular embodiments described herein provide for an electronic device that includes a display and is configured enabling a low power refresh during a semi-active workload. The electronic device includes a display engine, where the display engine generates a video stream with a frame rate, a display, where the display includes an image viewable by a user and the image is refreshed at a first refresh rate, and a timing controller located in the display, where the timing control receives an indicator from the display engine and uses the indicator to determine that the first refresh rate can be lowered to a second refresh rate without the frame rate of the video stream from the display engine being changed. In an example, the indicator is frame with no image data at the start of the frame. In another example, the indicator is an implicit indictor sent by the display engine.
    Type: Application
    Filed: June 27, 2020
    Publication date: October 15, 2020
    Applicant: Intel Corporation
    Inventors: Vishal R. Sinha, Paul S. Diefenbaugh, Douglas Robert Huard
  • Patent number: 10771795
    Abstract: Methods, apparatuses and systems may provide for a video transmitter that generates a primary bitstream based on a video signal, wherein the primary bitstream is encoded with subsampled chroma information, and detects a static condition with respect to the video signal. Additionally, a plurality of auxiliary bitstreams may be generated, in response to the static condition, based on the video signal. Each of the plurality of auxiliary bitstreams may be encoded with full resolution chroma information. In one example, a video receiver may detect that the auxiliary bitstreams are associated with the primary bitstream, decode the primary bitstream and the plurality of auxiliary bitstreams to obtain luma information and the full resolution chroma information, and multiplex the luma information with the full resolution chroma information.
    Type: Grant
    Filed: June 13, 2016
    Date of Patent: September 8, 2020
    Assignee: Intel Corporation
    Inventors: Jason Tanner, Paul S. Diefenbaugh, Radhakrishnan Sankar, Sang-Hee Lee
  • Patent number: 10761585
    Abstract: In one embodiment an apparatus includes a multiplicity of processor components; one or more device components communicatively coupled to one or more processor components of the multiplicity of processor components; and a controller comprising logic at least a portion of which is in hardware, the logic to schedule one or more forced idle periods interspersed with one or more active periods, a forced idle period spanning a duration during which the multiplicity of processor components and the one or more device components are simultaneously placed in respective idle states that define a forced idle power state during isolated sub-periods of the forced idle period. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: September 1, 2020
    Assignee: INTEL CORPORATION
    Inventors: Paul S. Diefenbaugh, Eugene Gorbatov, Andrew Henroid, Eric C. Samson, Barnes Cooper
  • Publication number: 20200264698
    Abstract: An embodiment of a graphics apparatus may include an image generator, and a gesture tracker communicatively coupled to the image generator. The image generator may be configured to generate an image of a virtual input device, the gesture tracker may be configured to determine a position of a user's finger relative to the virtual input device, and the image generator may be further configured to generate an image of a virtual finger based on the determined position of the user's finger relative to the virtual input device. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: February 18, 2020
    Publication date: August 20, 2020
    Applicant: Intel Corporation
    Inventors: Karthik Veeramani, Jianfang Zhu, Sayan Lahiri, Bo Qiu, Bradley A. Jackson, Paul S. Diefenbaugh, Kim Pallister
  • Publication number: 20200159305
    Abstract: There is disclosed in one example a computing apparatus, including: a main board including a processor and memory; a user-facing (UF) camera including an auto-exposure (AE) circuit; an ambient light sensor (ALS); and a power management module communicatively coupled to the UF camera and the ALS, and including logic to detect a light input mismatch between the ALS and the AE and responsive to the detection, disable a power management function of the power management module.
    Type: Application
    Filed: December 28, 2019
    Publication date: May 21, 2020
    Inventors: Marko Bartscherer, Aleksander Magi, Paul S. Diefenbaugh, Kathy T. Bui
  • Patent number: 10613814
    Abstract: In one aspect, an apparatus comprises an encoder configured to encode groups of pixels of a video frame into encoded groups. The video frame comprises a plurality of tiles and each of the plurality of tiles comprises one or more of the groups. For each tile in the plurality of tiles: the encoder is configured to generate a notification based on completion of encoding an encoded tile corresponding to the tile. The apparatus comprises a packetizer configured to generate packets corresponding to the video frame simultaneous with the encoding of the video frame by the encoder. For each tile in the plurality of tiles: the packetizer is configured to generate packets from the encoded tile corresponding to the tile based on the notification.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: April 7, 2020
    Assignee: Intel Corporation
    Inventors: Jason Tanner, Arthur Jeremy Runyan, Satya N. Yedidi, Changliang Wang, Ankur Shah, Paul S. Diefenbaugh
  • Publication number: 20200104971
    Abstract: Virtual reality systems and methods are described. For example, one embodiment of an apparatus comprises: a communications interface to provide frame data of a virtual reality scene to a head mounted display (HMD); at least one performance monitor coupled to at least one component of the apparatus the at least one performance monitor to monitor performance of the at least one component and to send an alert based on the performance of the at least one component; a processor to process the frame data; a controller to receive the alert based on the performance of the at least one component and to offload processing of the frame data from the processor to the HMD for processing; and a display to show the rendered view of the scene.
    Type: Application
    Filed: October 4, 2019
    Publication date: April 2, 2020
    Inventors: Paul S. DIEFENBAUGH, Karthik VEERAMANI, Deepak S. VEMBAR, Rajneesh CHOWDHURY, Atsuo KUWAHARA
  • Patent number: 10606343
    Abstract: An embodiment of a graphics apparatus may include an image generator, and a gesture tracker communicatively coupled to the image generator. The image generator may be configured to generate an image of a virtual input device, the gesture tracker may be configured to determine a position of a user's finger relative to the virtual input device, and the image generator may be further configured to generate an image of a virtual finger based on the determined position of the user's finger relative to the virtual input device. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: April 1, 2017
    Date of Patent: March 31, 2020
    Assignee: Intel Corporation
    Inventors: Karthik Veeramani, Jianfang Zhu, Sayan Lahiri, Bo Qiu, Bradley A. Jackson, Paul S. Diefenbaugh, Kim Pallister
  • Patent number: 10545787
    Abstract: Examples are disclosed for composing memory resources across devices. In some examples, memory resources associated with executing one or more applications by circuitry at two separate devices may be composed across the two devices. The circuitry may be capable of executing the one or more applications using a two-level memory (2LM) architecture including a near memory and a far memory. In some examples, the near memory may include near memories separately located at the two devices and a far memory located at one of the two devices. The far memory may be used to migrate one or more copies of memory content between the separately located near memories in a manner transparent to an operating system for the first device or the second device. Other examples are described and claimed.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: January 28, 2020
    Assignee: INTEL CORPORATION
    Inventors: Neven M Abou Gazala, Paul S. Diefenbaugh, Nithyananda S. Jeganathan, Eugene Gorbatov
  • Publication number: 20190361516
    Abstract: Various embodiments are generally directed to techniques for memory access by a computer in a reduced power state, such as during video playback or connected standby. Some embodiments are particularly directed to disabling one or more memory channels during a reduced power state by mapping memory usages during the reduced power state to one of a plurality of memory channels. In one embodiment, for example, one or more low-power mode blocks in a set of functional blocks of a computer may be identified. In some such embodiments, the computer may include a processor, a memory, and first and second memory channels to communicatively couple the processor with the second memory. In many embodiments, usage of the one or more low-power mode blocks in the set of functional blocks may be mapped to a first address range associated with the first memory channel.
    Type: Application
    Filed: August 9, 2019
    Publication date: November 28, 2019
    Applicant: Intel Corporation
    Inventors: BINATA BHATTACHARYYA, PAUL S. DIEFENBAUGH
  • Patent number: 10475149
    Abstract: Virtual reality systems and methods are described. For example, one embodiment of an apparatus comprises: a communications interface to provide frame data of a virtual reality scene to a head mounted display (HMD); at least one performance monitor coupled to at least one component of the apparatus the at least one performance monitor to monitor performance of the at least one component and to send an alert based on the performance of the at least one component; a processor to process the frame data; a controller to receive the alert based on the performance of the at least one component and to offload processing of the frame data from the processor to the HMD for processing; and a display to show the rendered view of the scene.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: November 12, 2019
    Assignee: INTEL CORPORATION
    Inventors: Paul S. Diefenbaugh, Karthik Veeramani, Deepak S. Vembar, Rajneesh Chowdhury, Atsuo Kuwahara
  • Publication number: 20190317773
    Abstract: The present invention relates to a platform power management scheme. In some embodiments, a platform provides a relative performance scale using one or more parameters to be requested by an OSPM system.
    Type: Application
    Filed: April 18, 2019
    Publication date: October 17, 2019
    Applicant: Intel Corporation
    Inventors: Guy M. Therien, Paul S. Diefenbaugh, Anil Aggarwal, Andrew D. Henroid, Jeremy J. Shrall, Efraim Rotem, Krishnakanth V. Sistla, Eliezer Weissmann
  • Patent number: 10417149
    Abstract: In an embodiment, a processor includes a plurality of cores to independently execute instructions, at least one graphics engine to independently execute graphics instructions, and a power controller including a duty cycle logic to set a duty cycle having a cycle time formed of an active time window in which at least some of the plurality of cores are to be active and an idle time window in which the plurality of cores are to be in a low power state. The duty cycle logic may adjust a duration of at least one of an active time window and an inactive time window based on interrupt information to accommodate an impending interrupt within the active time window. Other embodiments are described and claimed.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: September 17, 2019
    Assignee: Intel Corporation
    Inventors: Ruchika Singh, Paul S. Diefenbaugh