Patents by Inventor Paul Wiercienski

Paul Wiercienski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9449367
    Abstract: Presented herein are caching structures and apparatus for use in block based video. In one embodiment, there is described a system receiving lower resolution frames and generating higher resolution frames. The system comprises an upsampling circuit, a first circuit, and a second circuit. The upsampling circuit upsamples a particular lower resolution frame, thereby resulting in an upsampled frame. The first circuit maps frames that are proximate to the particular frame, to the particular frame. The second circuit simultaneously updates the upsampled frame with two or more blocks from at least one of the frames that are proximate to the particular frame.
    Type: Grant
    Filed: December 10, 2009
    Date of Patent: September 20, 2016
    Assignee: BROADCOM CORPORATION
    Inventors: Yunwei Jia, Paul Wiercienski
  • Patent number: 7969512
    Abstract: A system for processing video information, the system including a memory configured to store video information, a memory controller coupled to the memory and configured to receive memory requests for the video information, a first video signal processing client coupled to the memory controller. The first video signal processing client including a video signal processor, a buffer coupled to the video signal processor, and a memory request module coupled to the memory controller and to the buffer, the memory request module being configured to submit amortized memory requests to the memory controller.
    Type: Grant
    Filed: August 28, 2006
    Date of Patent: June 28, 2011
    Assignee: ATI Technologies, Inc.
    Inventors: Paul Wiercienski, Chris Wiesner, Oswin Hall
  • Publication number: 20110141348
    Abstract: Presented herein are caching structures and apparatus for use in block based video. In one embodiment, there is described a system receiving lower resolution frames and generating higher resolution frames. The system comprises an upsampling circuit, a first circuit, and a second circuit. The upsampling circuit upsamples a particular lower resolution frame, thereby resulting in an upsampled frame. The first circuit maps frames that are proximate to the particular frame, to the particular frame. The second circuit simultaneously updates the upsampled frame with two or more blocks from at least one of the frames that are proximate to the particular frame.
    Type: Application
    Filed: December 10, 2009
    Publication date: June 16, 2011
    Inventors: Yunwei Jia, Paul Wiercienski
  • Publication number: 20110109794
    Abstract: Presented herein are caching structures and apparatus for use in block based video. In one embodiment, there is described a system for providing receiving lower resolution frames and generating higher resolution frames. The system comprises an integrated circuit. The integrated circuit comprises a first circuit, a direct memory access, and a cache. The first circuit maps frames that are proximate to a particular frame to the particular frame. The direct memory access fetches blocks from said proximate frames. The cache stores at least some of the blocks from said proximate frames.
    Type: Application
    Filed: November 6, 2009
    Publication date: May 12, 2011
    Inventors: Paul Wiercienski, Yunwei Jia
  • Publication number: 20080066134
    Abstract: A system for processing video information, the system including a memory configured to store video information, a memory controller coupled to the memory and configured to receive memory requests for the video information, a first video signal processing client coupled to the memory controller. The first video signal processing client including a video signal processor, a buffer coupled to the video signal processor, and a memory request module coupled to the memory controller and to the buffer, the memory request module being configured to submit amortized memory requests to the memory controller.
    Type: Application
    Filed: August 28, 2006
    Publication date: March 13, 2008
    Inventors: Paul Wiercienski, Chris Wiesner, Oswin Hall