Patents by Inventor Pei-Chun Liao
Pei-Chun Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120212699Abstract: In a liquid crystal display panel, a pixel electrode includes at least a main electrode strip and a plurality of sub electrode branches. The sub electrode branches extend outwardly from two opposite edges of the main electrode strip. The main electrode strip includes at least a node-controlling portion, the controlling width of the node-controlling portion are different from a trunk width of the main electrode strip. Otherwise, a plurality of first sub electrode branches and a plurality of second sub electrode branches are extend outwardly from two opposite edges of the main electrode strip respectively. Relating to the position of the first sub electrode branches, the second sub electrode branches has a position-shift amount along the extending direction of the main electrode strip. The position-shift amount is smaller than the branch width of the first or second sub electrode branch.Type: ApplicationFiled: April 30, 2012Publication date: August 23, 2012Inventors: Wan-Hua Lu, Chia-Yu Lee, Pei-Chun Liao, Ting-Jui Chang
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Publication number: 20120162182Abstract: An exemplary operating voltage adjusting method for a flat panel display device including at least a first testing pixel is provided. In the operating voltage adjusting method, a plurality of testing operating voltages are provided. The at least a first testing pixel operative with the testing operating voltages in sequence then is enabled to be charged by a first specific data and a plurality of first data voltages stored in the at least a first testing pixel effected by the testing operating voltages respectively can be obtained. Afterwards, an operating voltage of the flat panel display device is determined according to states of the first data voltages in a testing period. Moreover, an exemplary structure of the flat panel display device also is provided.Type: ApplicationFiled: August 3, 2011Publication date: June 28, 2012Applicant: AU OPTRONICS CORP.Inventors: Sung-Hui LIN, Pei-Chun Liao, Pin-Miao Liu
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Patent number: 8194221Abstract: In a liquid crystal display panel, a pixel electrode includes at least a main electrode strip and a plurality of sub electrode branches. The sub electrode branches extend outwardly from two opposite edges of the main electrode strip. The main electrode strip includes at least a node-controlling portion, the controlling width of the node-controlling portion are different from a trunk width of the main electrode strip. Otherwise, a plurality of first sub electrode branches and a plurality of second sub electrode branches are extend outwardly from two opposite edges of the main electrode strip respectively. Relating to the position of the first sub electrode branches, the second sub electrode branches has a position-shift amount along the extending direction of the main electrode strip. The position-shift amount is smaller than the branch width of the first or second sub electrode branch.Type: GrantFiled: May 25, 2009Date of Patent: June 5, 2012Assignee: AU Optronics Corp.Inventors: Wan-Hua Lu, Chia-Yu Lee, Pei-Chun Liao, Ting-Jui Chang
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Patent number: 8194021Abstract: A display apparatus, pixel structure and drive method thereof are provided. The display apparatus comprises a gate drive chip, a first gate line, a second gate line, a first pixel unit, and a second pixel unit. The gate driver is configured to generate a first gate drive signal and a second gate drive signal. The first and second gate drive signals are outputted to the first and second gate lines, respectively. Furthermore, the first and second gate drive signals are configured to adjust a first feed through (FT) voltage generated by a first pixel area of the first pixel unit, a second FT voltage generated by a second pixel area of the first pixel unit, a third FT voltage generated by a third pixel area of the second pixel unit, and a fourth FT voltage generated by a fourth pixel area of the second pixel unit.Type: GrantFiled: August 8, 2008Date of Patent: June 5, 2012Assignee: AU Optronics Corp.Inventors: Pei-Chun Liao, Hung-Lung Hou
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Publication number: 20120127067Abstract: A pixel array substrate and a display panel are provided. The pixel array substrate includes a substrate, scan line groups, data lines, and pixel structures. The scan line groups are disposed on the substrate. The data lines are intersected with the scan line groups. The pixel structures are connected to the scan line groups and the data lines. Each pixel structure includes an active device group, a first pixel electrode, a second pixel electrode, and a connection electrode. The first pixel electrode is located between the second pixel electrode and the nth scan line group. The connection electrode is located at a side of the first pixel electrode adjacent to one data line. The second pixel electrode is electrically connected to the active device group through the connection electrode. The connection electrode, the first pixel electrode, and the second pixel electrode are of the same layer.Type: ApplicationFiled: November 22, 2011Publication date: May 24, 2012Applicant: AU OPTRONICS CORPORATIONInventors: Chin-An Tseng, Sheng-Ju Ho, Tien-Lun Ting, Cheng-Han Tsao, Ming-Yung Huang, Yen-Heng Huang, Pei-Chun Liao, Wen-Hao Hsu
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Patent number: 8179487Abstract: A thin film transistor (TFT) array substrate including a substrate, a plurality of scan lines disposed on the substrate, a plurality of data lines disposed on the substrate, and a plurality of pixels arranged in array on the substrate is provided. Each scan line is connected to a row of pixels. Each pixel includes a TFT and a pixel electrode, wherein the pixel electrode is connected to one of the scan lines and one of the data lines through the TFT. In the same column of pixels, the TFTs are connected to two adjacent data lines alternatively and aligned in the column direction. At least one of the pixels further includes a capacitance compensating line. In the pixel having the capacitance compensating line, the TFT is connected to one of the adjacent two data lines, and the capacitance compensating line is connected to the other one.Type: GrantFiled: September 19, 2008Date of Patent: May 15, 2012Assignee: Au Optronics CorporationInventors: Yu-Hui Chou, Pei-Chun Liao, Hsueh-Ying Huang
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Patent number: 8035598Abstract: Improving image sticking of a liquid crystal display (LCD) including a plurality of pixels, each of which includes a first subpixel and a second subpixel, includes driving the first subpixels of the pixels with a first optimized common voltage, driving the second subpixels of the pixels with a second optimized common voltage, and driving the LCD with a panel voltage. The panel voltage is between the first and the second optimized common voltages.Type: GrantFiled: June 30, 2008Date of Patent: October 11, 2011Assignee: AU Optronics Corp.Inventors: Pei-Chun Liao, Ting-Jui Chang, Pin-Miao Liu, Chien-Huang Liao, Yu-Chieh Chen
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Publication number: 20110115998Abstract: A LCD panel in which a pixel has a first sub-pixel area and a second sub-pixel area, each area having a storage capacitor. Each pixel has a first gate line for providing a first gate-line signal for charging the first and second storage capacitors, and a second gate line for providing a second gate-line signal for removing part of the charges in the second storage capacitor to a third capacitor after the first gate-line signal has passed. The width of the first and second gate-line signals and their timing can be varied so that the first gate-line signal provided to a row can be used as the second gate-line signal to one of the preceding rows. In some embodiments, a pixel in each row has a duplicate pixel arranged to similarly receive the first and second gate-line signals, but data signals are received from different data lines.Type: ApplicationFiled: November 13, 2009Publication date: May 19, 2011Inventors: Pei-Chun Liao, Tien-Lun Ting, Wen-Hao Hsu, Hung-Lung Hou
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Publication number: 20100157227Abstract: In a liquid crystal display panel, a pixel electrode includes at least a main electrode strip and a plurality of sub electrode branches. The sub electrode branches extend outwardly from two opposite edges of the main electrode strip. The main electrode strip includes at least a node-controlling portion, the controlling width of the node-controlling portion are different from a trunk width of the main electrode strip. Otherwise, a plurality of first sub electrode branches and a plurality of second sub electrode branches are extend outwardly from two opposite edges of the main electrode strip respectively. Relating to the position of the first sub electrode branches, the second sub electrode branches has a position-shift amount along the extending direction of the main electrode strip. The position-shift amount is smaller than the branch width of the first or second sub electrode branch.Type: ApplicationFiled: May 25, 2009Publication date: June 24, 2010Inventors: Wan-Hua Lu, Chia-Yu Lee, Pei-Chun Liao, Ting-Jui Chang
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Publication number: 20090295695Abstract: A display apparatus, pixel structure and drive method thereof are provided. The display apparatus comprises a gate drive chip, a first gate line, a second gate line, a first pixel unit, and a second pixel unit. The gate driver is configured to generate a first gate drive signal and a second gate drive signal. The first and second gate drive signals are outputted to the first and second gate lines, respectively. Furthermore, the first and second gate drive signals are configured to adjust a first feed through (FT) voltage generated by a first pixel area of the first pixel unit, a second FT voltage generated by a second pixel area of the first pixel unit, a third FT voltage generated by a first pixel area of the second pixel unit, and a fourth FT voltage generated by a second pixel area of the second pixel unit.Type: ApplicationFiled: August 8, 2008Publication date: December 3, 2009Applicant: AU OPTRONICS CORP.Inventors: Pei-Chun Liao, Hung-Lung Hou
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Publication number: 20090213284Abstract: Improving image sticking of a liquid crystal display (LCD) including a plurality of pixels, each of which includes a first subpixel and a second subpixel, includes driving the first subpixels of the pixels with a first optimized common voltage, driving the second subpixels of the pixels with a second optimized common voltage, and driving the LCD with a panel voltage. The panel voltage is between the first and the second optimized common voltages.Type: ApplicationFiled: June 30, 2008Publication date: August 27, 2009Inventors: Pei-Chun Liao, Ting-Jui Chang, Pin-Miao Liu, Chien-Huang Liao, Yu-Chieh Chen
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Patent number: 7579859Abstract: The current invention provides a method of determining the lifetime of a semiconductor device due to time dependent dielectric breakdown (TDDB). This method includes providing a plurality of samples of dielectric layer disposed as a gate dielectric layer of a MOS transistor, approximating a source/drain current density distribution as a first function of voltage applied on the samples, approximating a substrate current density distribution as a second function of voltage applied on the samples, approximating a dielectric layer lifetime distribution as a third function of source/drain current density and substrate current density in the samples, deriving, from the first, the second, and the third functions, an empirical model wherein a dielectric layer lifetime is a function of voltage applied thereon, and using the model to determine dielectric layer lifetime at a pre-determined operating gate voltage.Type: GrantFiled: June 14, 2007Date of Patent: August 25, 2009Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Pei-Chun Liao, Chia-Lin Chen
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Publication number: 20090195720Abstract: A thin film transistor (TFT) array substrate including a substrate, a plurality of scan lines disposed on the substrate, a plurality of data lines disposed on the substrate, and a plurality of pixels arranged in array on the substrate is provided. Each scan line is connected to a row of pixels. Each pixel includes a TFT and a pixel electrode, wherein the pixel electrode is connected to one of the scan lines and one of the data lines through the TFT. In the same column of pixels, the TFTs are connected to two adjacent data lines alternatively and aligned in the column direction. At least one of the pixels further includes a capacitance compensating line. In the pixel having the capacitance compensating line, the TFT is connected to one of the adjacent two data lines, and the capacitance compensating line is connected to the other one.Type: ApplicationFiled: September 19, 2008Publication date: August 6, 2009Applicant: AU OPTRONICS CORPORATIONInventors: Yu-Hui Chou, Pei-Chun Liao, Hsueh-Ying Huang
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Publication number: 20090141010Abstract: A liquid crystal display includes first and second pixel electrodes, first to fourth data lines, and a first gate line. The first pixel electrode has separated first primary and secondary sub-pixel electrodes. The second pixel electrode has separated second primary and secondary sub-pixel electrodes. The first data line is coupled to the first secondary sub-pixel electrode and covered by the first pixel electrode. The second data line is coupled to the first primary sub-pixel electrode and covered by the second pixel electrode. The third data line is coupled to the second primary sub-pixel electrode and covered by the second pixel electrode. The fourth data line is coupled to the second secondary sub-pixel electrode. The first gate line is coupled to the first pixel electrode and the second pixel electrode.Type: ApplicationFiled: October 16, 2008Publication date: June 4, 2009Applicant: AU OPTRONICS CORP.Inventors: Pei-Chun LIAO, Hung-Lung HOU, Ting-Wei SU
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Publication number: 20090135321Abstract: A pixel structure of liquid crystal display including a first and a second sub-pixel electrodes, a first and a second data lines, a gate line, and a first and a second transistors is provided. The first and the second sub-pixel electrodes disposed in the first and second sub-pixel areas respectively include at least two display domains at left and right. The first data line is disposed under the interface between two domains of each of the first and second sub-pixel electrodes, and the second data line is disposed under the edges of the first and second sub-pixel electrodes. The gate line is disposed between the first and second sub-pixel areas. The first sub-pixel electrode is controlled by the gate line and the first data line through the first transistor. The second sub-pixel electrode is controlled by the gate line and the second data line through the second transistor.Type: ApplicationFiled: June 17, 2008Publication date: May 28, 2009Applicant: AU OPTRONICS CORP.Inventors: Ting-Wei Su, Pei-Chun Liao, Hung-Lung Hou
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Publication number: 20080309365Abstract: The current invention provides a method of determining the lifetime of a semiconductor device due to time dependent dielectric breakdown (TDDB). This method includes providing a plurality of samples of dielectric layer disposed as a gate dielectric layer of a MOS transistor, approximating a source/drain current density distribution as a first function of voltage applied on the samples, approximating a substrate current density distribution as a second function of voltage applied on the samples, approximating a dielectric layer lifetime distribution as a third function of source/drain current density and substrate current density in the samples, deriving, from the first, second, and the third functions, an empirical model wherein a dielectric layer lifetime is a function of voltage applied thereon, and using the model to determine dielectric layer lifetime at a pre-determined operating gate voltage.Type: ApplicationFiled: June 14, 2007Publication date: December 18, 2008Inventors: Pei-Chun Liao, Chia-Lin Chen
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Patent number: 7453280Abstract: A method for testing a batch of semiconductor devices in wafer level is provided. The method includes the following steps: (a) obtaining a breakdown voltage of gate dielectric of each semiconductor device; (b) applying, to the gate dielectric of each semiconductor device, a stress voltage below the breakdown voltage but above a base voltage of gate dielectric of the semiconductor devices; (c) after the step (b), measuring currents of gate dielectric of each semiconductor devices at the base voltage; and (d) obtaining a tailing distribution from the measured currents.Type: GrantFiled: August 31, 2007Date of Patent: November 18, 2008Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Sheng-Hui Liang, Chia-Lin Chen, Pei-Chun Liao, Chin-Yuan Ko
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Patent number: 7307880Abstract: An electroless plating apparatus is provided. The electroless plating apparatus includes a wafer holder; a chemical dispensing nozzle over the wafer holder; a conduit connected to the chemical dispensing nozzle; and a radiation source over the wafer holder.Type: GrantFiled: November 14, 2005Date of Patent: December 11, 2007Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chin-Yuan Ko, Yung-Sheng Tsai, Pei-Chun Liao
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Publication number: 20070109852Abstract: A non-volatile memory cell based on a soft breakdown mechanism is provided. The memory cell comprises a resistor coupled serially to a gate or source/drain regions of a MOS device. When a soft breakdown occurs to the MOS device, leakage current flowing through the gate dielectric increases. The change of the leakage current is used to indicate different states.Type: ApplicationFiled: November 14, 2005Publication date: May 17, 2007Inventors: Chin-Yuan Ko, Yung-Sheng Tsai, Pei-Chun Liao