Abstract: Waveform inputs are sampled to provide vector inputs which are coupled to respective ones of a plurality of series connected time delay stages in a processing circuit. Each vector is weighted, or amplified, and time delayed by each stage between its input point and the circuit output. Each stage has switched capacitors and an operational amplifier. The delay of each stage is the period of the capacitor switching frequency. All of the components in the stages and vector input circuitry are solid state switches, capacitors or operational amplifiers and therefore are especially suitable for integration in a monolithic or film substrate. The circuit is particularly adapted to beam steering a plurality of waveform inputs from an array of hydrophones.

Abstract: A circuit for monolithic or film stratum is adapted to have circuit capacitances integrated therein and having a minimum unit capacitance (MUC), or smallest practical capacitance that can be fabricated therein. Circuits are provided that have in one circuit arm a capacitor having a first capacity and in a second circuit arm a number N of series connected switched capacitors having a second or terminal capacity, or effective capacity between the end terminals of the second arm, that is less than the first capacity. The first capacity and second capacity form a ratio R, which is the factor by which the first capacity is greater than the second capacity. Switching is provided for each plate of each of the series connected capacitors and at the end terminals of the second arm to alternately connect the second arm into the circuit and to discharge the series connected capacitors which minimizes the effects of parasitic capacitances.