Abstract: A computing system and method employing a processor device for generating real addresses associated with memory locations of a real memory system for reading and writing of data thereto, the system comprising: a plurality of memory blocks in the real memory system for storing data, a physical memory storage for storing the pages of data comprising one or more real memory blocks, each real memory block partitioned into one or more sectors, each comprising contiguous bytes of physical memory; a translation table structure in the physical memory storage having entries for associating a real address with sectors of the physical memory, each translation table entry including one or more pointers for pointing to a corresponding sector in its associated real memory block, the table accessed for storing data in one or more allocated sectors for memory read and write operations initiated by the processor; and, a control device for directly manipulating entries in the translation table structure for performing page ope

Abstract: An improved method, system, and a computer program storage device for management of compressed main memory allocation and utilization. The present invention has features which advantageously avoid system abends or inefficient operation that would otherwise result. We identify 3 types of addresses associated with a page: a virtual address, a real address, and a physical address. The OS is responsible for converting virtual addresses to real addresses, and the memory controller is responsible for converting real addresses to the physical addresses where the compressed data are actually stored. We assume that the memory controller has the capability to store a page either compressed, or uncompressed. Depending on the characteristics of the controller, this may be done either on a per page basis via an indicator bit that is settable by the OS, or on a range of real addresses.

Abstract: A system and method for compressing or predicting data information received within an input stream, wherein contextual information is utilized in the selection of dictionaries for encoding or predicting of a next phrase within the information stream. The present invention utilizes contextual information in conjunction with dictionary-based Lempel-Ziv compression processes.

Abstract: A system for writing data to a disk array includes a cache memory coupled to the disk array for storing data indicative of locations on the disk array and parity blocks associated with parity groups including the locations. Each of the parity blocks includes an identifier indicative of locations within a particular parity group which are protected by the parity data. Write logic reads the identifier from the parity block, and based thereon, determines whether a disk location is not protected by the parity data. The write logic also writes to the location and updates the parity data and the identifier associated with the parity block to include the location of the data block to indicate that the location is protected.

Abstract: A method for resolving race conditions in cascaded switches. More specifically, cross links between the cascaded switches are assigned preferred directions relative to each of the switches. A connection request or a response emanating from a switch will always use a send preference cross link if such link is available.

Abstract: Switch resources for a one-sided crosspoint switch with distributed control (i.e., switch ports, internal busses and controllers) have been organized so that modular growth is facilitated by: (1) assigning each switch port uniquely to one of the controllers; (2) making each controller handle only the crosspoints connected to the switch ports assigned to it; (3) assigning each internal bus uniquely to one of the controllers; and (4) providing a network for the controllers to communicate with each other.

Abstract: Requestors for a busy port in a multi-port communication system are enqueued in wait chains. The connectivity of a crossbar switch is employed to store the wait chains. Elements of the wait chain are modified to provide the right connections; that is, a group of ports are connected by what may be regarded as a form of linked list but where the pointers are comprised of connections in the switch itself. These connections are used both for storing the list structure as well as passing information.

Abstract: Dynamic switch protocols are implemented on a token bus protocol in a shared medium network to improve the basic token bus functional capabilities and link utilization, and to produce a uniform transaction protocol that supports both token bus and dynamic switch networks. Frame formats common to both token bus and dynamic switch protocols are utilized, and circuit switched protocols are superimposed on a token bus protocol in interlocked and data transmissions to establish a circuit switched path between a token holder sender node and a destination node. An initial frame transmission uses a normal link header and establishes the circuit switched path between the sender node and the destination node. Subsequent data frames contain no link header information, thereby improving transmission efficiency, and the last frame in such a transmission disconnects the switched circuit path, thereby allowing other transmissions to resume.

Abstract: A wait depth limited concurrency control method for use in a multi-user data processing environment restricts the depth of the waiting tree to a predetermined depth, taking into account the progress made by transactions in conflict resolution. In the preferred embodiment for a centralized transaction processing system, the waiting depth is limited to one. Transaction specific information represented by a real-valued function L, where for each transaction T in the system at any instant in time L(T) provides a measure of the current "length" of the transaction, is used to determine which transaction is to be restarted in case of a conflict between transactions resulting in a wait depth exceeding the predetermined depth. L(T) may be the number of locks currently held by a transaction T, the maximum of the number of locks held by any incarnation of transaction T, including the current one, or the sum of the number of locks held by each incarnation of transaction T up to the current one.

Abstract: A dynamic switch and its protocol for establishing dynamic connections in a link by the use of frames, each frame having an identification of the source of the frame, an identification of the destination of the frame for the requested connection, and link controls to maintain, initiate or terminate a connection between the source and the destination. The frames are bounded by a start of frame delimiter and an end of frame delimiter which may also act as a connect link control and a disconnect link control, respectively, and the connections are made through the dynamic switch having dynamic-switch ports. The state of a dynamic-switch port is changed dependent on its present state, the dynamic connection requested, and the direction and type of frames passing through the dynamic-switch port.

Abstract: A distributed algorithm for clock synchronization in address independent networks such as token rings and token busses is described. Synchronization is accomplished by using the fastest clock in the network as the master clock against which all other clocks in the network are synchronized. An algorithm is implemented in which each node sends out a message to all the other nodes in the network when its timer times out to tell its time. If a node receives a message with a higher clock time before it has had an opportunity to send out its own message, that node assumes that it is not the fastest node and it will not send out its message. Provision is made for maximum and minimum delays that are expected within a particular network. It has been proven that after a few cycles, all nodes will be synchronized to the node with the fastest clock and that this node will be the only one to transmit its time.

Abstract: A multistage network having a combination of low latency and probability of blockage has particular application in the interconnection of parallel computers. A technique minimizes the blockage of the multistage network, thereby minimizing the number of times that a message requires retransmission. The technique also permits higher utilization of data transport paths in the multistage network. The network has no buffers, so a message either succeeds in getting through, or, if blocked, leads to the notification of the originator that transmission was unsuccessful and that another attempt is required. Multiple return paths, used for example in a time-division-multiplexed (TDM) fashion, are provided in the network. This substantially reduces the amount of blocking in the network, and thus the number of times that a message requires retransmission. In addition, networks associated with the backward paths are used as a means of controlling the data transport.

Abstract: A hierarchy of multipath networks selectively provides connections between a plurality of sources and a plurality of destinations in a communications system. The hierarchy comprises a first multipath network without buffering which consists of two or more stages and constituting a fast path for connecting a source to a destination. At least a second multipath network with buffering and comprising a plurality of stages constitutes an alternate, slower path for connecting a source to a destination in the event that a connection between the source and the destination is blocked in the fast path. The address field of a message from a source is examined at each stage to select an appropriate connection to the next stage and, if the connection is available, the message, stripped of the address field, is propagated to the second stage, but if the next stage is blocked, the message is stopped and a negative acknowledgment is returned to the source.

Abstract: A high speed collision N.times.M tri-state crossbar switch having M collision busses uses contention detection at the destination. In the event of a collision of messages, remedial action can be taken such as rerouting colliding messages over an alternate path provided by a second interconnection network with contention resolution capability. Collision detection codes are transmitted prior to the transmission of messages to each input port. The tri-state output buses are monitored for the collison detection codes to detect an error. In order to prevent damage to driver transistors connected to the tri-state buses when a contention occurs, current limiting is provided to limit the current through the driver transistors to a predetermined level.

Abstract: A switch configurable communication network among many users, comprising forwarding units which individually present a communication tree with their ports as terminal nodes and a cross-point switch for connecting one user to another, for connecting users to a forwarding unit and for connecting one forwarding unit to another, whereby the cross-point switch can configure two users in point-to-point communication and can form modular tree subnetworks among the users by using the forwarding units.

Abstract: A switching system comprising a cross-point switch and a Delta network. The two switches are connected in parallel with common port adaptors. When a port desires a specified time reservation to another port, it sends a request message for the specified time over the Delta network to the requested adaptor at which a reservation processor grants a connection for completion at a fixed time in the future. The reservation grant is then returned via the Delta network to the requesting adaptor which, at the fixed time, sets the cross-point connection on the cross-point switch line associated with the requesting adaptor.

Abstract: An apparatus for parallel control of access of a number of stations to a transmission line. More specifically, this invention uses a transmission loop which intercouples a number of switches. Some of these switches, station switches, are used to indicate that a station has a request for a connection; others are used to establish priority as to when a station may gain access to a reservation processor. The reservation processor informs requesting station that when a station can close an appropriate crosspoint to gain access to a requested transmission line.

Abstract: A switching system comprising a cross-point switch and a Delta network. The two switches are connected in parallel with common port adaptors. When a port desires a specified time reservation to another port, it sends a request message for the specified time over the Delta network to the requested adaptor at which a reservation processor grants a connection for completion at a fixed time in the future. The reservation grant is then returned via the Delta network to the requesting adaptor which, at the fixed time, sets the cross-point connection on the cross-point switch line associated with the requesting adaptor.

Abstract: Method and apparatus is described for encoding and decoding a stream of randomly distributed binary bits representing digital data, including an encoder for encoding the bit stream to achieve a run length limited, partial response coding of the stream; a recording medium for recording the encoded stream; and a decoding system for recovering timing signals and a stream of data signals separately from the recorded stream using a first channel for decoding the recorded stream to recover a timing signal stream; therefrom; and a second channel for decoding the recorded stream to recover a stream of data signals therefrom.

Abstract: A switching system comprising a cross-point switch and a Delta network. The two switches are connected in parallel with common port adaptors. When a port desires a specified time reservation to another port, it sends a request message for the specified time over the Delta network to the requested adaptor at which a reservation processor grants a connection for completion at a fixed time in the future. The reservation grant is then returned via the Delta network to the requesting adaptor which, at the fixed time, sets the cross-point connection on the cross-point switch line associated with the requesting adaptor.