Patents by Inventor Peter Bogner
Peter Bogner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10476483Abstract: Filters are discussed where a first window function and a second window function are applied to a digital input signal, wherein a window length of the first window function is longer than a window length of the second window function. The results of this windowing are integrated.Type: GrantFiled: November 9, 2017Date of Patent: November 12, 2019Assignee: INFINEON TECHNOLOGIES AGInventors: Dietmar Straeussnigg, Peter Bogner, Michael Kropfitsch, Jens Barrenscheen
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Patent number: 10456048Abstract: A sensor device includes an implantable sensor unit, a transponder unit, and a wired connection flexibly and electrically connecting the implantable sensor unit and the transponder unit. The implantable sensor unit is adapted to be implanted into a body. The implantable sensor unit includes a comparator and a sensor adapted to sense a characteristic of the body in vivo. The sensor is adapted to supply an analog signal to a first input of the comparator. The transponder unit is adapted to supply a control signal to the implantable sensor unit and to receive an output signal of the comparator. The implantable sensor unit is adapted to supply an analog approximation signal to a second input of the comparator in response to the control signal. The wired connection is adapted to transmit the control signal and the output signal of the comparator.Type: GrantFiled: August 31, 2016Date of Patent: October 29, 2019Assignee: Infineon Technologies AGInventors: Peter Bogner, Dirk Hammerschmidt
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Publication number: 20190326919Abstract: A method and an apparatus for determining the suitability of a test delay value between comparator decisions of a comparator circuit of an asynchronous successive approximation analog/digital converter and a method for determining an optimized delay value of a comparator of an asynchronous successive approximation analog/digital converter are provided.Type: ApplicationFiled: April 17, 2019Publication date: October 24, 2019Applicant: Infineon Technologies AGInventors: Martin Pernull, Peter Bogner
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Publication number: 20190326920Abstract: In accordance with an embodiment, a method for calibrating at least two analog-to-digital converters includes feeding an analog predefined signal to the at least two analog-to-digital converters; converting the analog predefined signal into at least two converter-associated digital values using the at least two analog-to-digital converters, wherein the converting is based on a received clock signal; and adapting a converter-specific time delay based on the at least two converter-associated digital values.Type: ApplicationFiled: April 17, 2019Publication date: October 24, 2019Inventors: Martin Pernull, Peter Bogner
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Publication number: 20190250191Abstract: Measurement apparatuses and methods are described. A measurement input is coupled with a first terminal of a capacitance via a first switch, and a reference voltage is coupled with the first terminal of the capacitance via a second switch. A measurement circuit is coupled to a second terminal of said capacitance.Type: ApplicationFiled: April 23, 2019Publication date: August 15, 2019Inventors: Peter Bogner, Franz Kuttner
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Patent number: 10361694Abstract: A switching circuitry is configured to provide, during an ON-State, a connection between a first port and second port and to electrically disconnect, during an OFF-State, the first port from the second port. The switching interface comprises a first and a second cascode transistor element having an applicable operational voltage and comprising a control terminal, wherein the first cascode transistor element is connected with the first port of the switching interface and wherein the second cascode transistor element is connected with the second port of the switching interface. The switching interface comprises a switching transistor element, having the applicable operational voltage and comprising a third control terminal, the switching transistor element being serially connected the first and second cascode transistor elements. A supply signal arrangement is connected to the control terminals and configured to provide control voltages to the control terminals.Type: GrantFiled: October 13, 2017Date of Patent: July 23, 2019Assignee: Infineon Technologies AGInventors: Peter Bogner, Herwig Wappis
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Publication number: 20190173460Abstract: A circuit for processing an input-signal voltage, and including an input capacitance coupled between an input node of the circuit and a sense node of a comparator; a reference capacitance coupled to the sense node of the comparator; and a common mode switch coupled between the sense node and a reference node of the comparator. The circuit is configured to have the input capacitance set to a reference input voltage while the common mode switch is closed, and the input node set to the input-signal voltage while the common mode switch is open. The reference capacitance includes a plurality of capacitances, at least one of which is provided as a switched capacitance that is selectively controllable to configure the plurality of capacitances. A switched capacitance controller is configured to control the switched capacitance so as to compensate, at the sense node, a comparator offset voltage.Type: ApplicationFiled: January 18, 2019Publication date: June 6, 2019Inventors: Peter Bogner, Gerhard Maderbacher
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Patent number: 10309989Abstract: Measurement apparatuses and methods are described. A measurement input is coupled with a first terminal of a capacitance via a first switch, and a reference voltage is coupled with the first terminal of the capacitance via a second switch. A measurement circuit is coupled to a second terminal of said capacitance.Type: GrantFiled: October 9, 2017Date of Patent: June 4, 2019Assignee: Infineon Technologies AGInventors: Peter Bogner, Franz Kuttner
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Publication number: 20190140625Abstract: Filters are discussed where a first window function and a second window function are applied to a digital input signal, wherein a window length of the first window function is longer than a window length of the second window function. The results of this windowing are integrated.Type: ApplicationFiled: November 9, 2017Publication date: May 9, 2019Inventors: Dietmar STRAEUSSNIGG, Peter BOGNER, Michael KROPFITSCH, Jens BARRENSCHEEN
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Patent number: 10278084Abstract: A radar sensor includes a mixer configured to receive an radio frequency (RF) input signal to down-convert the RF input signal into a base-band or intermediate frequency (IF) band, an analog-to-digital converter (ADC), and a signal processing chain coupled between the mixer and the ADC. The radar sensor further includes an oscillator circuit that is configured to generate a test signal. The ADC is coupled to an output of the signal processing chain, and is configured to generate a digital signal by digitizing an output signal of the signal processing chain, the output signal being derived from the test signal. The radar sensor further includes a digital signal processing circuit coupled to the ADC downstream thereof, the digital signal processing circuit being configured to perform a spectral analysis on frequency values of the digital signal.Type: GrantFiled: July 13, 2018Date of Patent: April 30, 2019Assignee: Infineon Technologies AGInventors: Florian Starzer, Peter Bogner, Oliver Frank, Guenter Haider, Michael Kropfitsch, Thomas Sailer, Jochen O. Schrattenecker, Rainer Stuhlberger
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Patent number: 10224915Abstract: A circuit for processing an input-signal voltage comprises a first comparator comprising a first-comparator sense node and a reference capacitance that is coupled to the first-comparator sense node, a second comparator comprising a second-comparator sense node, and a comparator select switch coupled between a path input terminal of the circuit and the first-comparator sense node and the second-comparator sense node. A method of processing at least one input-signal voltage using at least one associated threshold voltage in a circuit, wherein a plurality of comparators comprises more comparators than there are path input terminals coupled to path output terminals, comprises selectively making a coupling via one comparator of two comparators provided in parallel to form a coupling path from the path input terminal to an associated path output terminal, while breaking the coupling via the other comparator.Type: GrantFiled: March 28, 2017Date of Patent: March 5, 2019Assignee: Infineon Technologies AGInventors: Peter Bogner, Gerhard Maderbacher
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Patent number: 10218377Abstract: Representative implementations of devices and techniques provide gain calibration for analog to digital conversion of time-discrete analog inputs. An adjustable capacitance arrangement is used to reduce or eliminate gain error caused by capacitor mismatch within the ADC. For example, the capacitance arrangement may include an array of multiple switched capacitances arranged to track gain error during search algorithm operation.Type: GrantFiled: July 6, 2016Date of Patent: February 26, 2019Assignee: Infineon Technologies AGInventor: Peter Bogner
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Patent number: 10187047Abstract: A circuit for processing an input-signal voltage comprises an input capacitance coupled between an input node of the circuit and a sense node of a comparator and a reference capacitance coupled to the sense node of the comparator. A method for processing an input-signal voltage comprises configuring a reference capacitance coupled to an input capacitance; during a charge phase, charging the reference capacitance to a first-level reference voltage; and, during an operative phase, setting the input capacitance to an input-signal voltage to obtain, at the sense node, a sense voltage.Type: GrantFiled: March 28, 2017Date of Patent: January 22, 2019Assignee: Infineon Technologies AGInventors: Peter Bogner, Gerhard Maderbacher
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Patent number: 10181859Abstract: An Analog-to-Digital-Conversion control system includes a first sample and hold circuit configured to provide a first sampled output to be converted by an Analog-to-Digital-Converter, which comprises a first sampling control circuit configured to receive a first trigger information to trigger sampling of a first analog input and to receive a first collision detection information from the Analog-to-Digital-Converter to detect a collision, a first sample and hold stage coupled to the first sampling control circuit and configured to sample the first analog input, only if no collision has been detected by the first sampling control circuit, wherein the first sampling control circuit is further configured to check predefined first sampling criteria and to output a first conversion request to the Analog-to-Digital-Converter, only if the predefined first sampling criteria are fulfilled.Type: GrantFiled: February 13, 2018Date of Patent: January 15, 2019Assignee: Infineon Technologies AGInventors: Jens Barrenscheen, Peter Bogner, Juergen Schaefer
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Publication number: 20180332488Abstract: A radar sensor includes a mixer configured to receive an radio frequency (RF) input signal to down-convert the RF input signal into a base-band or intermediate frequency (IF) band, an analog-to-digital converter (ADC), and a signal processing chain coupled between the mixer and the ADC. The radar sensor further includes an oscillator circuit that is configured to generate a test signal. The ADC is coupled to an output of the signal processing chain, and is configured to generate a digital signal by digitizing an output signal of the signal processing chain, the output signal being derived from the test signal. The radar sensor further includes a digital signal processing circuit coupled to the ADC downstream thereof, the digital signal processing circuit being configured to perform a spectral analysis on frequency values of the digital signal.Type: ApplicationFiled: July 13, 2018Publication date: November 15, 2018Applicant: Infineon Technologies AGInventors: Florian STARZER, Peter BOGNER, Oliver FRANK, Guenter HAIDER, Michael KROPFITSCH, Thomas SAILER, Jochen O. SCHRATTENECKER, Rainer STUHLBERGER
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Patent number: 10122374Abstract: An apparatus for converting an analog signal to a digital signal comprises an input node to be set to an input voltage that is based on the analog signal. The input node is configured to be coupled to a tank capacitor to receive charge from the tank capacitor. The apparatus further comprises a current source configured to be coupled to the tank capacitor to change an amount of charge stored on the tank capacitor. A method for use in operating an analog-to-digital converter to convert an analog signal into a digital signal comprises, in a sensing mode, setting an input voltage based on the analog signal to a sampling capacitor and, in a non-sensing mode, providing a sample voltage to a comparator.Type: GrantFiled: August 30, 2017Date of Patent: November 6, 2018Assignee: Infineon Technologies AGInventor: Peter Bogner
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Patent number: 10079610Abstract: Representative implementations of devices and techniques provide a built-in self-test (BIST) for an analog-to-digital converter (ADC). Stimuli needed to test an ADC are generated within the chip containing the ADC. Evaluation circuitry is also available on-chip. Generation and evaluation circuits and systems are based on existing circuits and/or components of the chip.Type: GrantFiled: July 5, 2016Date of Patent: September 18, 2018Assignee: Infineon Technologies AGInventors: Peter Bogner, Andreas Kalt, Jaafar Mejri, Martin Pernull
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Patent number: 10063250Abstract: A method of processing an input voltage. The method includes, during a sampling phase, using a digital-to-analog converter (DAC) capacitor to sample a reference voltage. The method includes, during a charge redistribution phase, using an input voltage to charge the DAC capacitor.Type: GrantFiled: May 8, 2017Date of Patent: August 28, 2018Assignee: Infineon Technologies AGInventors: Francesco Santoro, Bernhard Eisgruber, Peter Bogner
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Patent number: 10057795Abstract: A radio frequency (RF) receive circuit is described herein. In accordance with one embodiment, the RF receive circuit includes a mixer configured to receive an RF input signal to down-convert the RF input signal into a base-band or intermediate frequency (IF) band, an analog-to-digital converter (ADC), and a signal processing chain coupled between the mixer and the ADC. The signal processing chain includes at least two circuit nodes. The RF receive circuit further includes an oscillator circuit that is configured to generate a test signal. The oscillator circuit is coupled to the signal processing chain and is configured to selectively feed the oscillator signal into one of the at least two circuit nodes.Type: GrantFiled: June 1, 2017Date of Patent: August 21, 2018Assignee: Infineon Technologies AGInventors: Florian Starzer, Peter Bogner, Oliver Frank, Guenter Haider, Michael Kropfitsch, Thomas Sailer, Jochen O. Schrattenecker, Rainer Stuhlberger
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Patent number: 10056916Abstract: A circuit (100) comprises an input terminal (141) which is configured to receive an analog input signal (142). The circuit (100) also comprises a combination element (601) which is configured to combine a number of time-displaced signal values of the input signal (142) to form an analog combination signal (144). The circuit (100) also comprises a quantizer (131) having a converter core which is configured to receive the combination signal (144) via passive charge redistribution from the combination element (601) and to convert it into a digital output signal (145). Such techniques can thus provide for an analog/digital conversion with filtering in the analog domain.Type: GrantFiled: August 11, 2017Date of Patent: August 21, 2018Assignee: Infineon Technologies AGInventors: Martin Pernull, Peter Bogner