Abstract: An integrated circuit (IC) die is disclosed. The IC die can include a signal via extending through the IC die. The IC die can include a transmission line extending laterally within the IC die in a direction non-parallel to the signal via, the transmission line configured to transfer an electrical signal to the signal via. The IC die can include a matching circuit disposed between the transmission line and the signal via. The matching circuit can include inductance and capacitance matching circuitry to compensate for parasitic inductance and capacitance introduced by transition from the IC die to an underlying carrier.

Abstract: An integrated circuit (IC) die is disclosed. The IC die can include a signal via extending through the IC die. The IC die can include a transmission line extending laterally within the IC die in a direction non-parallel to the signal via, the transmission line configured to transfer an electrical signal to the signal via. The IC die can include a matching circuit disposed between the transmission line and the signal via. The matching circuit can include inductance and capacitance matching circuitry to compensate for parasitic inductance and capacitance introduced by transition from the IC die to an underlying carrier.

Abstract: Provided herein are apparatus and methods for power enhancement of self-biased distributed amplifiers with gate bias networks. By sampling output power a gate bias network with a filter network can adjust gate bias so as to improve the P1 dB compression point and the Psat saturation power level of a self-biased distributed amplifier. Advantageously the filter network can be derived using passive components thereby making it an easy to implement and cost effective approach to improve linearity and output power.

Abstract: Provided herein are apparatus and methods for power enhancement of self-biased distributed amplifiers with gate bias networks. By sampling output power a gate bias network with a filter network can adjust gate bias so as to improve the P1 dB compression point and the Psat saturation power level of a self-biased distributed amplifier. Advantageously the filter network can be derived using passive components thereby making it an easy to implement and cost effective approach to improve linearity and output power.

Abstract: Apparatus and methods for reducing glitches in digital step attenuators are disclosed. By configuring a multi-bit DSA such that an attenuation control block changes a plurality of control signals in a manner sequencing individual switches of the DSA, glitches can be reduced and RF signal behavior can be enhanced. The sequence, based upon a unit time delay, causes the transient attenuation value to be bounded between a minimum and maximum and can improve settling time.

Abstract: Apparatus and methods for reducing glitches in digital step attenuators are disclosed. By configuring a multi-bit DSA such that an attenuation control block changes a plurality of control signals in a manner sequencing individual switches of the DSA, glitches can be reduced and RF signal behavior can be enhanced. The sequence, based upon a unit time delay, causes the transient attenuation value to be bounded between a minimum and maximum and can improve settling time.

Abstract: A mean square power detector in accordance with one or more embodiments includes a gain or attenuation circuit comprising a plurality of gain or attenuation elements arranged for generating a plurality of amplified or attenuated versions of a radio frequency (RF) input signal. The mean square power detector also includes a plurality of mean square detectors coupled to the gain or attenuation circuit. Each of the mean square detectors receives a different one of the plurality of amplified or attenuated versions of the RF input signal. Each of the plurality of mean square detectors generates an output signal representative of the mean square power of the RF input signal for a different input signal level range. A summing element is coupled to the plurality of mean square detectors for combining the output signals of the plurality of mean square detectors to generate a signal representative of the mean square or root mean square of the RF input signal.

Abstract: A mean square power detector in accordance with one or more embodiments includes a gain or attenuation circuit comprising a plurality of gain or attenuation elements arranged for generating a plurality of amplified or attenuated versions of a radio frequency (RF) input signal. The mean square power detector also includes a plurality of mean square detectors coupled to the gain or attenuation circuit. Each of the mean square detectors receives a different one of the plurality of amplified or attenuated versions of the RF input signal. Each of the plurality of mean square detectors generates an output signal representative of the mean square power of the RF input signal for a different input signal level range. A summing element is coupled to the plurality of mean square detectors for combining the output signals of the plurality of mean square detectors to generate a signal representative of the mean square or root mean square of the RF input signal.

Abstract: A negative resistance generator includes first and second terminals; first and second inductors connected in series between the terminals; and a semiconductor amplifying device having a first control electrode connected to the first terminal and a first active electrode connected to the second terminal and a second active electrode connected to the junction of the inductors. When employed in an active filter resonator a first variable capacitor is interconnected with the inductors for setting the resonant frequency of the resonator. The resonators may be combined in an active filter with a transmission line where each of the resonators is interconnected to the line by decreasing resistance from the input to the output in order to balance the rf currents to which the resonators are subjected.

Abstract: A switching system for controlling rf energy through an rf transmission medium including a plurality of semiconductor switching devices connected in a series configuration with the primary electrodes connected in series, and means for providing graduated bias on the control electrodes for establishing an equal control voltage on each device between its control electrode and one of its primary electrodes.