Abstract: In one example, a method for controlling a display with a digital signal includes detecting a binary value from a timing controller, the binary value corresponding to a portion of an image to be displayed. The method can also include determining a previous binary value from the timing controller and calculating a difference between the binary value from the timing controller and the previous binary value from the timing controller. Furthermore, the method can include generating an encoded signal based on the difference and transmitting the encoded signal to a display panel.

Abstract: Systems and methods may couple on-chip optical circuits to external fibers. An SOI waveguide structure may include mirror structures and tapered waveguides to optically couple optical circuits to fibers in a vertically oriented external connector. The mirror structure(s) may be angularly disposed at the ends of the silicon waveguide structure. An oxide layer may cover a buried oxide layer and the silicon waveguide structure. The tapered waveguide(s) may have a narrow end and a wide end. The narrow end of the tapered waveguide(s) may be disposed above the mirror structures. The tapered waveguide(s) may extend through the oxide layer from the narrow end in a direction perpendicular to the silicon waveguide structure. An external connector may fit over the tapered waveguide(s) and uses a fiber array traveling through a connector body to optically couple to the external fiber.

Abstract: Photonic components are placed on the processor package to bring the optical signal close to the processor die. The processor package includes a substrate to which the processor die is coupled, and which allows the processor die to connect to a printed circuit board. The processor package also includes transceiver logic, electrical-optical conversion circuits, and an optical coupler. The electrical-optical conversion circuits can include laser(s), modulator(s), and photodetector(s) to transmit and receive and optical signal. The coupler interfaces to a fiber that extends off the processor package. Multiple fibers can be brought to the processor package allowing for a scalable high-speed, high-bandwidth interconnection to the processor.

Abstract: Photonic components are placed on the processor package to bring the optical signal close to the processor die. The processor package includes a substrate to which the processor die is coupled, and which allows the processor die to connect to a printed circuit board. The processor package also includes transceiver logic, electrical-optical conversion circuits, and an optical coupler. The electrical-optical conversion circuits can include laser(s), modulator(s), and photodetector(s) to transmit and receive and optical signal. The coupler interfaces to a fiber that extends off the processor package. Multiple fibers can be brought to the processor package allowing for a scalable high-speed, high-bandwidth interconnection to the processor.

Abstract: Micro LEDs may be placed on a substrate in regularly spaced rows with an empty row between at least two successive rows of micro LED. A micro solar cell may then be placed in the empty row.

Abstract: Micro LEDs may be placed on a substrate in regularly spaced rows with an empty row between at least two successive rows of micro LED. A micro solar cell may then be placed in the empty row.

Abstract: Embodiments of the present disclosure provide optical connection techniques and configurations. In one embodiment, an apparatus includes a receptacle for mounting on a surface of a package substrate, the receptacle having a pluggable surface to receive an optical coupler plug such that the optical coupler plug is optically aligned with one or more optical apertures of an optoelectronic assembly that is configured to emit and/or receive light using the one or more optical apertures in a direction that is substantially perpendicular to the surface of the package substrate when the optoelectronic assembly is affixed to the package substrate. Other embodiments may be described and/or claimed.

Abstract: An optical touchscreen assembly may employ a photonic chip packaged with a chip surface at an angle inclined between horizontal and vertical orientations. An inclined paddle sawn flat no-leads (IPSFN) package may be affixed to a cover glass surface along a perimeter of a display. IPSFN packages may incorporate a photo-emitter chip and a photo-detector chip that may be inclined for a desired angle of incidence relative to the cover glass. A CMOS integrated optical transceiver package may include inclined photonic chips and a non-inclined CMOS chip having at least one of a photo-emitter driver, or a photo-detector TIA and/or ADC. A chip package lead frame may include cantilevered paddle tabs amenable to controlled deflection during package assembly. An inclined packaging assembly method may include attaching a chip to a lead frame paddle and form pressing the lead frame to incline the chip to a desired angle before encapsulation.

Abstract: A distributed memory panel including a panel, a light emitter of a pixel on the panel, and integrated circuit on the panel. The integrated circuit to include a memory wherein the memory is exclusively associated with the light emitter and a driver to drive the light emitter of the pixel.

Abstract: Embodiments of the present disclosure provide optical connection techniques and configurations. In one embodiment, an apparatus includes a receptacle for mounting on a surface of a package substrate, the receptacle having a pluggable surface to receive an optical coupler plug such that the optical coupler plug is optically aligned with one or more optical apertures of an optoelectronic assembly that is configured to emit and/or receive light using the one or more optical apertures in a direction that is substantially perpendicular to the surface of the package substrate when the optoelectronic assembly is affixed to the package substrate. Other embodiments may be described and/or claimed.

Abstract: Embodiments of the present disclosure provide optical connection techniques and configurations. In one embodiment, an apparatus includes a receptacle for mounting on a surface of a package substrate, the receptacle having a pluggable surface to receive an optical coupler plug such that the optical coupler plug is optically aligned with one or more optical apertures of an optoelectronic assembly that is configured to emit and/or receive light using the one or more optical apertures in a direction that is substantially perpendicular to the surface of the package substrate when the optoelectronic assembly is affixed to the package substrate. Other embodiments may be described and/or claimed.

Abstract: An optical touchscreen assembly may employ a photonic chip packaged with a chip surface at an angle inclined between horizontal and vertical orientations. An inclined paddle sawn flat no-leads (IPSFN) package may be affixed to a cover glass surface along a perimeter of a display. IPSFN packages may incorporate a photo-emitter chip and a photo-detector chip that may be inclined for a desired angle of incidence relative to the cover glass. A CMOS integrated optical transceiver package may include inclined photonic chips and a non-inclined CMOS chip having at least one of a photo-emitter driver, or a photo-detector TIA and/or ADC. A chip package lead frame may include cantilevered paddle tabs amenable to controlled deflection during package assembly. An inclined packaging assembly method may include attaching a chip to a lead frame paddle and form pressing the lead frame to incline the chip to a desired angle before encapsulation.

Abstract: An optical touchscreen assembly may employ a photonic chip packaged with a chip surface at an angle inclined between horizontal and vertical orientations. An inclined paddle sawn flat no-leads (IPSFN) package may be affixed to a cover glass surface along a perimeter of a display. IPSFN packages may incorporate a photo-emitter chip and a photo-detector chip that may be inclined for a desired angle of incidence relative to the cover glass. A CMOS integrated optical transceiver package may include inclined photonic chips and a non-inclined CMOS chip having at least one of a photo-emitter driver, or a photo-detector TIA and/or ADC. A chip package lead frame may include cantilevered paddle tabs amenable to controlled deflection during package assembly. An inclined packaging assembly method may include attaching a chip to a lead frame paddle and form pressing the lead frame to incline the chip to a desired angle before encapsulation.

Abstract: PLC architectures and fabrication techniques for providing electrical and photonic integration of a photonic components with a semiconductor substrate. In the exemplary embodiment, the PLC is to accommodate optical input and/or output (I/O) as well as electrically couple to a microelectronic chip. One or more photonic chip or optical fiber terminal may be coupled to an optical I/O of the PLC. In embodiments the PLC includes a light modulator, photodetector and coupling regions supporting the optical I/O. Spin-on electro-optic polymer (EOP) may be utilized for the modulator while a photodefinable material is employed for a mode expander in the coupling region.

Abstract: An optical touchscreen assembly may employ a photonic chip packaged with a chip surface at an angle inclined between horizontal and vertical orientations. An inclined paddle sawn flat no-leads (IPSFN) package may be affixed to a cover glass surface along a perimeter of a display. IPSFN packages may incorporate a photo-emitter chip and a photo-detector chip that may be inclined for a desired angle of incidence relative to the cover glass. A CMOS integrated optical transceiver package may include inclined photonic chips and a non-inclined CMOS chip having at least one of a photo-emitter driver, or a photo-detector TIA and/or ADC. A chip package lead frame may include cantilevered paddle tabs amenable to controlled deflection during package assembly. An inclined packaging assembly method may include attaching a chip to a lead frame paddle and form pressing the lead frame to incline the chip to a desired angle before encapsulation.

Abstract: Embodiments of the invention describe a multi-segment optical waveguide that enables an optical modulator to be low-power and athermal by decreasing the device length needed for a given waveguide length. Embodiments of the invention describe an optical waveguide that is folded onto itself, and thus includes at least two sections. Thus, embodiments of the invention may decrease the device size of a modulator by at least around a factor of two if the device is folded twofold (device size may be further reduced if the modulator is folded threefold, four-fold, five-fold, etc.). Embodiments of the invention further enable the electrode length required to create the desired electro-optic effect for the multi-segment optical waveguide to be reduced. In embodiments of the invention, certain electrodes may be “shared” amongst the different segments of the waveguide, thereby reducing the power requirement and capacitance of a device having a waveguide of a given length.

Abstract: Embodiments of the present disclosure describe techniques and configurations for decreasing optical loss in a waveguide of a modulator device. In one embodiment, an apparatus includes a substrate, and a waveguide of a modulator device formed on the substrate, the waveguide having a first portion that is configured to receive light for propagation along the waveguide, a second portion that includes two slots formed in the waveguide that merge into a single slot, the second portion being coupled with the first portion, a third portion that includes the single slot formed in the waveguide, the third portion being coupled with the second portion, a fourth portion that includes another two slots formed in the waveguide, the another two slots branching from the single slot, the fourth portion being coupled with the third portion, and a fifth portion that is configured to output the propagated light, the fifth portion being coupled with the fourth portion. Other embodiments may be described and/or claimed.

Abstract: Photonic components are placed on the processor package to bring the optical signal close to the processor die. The processor package includes a substrate to which the processor die is coupled, and which allows the processor die to connect to a printed circuit board. The processor package also includes transceiver logic, electrical-optical conversion circuits, and an optical coupler. The electrical-optical conversion circuits can include laser(s), modulator(s), and photodetector(s) to transmit and receive and optical signal. The coupler interfaces to a fiber that extends off the processor package. Multiple fibers can be brought to the processor package allowing for a scalable high-speed, high-bandwidth interconnection to the processor.

Abstract: Embodiments of the present disclosure describe techniques and configurations for decreasing optical loss in a wave-guide of a modulator device. In one embodiment, an apparatus includes a substrate, and a waveguide of a modulator device formed on the substrate, the waveguide having a first portion that is configured to receive light for propagation along the waveguide, a second portion that includes two slots formed in the waveguide that merge into a single slot, the second portion being coupled with the first portion, a third portion that includes the single slot formed in the waveguide, the third portion being coupled with the second portion, a fourth portion that includes another two slots formed in the waveguide, the another two slots branching from the single slot, the fourth portion being coupled with the third portion, and a fifth portion that is configured to output the propagated light, the fifth portion being coupled with the fourth portion. Other embodiments may be described and/or claimed.

Abstract: Systems and methods may couple on-chip optical circuits to external fibers. An SOI waveguide structure may include mirror structures and tapered waveguides to optically couple optical circuits to fibers in a vertically oriented external connector. The mirror structure(s) may be angularly disposed at the ends of the silicon waveguide structure. An oxide layer may cover a buried oxide layer and the silicon waveguide structure. The tapered waveguide(s) may have a narrow end and a wide end. The narrow end of the tapered waveguide(s) may be disposed above the mirror structures. The tapered waveguide(s) may extend through the oxide layer from the narrow end in a direction perpendicular to the silicon waveguide structure. An external connector may fit over the tapered waveguide(s) and uses a fiber array traveling through a connector body to optically couple to the external fiber.